Mercurial > hg > CbC > CbC_gcc
annotate gcc/config/picochip/dfa_space.md @ 67:f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
| author | nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp> |
|---|---|
| date | Tue, 22 Mar 2011 17:18:12 +0900 |
| parents | a06113de4d67 |
| children |
| rev | line source |
|---|---|
| 0 | 1 ;; GCC machine description for picochip |
| 2 ;; Copyright (C) 2008 Free Software Foundation, Inc. | |
|
67
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
3 ;; Contributed by Picochip Ltd (http://www.picochip.com) |
| 0 | 4 ;; Maintained by Daniel Towner (dant@picochip.com) and Hariharan |
| 5 ;; Sandanagobalane (hariharan@picochip.com) | |
| 6 ;; | |
| 7 ;; This file is part of GCC. | |
| 8 ;; | |
| 9 ;; GCC is free software; you can redistribute it and/or modify | |
| 10 ;; it under the terms of the GNU General Public License as published by | |
| 11 ;; the Free Software Foundation; either version 3, or (at your option) | |
| 12 ;; any later version. | |
| 13 ;; | |
| 14 ;; GCC is distributed in the hope that it will be useful, | |
| 15 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 16 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 17 ;; GNU General Public License for more details. | |
| 18 ;; | |
| 19 ;; You should have received a copy of the GNU General Public License | |
| 20 ;; along with GCC; see the file COPYING3. If not, see | |
| 21 ;; <http://www.gnu.org/licenses/>. | |
| 22 | |
| 23 ;; The following DFA description schedules instructions for space. The | |
| 24 ;; schedule seeks to avoid stall cycles (e.g., memory load), but the | |
| 25 ;; instructions are not VLIW packed (whenever instructions are packed | |
| 26 ;; together, an additional byte is used to denote this, which | |
| 27 ;; increases the code size). | |
| 28 | |
| 29 ;; No special handling of the long constants is necessary (as in | |
| 30 ;; dfa_speed.md), since VLIW packing is not used. | |
| 31 | |
| 32 ;; Memory instructions stall for one cycle. All other instructions | |
| 33 ;; complete ready for the next cycle. | |
| 34 | |
| 35 (define_insn_reservation "nonStallInsn" 1 | |
| 36 (and (eq_attr "schedType" "space") | |
| 37 (eq_attr "type" "!mem")) | |
| 38 "slot0+slot1+slot2") | |
| 39 | |
| 40 (define_insn_reservation "stallInsn" 2 | |
| 41 (and (eq_attr "schedType" "space") | |
| 42 (eq_attr "type" "mem")) | |
| 43 "slot0+slot1+slot2") |