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1 /****************************************************************************
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2 * *
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3 * GNAT COMPILER COMPONENTS *
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4 * *
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5 * S I G T R A M P - T A R G E T *
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6 * *
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7 * Asm Implementation Include File *
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8 * *
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131
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9 * Copyright (C) 2011-2018, Free Software Foundation, Inc. *
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111
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10 * *
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11 * GNAT is free software; you can redistribute it and/or modify it under *
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12 * terms of the GNU General Public License as published by the Free Soft- *
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13 * ware Foundation; either version 3, or (at your option) any later ver- *
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14 * sion. GNAT is distributed in the hope that it will be useful, but WITH- *
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15 * OUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY *
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16 * or FITNESS FOR A PARTICULAR PURPOSE. *
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17 * *
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18 * As a special exception under Section 7 of GPL version 3, you are granted *
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19 * additional permissions described in the GCC Runtime Library Exception, *
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20 * version 3.1, as published by the Free Software Foundation. *
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21 * *
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22 * In particular, you can freely distribute your programs built with the *
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23 * GNAT Pro compiler, including any required library run-time units, using *
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24 * any licensing terms of your choosing. See the AdaCore Software License *
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25 * for full details. *
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26 * *
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27 * GNAT was originally developed by the GNAT team at New York University. *
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28 * Extensive contributions were provided by Ada Core Technologies Inc. *
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29 * *
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30 ****************************************************************************/
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31
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32 /***************************************************************
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33 * VxWorks target specific part of the __gnat_sigtramp service *
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34 ***************************************************************/
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35
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36 /* Note: This target specific part is kept in a separate file to avoid
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37 duplication of its code for the vxworks and vxworks-vxsim asm
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38 implementation files. */
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39
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40 /* ---------------------------
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41 -- And now the asm stubs --
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42 ---------------------------
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43
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44 They all have a common structure with blocks of asm sequences queued one
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45 after the others. Typically:
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46
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47 SYMBOL_START
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48
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49 CFI_DIRECTIVES
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50 CFI_DEF_CFA,
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51 CFI_COMMON_REGISTERS,
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52 ...
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53
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54 STUB_BODY
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55 asm code to establish frame, setup the cfa reg value,
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56 call the real signal handler, ...
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57
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58 SYMBOL_END
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59 */
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60
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61 /*--------------------------------
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62 -- Misc constants and helpers --
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63 -------------------------------- */
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64
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65 /* asm string construction helpers. */
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66
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67 #define STR(TEXT) #TEXT
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68 /* stringify expanded TEXT, surrounding it with double quotes. */
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69
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70 #define S(E) STR(E)
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71 /* stringify E, which will resolve as text but may contain macros
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72 still to be expanded. */
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73
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74 /* asm (TEXT) outputs <tab>TEXT. These facilitate the output of
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75 multine contents: */
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76 #define TAB(S) "\t" S
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77 #define CR(S) S "\n"
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78
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79 #undef TCR
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80 #define TCR(S) TAB(CR(S))
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81
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82 /* REGNO constants, dwarf column numbers for registers of interest. */
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83
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84 #if defined (__PPC__)
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85
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86 #define REGNO_LR 65
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87 #define REGNO_CTR 66
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88 #define REGNO_CR 70
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89 #define REGNO_XER 76
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90 #define REGNO_GR(N) (N)
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91
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92 #define REGNO_PC 67 /* ARG_POINTER_REGNUM */
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93
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94 #define FUNCTION "@function"
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95
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131
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96 #elif defined (ARMEL)
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111
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97
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98 #define REGNO_G_REG_OFFSET(N) (N)
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99
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131
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100 #define FUNCTION "%function"
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101
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102 #ifdef __aarch64__
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103 #define REGNO_PC_OFFSET 80 /* aka V16, a scratch register */
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104 #else
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105 #define REGNO_PC_OFFSET 15 /* PC_REGNUM */
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106 #endif
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111
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107
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131
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108 /* Mapping of CFI Column, Gcc Regno, Signal context offset for _LP64
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109
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110 Name CFI GCC SCTX
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111 G0-G30 0-30 0-30 0-30
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112 SP 31 31 31
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113 PC 32
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114 V0-V31 64-95 32-63 N/A
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115
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116 */
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111
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117
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118 #elif defined (i386)
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119
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120 /* These are the cfi colunm numbers */
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121
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122 #define REGNO_EDI 7
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123 #define REGNO_ESI 6
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124 #define REGNO_EBP 5
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125 #define REGNO_ESP 4
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126 #define REGNO_EBX 3
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127 #define REGNO_EDX 2
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128 #define REGNO_ECX 1
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129 #define REGNO_EAX 0
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130 #define REGNO_EFLAGS 9
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131 #define REGNO_SET_PC 8 /* aka %eip */
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132
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133 #define FUNCTION "@function"
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134
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135 /* Mapping of CFI Column, Gcc Regno, Signal context offset for 32bit
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136
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137 Name CFI GCC SCTX
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138 %eax 0 0 7
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139 %ecx 1 2 6
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140 %edx 2 1 5
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141 %ebx 3 3 4
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142 %esp 4 7 3
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143 %ebp 5 6 2
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144 %esi 6 4 1
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145 %edi 7 5 0
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146 %eflags 9 17 8
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147 %eip 8 n/a 9
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148
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149
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150 In general:
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151 There is no unique numbering for the x86 architecture. It's parameterized
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152 by DWARF_FRAME_REGNUM, which is DBX_REGISTER_NUMBER except for Windows, and
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153 the latter depends on the platform.
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154 */
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155
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156 #elif defined (__x86_64__)
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157
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158 /* These are the cfi colunm numbers */
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159
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160 #define REGNO_RAX 0
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161 #define REGNO_RDX 1
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162 #define REGNO_RCX 2
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163 #define REGNO_RBX 3
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164 #define REGNO_RSI 4
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165 #define REGNO_RDI 5
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166 #define REGNO_RBP 6
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167 #define REGNO_RSP 7
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168 #define REGNO_R8 8
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169 #define REGNO_R9 9
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170 #define REGNO_R10 10
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171 #define REGNO_R11 11
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172 #define REGNO_R12 12
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173 #define REGNO_R13 13
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174 #define REGNO_R14 14
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175 #define REGNO_R15 15
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176 #define REGNO_RPC 16 /* aka %rip */
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177 #define REGNO_EFLAGS 49
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178 #define REGNO_FS 54
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179
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180 #define FUNCTION "@function"
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181
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182 #else
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183 Not_implemented;
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184 #endif /* REGNO constants */
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185
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186
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187 /*------------------------------
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188 -- Stub construction blocks --
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189 ------------------------------ */
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190
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191 /* CFA setup block
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192 ---------------
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193 Only non-volatile registers are suitable for a CFA base. These are the
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194 only ones we can expect to be able retrieve from the unwinding context
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195 while walking up the chain, saved by at least the bottom-most exception
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196 propagation services. We set a non-volatile register to the value we
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197 need in the stub body that follows. */
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198
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199 #if defined (__PPC__)
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200
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201 /* Use r15 for PPC. Note that r14 is inappropriate here, even though it
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202 is non-volatile according to the ABI, because GCC uses it as an extra
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203 SCRATCH on SPE targets. */
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204
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205 #define CFA_REG 15
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206
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131
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207 #elif defined (ARMEL)
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111
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208
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131
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209 #ifdef __aarch64__
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210 #define CFA_REG 19
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211 #else
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111
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212 /* Use r8 for ARM. Any of r4-r8 should work. */
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213 #define CFA_REG 8
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131
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214 #endif
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111
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215
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216 #elif defined (i386)
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217
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218 #define CFA_REG 7
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219
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220 #elif defined (__x86_64__)
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221
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222 /* R15 register */
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223 #define CFA_REG 15
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224
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225 #else
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226 Not_implemented;
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227 #endif /* CFA setup block */
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228
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229 #define CFI_DEF_CFA \
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230 CR(".cfi_def_cfa " S(CFA_REG) ", 0")
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231
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232 /* Register location blocks
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233 ------------------------
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234 Rules to find registers of interest from the CFA. This should comprise
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235 all the non-volatile registers relevant to the interrupted context.
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236
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237 Note that we include r1 in this set, unlike the libgcc unwinding
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238 fallbacks. This is useful for fallbacks to allow the use of r1 in CFI
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239 expressions and the absence of rule for r1 gets compensated by using the
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240 target CFA instead. We don't need the expression facility here and
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241 setup a fake CFA to allow very simple offset expressions, so having a
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242 rule for r1 is the proper thing to do. We for sure have observed
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243 crashes in some cases without it. */
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244
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245 #if defined (__PPC__)
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246
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247 #define COMMON_CFI(REG) \
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248 ".cfi_offset " S(REGNO_##REG) "," S(REG_SET_##REG)
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249
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250 #define CFI_COMMON_REGS \
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251 CR("# CFI for common registers\n") \
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252 TCR(COMMON_CFI(GR(0))) \
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253 TCR(COMMON_CFI(GR(1))) \
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254 TCR(COMMON_CFI(GR(2))) \
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255 TCR(COMMON_CFI(GR(3))) \
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256 TCR(COMMON_CFI(GR(4))) \
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257 TCR(COMMON_CFI(GR(5))) \
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258 TCR(COMMON_CFI(GR(6))) \
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259 TCR(COMMON_CFI(GR(7))) \
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260 TCR(COMMON_CFI(GR(8))) \
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261 TCR(COMMON_CFI(GR(9))) \
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262 TCR(COMMON_CFI(GR(10))) \
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263 TCR(COMMON_CFI(GR(11))) \
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264 TCR(COMMON_CFI(GR(12))) \
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265 TCR(COMMON_CFI(GR(13))) \
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266 TCR(COMMON_CFI(GR(14))) \
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267 TCR(COMMON_CFI(GR(15))) \
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268 TCR(COMMON_CFI(GR(16))) \
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269 TCR(COMMON_CFI(GR(17))) \
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270 TCR(COMMON_CFI(GR(18))) \
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271 TCR(COMMON_CFI(GR(19))) \
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272 TCR(COMMON_CFI(GR(20))) \
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273 TCR(COMMON_CFI(GR(21))) \
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274 TCR(COMMON_CFI(GR(22))) \
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275 TCR(COMMON_CFI(GR(23))) \
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276 TCR(COMMON_CFI(GR(24))) \
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277 TCR(COMMON_CFI(GR(25))) \
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278 TCR(COMMON_CFI(GR(26))) \
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279 TCR(COMMON_CFI(GR(27))) \
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280 TCR(COMMON_CFI(GR(28))) \
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281 TCR(COMMON_CFI(GR(29))) \
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282 TCR(COMMON_CFI(GR(30))) \
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283 TCR(COMMON_CFI(GR(31))) \
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284 TCR(COMMON_CFI(LR)) \
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285 TCR(COMMON_CFI(CR)) \
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286 TCR(COMMON_CFI(CTR)) \
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287 TCR(COMMON_CFI(XER)) \
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288 TCR(COMMON_CFI(PC)) \
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289 TCR(".cfi_return_column " S(REGNO_PC))
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290
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291 /* Trampoline body block
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292 --------------------- */
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293
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294 #if !defined (__PPC64__)
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295 #define SIGTRAMP_BODY \
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296 CR("") \
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297 TCR("# Allocate frame and save the non-volatile") \
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298 TCR("# registers we're going to modify") \
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299 TCR("stwu %r1,-16(%r1)") \
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300 TCR("mflr %r0") \
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301 TCR("stw %r0,20(%r1)") \
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302 TCR("stw %r" S(CFA_REG) ",8(%r1)") \
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303 TCR("") \
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304 TCR("# Setup CFA_REG = context, which we'll retrieve as our CFA value") \
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305 TCR("mr %r" S(CFA_REG) ", %r7") \
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306 TCR("") \
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307 TCR("# Call the real handler. The signo, siginfo and sigcontext") \
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308 TCR("# arguments are the same as those we received in r3, r4 and r5") \
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309 TCR("mtctr %r6") \
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310 TCR("bctrl") \
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311 TCR("") \
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312 TCR("# Restore our callee-saved items, release our frame and return") \
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313 TCR("lwz %r" S(CFA_REG) ",8(%r1)") \
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314 TCR("lwz %r0,20(%r1)") \
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315 TCR("mtlr %r0") \
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316 TCR("") \
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317 TCR("addi %r1,%r1,16") \
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318 TCR("blr")
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319 #else
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320 #define SIGTRAMP_BODY \
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321 CR("") \
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322 TCR("0:") \
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323 TCR("addis 2,12,.TOC.-0@ha") \
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324 TCR("addi 2,2,.TOC.-0@l") \
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325 TCR(".localentry __gnat_sigtramp_common,.-__gnat_sigtramp_common") \
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326 TCR("# Allocate frame and save the non-volatile") \
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327 TCR("# registers we're going to modify") \
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328 TCR("mflr %r0") \
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329 TCR("std %r0,16(%r1)") \
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330 TCR("stdu %r1,-32(%r1)") \
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331 TCR("std %r2,24(%r1)") \
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332 TCR("std %r" S(CFA_REG) ",8(%r1)") \
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333 TCR("") \
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334 TCR("# Setup CFA_REG = context, which we'll retrieve as our CFA value") \
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335 TCR("mr %r" S(CFA_REG) ", %r7") \
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336 TCR("") \
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337 TCR("# Call the real handler. The signo, siginfo and sigcontext") \
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338 TCR("# arguments are the same as those we received in r3, r4 and r5") \
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339 TCR("mr %r12,%r6") \
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340 TCR("mtctr %r6") \
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341 TCR("bctrl") \
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342 TCR("") \
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343 TCR("# Restore our callee-saved items, release our frame and return") \
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344 TCR("ld %r" S(CFA_REG) ",8(%r1)") \
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345 TCR("ld %r2,24(%r1)") \
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346 TCR("addi %r1,%r1,32") \
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347 TCR("ld %r0,16(%r1)") \
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348 TCR("mtlr %r0") \
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349 TCR("blr")
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350 #endif
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351
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131
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352 #elif defined (ARMEL)
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111
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353
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354 #define COMMON_CFI(REG) \
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355 ".cfi_offset " S(REGNO_##REG) "," S(REG_SET_##REG)
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356
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131
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357 #ifdef __aarch64__
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358 #define CFI_COMMON_REGS \
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359 CR("# CFI for common registers\n") \
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360 TCR(COMMON_CFI(G_REG_OFFSET(0))) \
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361 TCR(COMMON_CFI(G_REG_OFFSET(1))) \
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362 TCR(COMMON_CFI(G_REG_OFFSET(2))) \
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363 TCR(COMMON_CFI(G_REG_OFFSET(3))) \
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364 TCR(COMMON_CFI(G_REG_OFFSET(4))) \
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365 TCR(COMMON_CFI(G_REG_OFFSET(5))) \
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366 TCR(COMMON_CFI(G_REG_OFFSET(6))) \
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367 TCR(COMMON_CFI(G_REG_OFFSET(7))) \
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368 TCR(COMMON_CFI(G_REG_OFFSET(8))) \
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369 TCR(COMMON_CFI(G_REG_OFFSET(9))) \
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370 TCR(COMMON_CFI(G_REG_OFFSET(10))) \
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371 TCR(COMMON_CFI(G_REG_OFFSET(11))) \
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372 TCR(COMMON_CFI(G_REG_OFFSET(12))) \
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373 TCR(COMMON_CFI(G_REG_OFFSET(13))) \
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374 TCR(COMMON_CFI(G_REG_OFFSET(14))) \
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375 TCR(COMMON_CFI(G_REG_OFFSET(15))) \
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376 TCR(COMMON_CFI(G_REG_OFFSET(16))) \
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377 TCR(COMMON_CFI(G_REG_OFFSET(17))) \
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378 TCR(COMMON_CFI(G_REG_OFFSET(18))) \
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379 TCR(COMMON_CFI(G_REG_OFFSET(19))) \
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380 TCR(COMMON_CFI(G_REG_OFFSET(20))) \
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381 TCR(COMMON_CFI(G_REG_OFFSET(21))) \
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382 TCR(COMMON_CFI(G_REG_OFFSET(22))) \
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383 TCR(COMMON_CFI(G_REG_OFFSET(23))) \
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384 TCR(COMMON_CFI(G_REG_OFFSET(24))) \
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385 TCR(COMMON_CFI(G_REG_OFFSET(25))) \
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386 TCR(COMMON_CFI(G_REG_OFFSET(26))) \
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387 TCR(COMMON_CFI(G_REG_OFFSET(27))) \
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388 TCR(COMMON_CFI(G_REG_OFFSET(28))) \
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389 TCR(COMMON_CFI(G_REG_OFFSET(29))) \
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390 TCR(COMMON_CFI(G_REG_OFFSET(30))) \
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145
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391 TCR(COMMON_CFI(G_REG_OFFSET(31))) \
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131
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392 TCR(COMMON_CFI(PC_OFFSET)) \
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393 TCR(".cfi_return_column " S(REGNO_PC_OFFSET))
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394 #else
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111
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395 #define CFI_COMMON_REGS \
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396 CR("# CFI for common registers\n") \
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397 TCR(COMMON_CFI(G_REG_OFFSET(0))) \
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398 TCR(COMMON_CFI(G_REG_OFFSET(1))) \
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399 TCR(COMMON_CFI(G_REG_OFFSET(2))) \
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400 TCR(COMMON_CFI(G_REG_OFFSET(3))) \
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401 TCR(COMMON_CFI(G_REG_OFFSET(4))) \
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402 TCR(COMMON_CFI(G_REG_OFFSET(5))) \
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403 TCR(COMMON_CFI(G_REG_OFFSET(6))) \
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404 TCR(COMMON_CFI(G_REG_OFFSET(7))) \
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405 TCR(COMMON_CFI(G_REG_OFFSET(8))) \
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406 TCR(COMMON_CFI(G_REG_OFFSET(9))) \
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407 TCR(COMMON_CFI(G_REG_OFFSET(10))) \
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408 TCR(COMMON_CFI(G_REG_OFFSET(11))) \
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409 TCR(COMMON_CFI(G_REG_OFFSET(12))) \
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410 TCR(COMMON_CFI(G_REG_OFFSET(13))) \
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411 TCR(COMMON_CFI(G_REG_OFFSET(14))) \
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412 TCR(COMMON_CFI(PC_OFFSET)) \
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413 TCR(".cfi_return_column " S(REGNO_PC_OFFSET))
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131
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414 #endif
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111
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415
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416 /* Trampoline body block
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417 --------------------- */
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131
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418 #ifdef __aarch64__
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419 #define SIGTRAMP_BODY \
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420 CR("") \
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421 TCR("# Allocate the frame (16bytes aligned) and push FP and LR") \
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422 TCR("stp x29, x30, [sp, #-32]!") \
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423 TCR("add x29, sp, 0") \
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424 TCR("# Store register used to hold the CFA on stack (pro forma)") \
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425 TCR("str x" S(CFA_REG) ", [sp, 16]") \
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426 TCR("# Set the CFA reg from the 5th arg") \
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427 TCR("mov x" S(CFA_REG) ", x4") \
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428 TCR("# Call the handler") \
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429 TCR("blr x3") \
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430 TCR("# Release our frame and return (should never get here!).") \
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431 TCR("ldr x" S(CFA_REG) ", [sp, 16]") \
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432 TCR("ldp x29, x30, [sp], 32") \
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433 TCR("ret")
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434 #else
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111
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435 #define SIGTRAMP_BODY \
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436 CR("") \
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437 TCR("# Allocate frame and save the non-volatile") \
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438 TCR("# registers we're going to modify") \
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439 TCR("mov ip, sp") \
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440 TCR("stmfd sp!, {r"S(CFA_REG)", fp, ip, lr, pc}") \
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441 TCR("# Setup CFA_REG = context, which we'll retrieve as our CFA value") \
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442 TCR("ldr r"S(CFA_REG)", [ip]") \
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443 TCR("") \
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444 TCR("# Call the real handler. The signo, siginfo and sigcontext") \
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445 TCR("# arguments are the same as those we received in r0, r1 and r2") \
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446 TCR("sub fp, ip, #4") \
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447 TCR("blx r3") \
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448 TCR("# Restore our callee-saved items, release our frame and return") \
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449 TCR("ldmfd sp, {r"S(CFA_REG)", fp, sp, pc}")
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131
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450 #endif
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111
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451
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452 #elif defined (i386)
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453
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454 #if CPU == SIMNT || CPU == SIMPENTIUM || CPU == SIMLINUX
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455 #define COMMON_CFI(REG) \
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456 ".cfi_offset " S(REGNO_##REG) "," S(REG_SET_##REG)
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457 #else
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458 #define COMMON_CFI(REG) \
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459 ".cfi_offset " S(REGNO_##REG) "," S(REG_##REG)
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460 #endif
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461
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462 #define PC_CFI(REG) \
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463 ".cfi_offset " S(REGNO_##REG) "," S(REG_##REG)
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464
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465 #define CFI_COMMON_REGS \
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466 CR("# CFI for common registers\n") \
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467 TCR(COMMON_CFI(EDI)) \
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468 TCR(COMMON_CFI(ESI)) \
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469 TCR(COMMON_CFI(EBP)) \
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470 TCR(COMMON_CFI(ESP)) \
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471 TCR(COMMON_CFI(EBX)) \
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472 TCR(COMMON_CFI(EDX)) \
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473 TCR(COMMON_CFI(ECX)) \
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474 TCR(COMMON_CFI(EAX)) \
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475 TCR(COMMON_CFI(EFLAGS)) \
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476 TCR(PC_CFI(SET_PC)) \
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477 TCR(".cfi_return_column " S(REGNO_SET_PC))
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478
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479 /* Trampoline body block
|
|
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480 --------------------- */
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481
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482 #define SIGTRAMP_BODY \
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483 CR("") \
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484 TCR("# Allocate frame and save the non-volatile") \
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485 TCR("# registers we're going to modify") \
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486 TCR("pushl %ebp") \
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487 TCR("movl %esp, %ebp") \
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488 TCR("pushl %edi") \
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489 TCR("subl $24, %esp") \
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490 TCR("# Setup CFA_REG = context, which we'll retrieve as our CFA value") \
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491 TCR("movl 24(%ebp), %edi") \
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492 TCR("# Call the real handler. The signo, siginfo and sigcontext") \
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493 TCR("# arguments are the same as those we received") \
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494 TCR("movl 16(%ebp), %eax") \
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495 TCR("movl %eax, 8(%esp)") \
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496 TCR("movl 12(%ebp), %eax") \
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497 TCR("movl %eax, 4(%esp)") \
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498 TCR("movl 8(%ebp), %eax") \
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499 TCR("movl %eax, (%esp)") \
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500 TCR("call *20(%ebp)") \
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501 TCR("# Restore our callee-saved items, release our frame and return") \
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|
502 TCR("popl %edi") \
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503 TCR("leave") \
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504 TCR("ret")
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505
|
|
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506 #elif defined (__x86_64__)
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507
|
|
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508 #define COMMON_CFI(REG) \
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509 ".cfi_offset " S(REGNO_##REG) "," S(REG_##REG)
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510
|
|
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511 #define CFI_COMMON_REGS \
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512 CR("# CFI for common registers\n") \
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513 TCR(COMMON_CFI(R15)) \
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514 TCR(COMMON_CFI(R14)) \
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515 TCR(COMMON_CFI(R13)) \
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516 TCR(COMMON_CFI(R12)) \
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517 TCR(COMMON_CFI(R11)) \
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518 TCR(COMMON_CFI(R10)) \
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519 TCR(COMMON_CFI(R9)) \
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520 TCR(COMMON_CFI(R8)) \
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521 TCR(COMMON_CFI(RDI)) \
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522 TCR(COMMON_CFI(RSI)) \
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523 TCR(COMMON_CFI(RBP)) \
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524 TCR(COMMON_CFI(RSP)) \
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525 TCR(COMMON_CFI(RBX)) \
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526 TCR(COMMON_CFI(RDX)) \
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527 TCR(COMMON_CFI(RCX)) \
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528 TCR(COMMON_CFI(RAX)) \
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|
|
529 TCR(COMMON_CFI(RPC)) \
|
|
|
530 TCR(".cfi_return_column " S(REGNO_RPC))
|
|
|
531
|
|
|
532 /* Trampoline body block
|
|
|
533 --------------------- */
|
|
|
534
|
|
|
535 #define SIGTRAMP_BODY \
|
|
|
536 CR("") \
|
|
|
537 TCR("# Allocate frame and save the non-volatile") \
|
|
|
538 TCR("# registers we're going to modify") \
|
|
|
539 TCR("subq $8, %rsp") \
|
|
|
540 TCR("# Setup CFA_REG = context, which we'll retrieve as our CFA value") \
|
|
|
541 TCR("movq %r8, %r15") \
|
|
|
542 TCR("# Call the real handler. The signo, siginfo and sigcontext") \
|
|
|
543 TCR("# arguments are the same as those we received") \
|
|
|
544 TCR("call *%rcx") \
|
|
|
545 TCR("# This part should never be executed") \
|
|
|
546 TCR("addq $8, %rsp") \
|
|
|
547 TCR("ret")
|
|
|
548
|
|
|
549 #else
|
|
|
550 Not_implemented;
|
|
|
551 #endif /* CFI_COMMON_REGS and SIGTRAMP_BODY */
|
|
|
552
|
|
|
553 /* Symbol definition block
|
|
|
554 ----------------------- */
|
|
|
555
|
|
|
556 #ifdef __x86_64__
|
|
|
557 #define FUNC_ALIGN TCR(".p2align 4,,15")
|
|
|
558 #else
|
|
|
559 #define FUNC_ALIGN
|
|
|
560 #endif
|
|
|
561
|
|
|
562 #define SIGTRAMP_START(SYM) \
|
|
|
563 CR("# " S(SYM) " cfi trampoline") \
|
|
|
564 TCR(".type " S(SYM) ", "FUNCTION) \
|
|
|
565 CR("") \
|
|
|
566 FUNC_ALIGN \
|
|
|
567 CR(S(SYM) ":") \
|
|
|
568 TCR(".cfi_startproc") \
|
|
|
569 TCR(".cfi_signal_frame")
|
|
|
570
|
|
|
571 /* Symbol termination block
|
|
|
572 ------------------------ */
|
|
|
573
|
|
|
574 #define SIGTRAMP_END(SYM) \
|
|
|
575 CR(".cfi_endproc") \
|
|
|
576 TCR(".size " S(SYM) ", .-" S(SYM))
|
|
|
577
|
|
|
578 /*----------------------------
|
|
|
579 -- And now, the real code --
|
|
|
580 ---------------------------- */
|
|
|
581
|
|
|
582 /* Text section start. The compiler isn't aware of that switch. */
|
|
|
583
|
|
|
584 asm (".text\n"
|
|
|
585 TCR(".align 2"));
|
