Mercurial > hg > CbC > CbC_gcc
annotate gcc/caller-save.c @ 158:494b0b89df80 default tip
...
| author | Shinji KONO <kono@ie.u-ryukyu.ac.jp> |
|---|---|
| date | Mon, 25 May 2020 18:13:55 +0900 |
| parents | 1830386684a0 |
| children |
| rev | line source |
|---|---|
| 0 | 1 /* Save and restore call-clobbered registers which are live across a call. |
| 145 | 2 Copyright (C) 1989-2020 Free Software Foundation, Inc. |
| 0 | 3 |
| 4 This file is part of GCC. | |
| 5 | |
| 6 GCC is free software; you can redistribute it and/or modify it under | |
| 7 the terms of the GNU General Public License as published by the Free | |
| 8 Software Foundation; either version 3, or (at your option) any later | |
| 9 version. | |
| 10 | |
| 11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY | |
| 12 WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
| 13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
| 14 for more details. | |
| 15 | |
| 16 You should have received a copy of the GNU General Public License | |
| 17 along with GCC; see the file COPYING3. If not see | |
| 18 <http://www.gnu.org/licenses/>. */ | |
| 19 | |
| 20 #include "config.h" | |
| 21 #include "system.h" | |
| 22 #include "coretypes.h" | |
| 111 | 23 #include "backend.h" |
| 0 | 24 #include "rtl.h" |
| 111 | 25 #include "tree.h" |
| 26 #include "predict.h" | |
|
63
b7f97abdc517
update gcc from gcc-4.5.0 to gcc-4.6
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
55
diff
changeset
|
27 #include "df.h" |
| 111 | 28 #include "memmodel.h" |
| 29 #include "tm_p.h" | |
| 30 #include "insn-config.h" | |
| 31 #include "regs.h" | |
| 32 #include "emit-rtl.h" | |
| 33 #include "recog.h" | |
| 0 | 34 #include "reload.h" |
| 111 | 35 #include "alias.h" |
| 0 | 36 #include "addresses.h" |
| 111 | 37 #include "dumpfile.h" |
| 38 #include "rtl-iter.h" | |
| 39 #include "target.h" | |
| 145 | 40 #include "function-abi.h" |
| 0 | 41 |
| 42 #define MOVE_MAX_WORDS (MOVE_MAX / UNITS_PER_WORD) | |
| 43 | |
|
67
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
44 #define regno_save_mode \ |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
45 (this_target_reload->x_regno_save_mode) |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
46 #define cached_reg_save_code \ |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
47 (this_target_reload->x_cached_reg_save_code) |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
48 #define cached_reg_restore_code \ |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
49 (this_target_reload->x_cached_reg_restore_code) |
| 0 | 50 |
| 51 /* For each hard register, a place on the stack where it can be saved, | |
| 52 if needed. */ | |
| 53 | |
| 54 static rtx | |
| 55 regno_save_mem[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1]; | |
| 56 | |
| 57 /* The number of elements in the subsequent array. */ | |
| 58 static int save_slots_num; | |
| 59 | |
| 60 /* Allocated slots so far. */ | |
| 61 static rtx save_slots[FIRST_PSEUDO_REGISTER]; | |
| 62 | |
| 63 /* Set of hard regs currently residing in save area (during insn scan). */ | |
| 64 | |
| 65 static HARD_REG_SET hard_regs_saved; | |
| 66 | |
| 67 /* Number of registers currently in hard_regs_saved. */ | |
| 68 | |
| 69 static int n_regs_saved; | |
| 70 | |
| 71 /* Computed by mark_referenced_regs, all regs referenced in a given | |
| 72 insn. */ | |
| 73 static HARD_REG_SET referenced_regs; | |
| 74 | |
| 75 | |
| 111 | 76 typedef void refmarker_fn (rtx *loc, machine_mode mode, int hardregno, |
|
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
77 void *mark_arg); |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
78 |
| 111 | 79 static int reg_save_code (int, machine_mode); |
| 80 static int reg_restore_code (int, machine_mode); | |
| 0 | 81 |
| 82 struct saved_hard_reg; | |
| 83 static void initiate_saved_hard_regs (void); | |
| 111 | 84 static void new_saved_hard_reg (int, int); |
| 0 | 85 static void finish_saved_hard_regs (void); |
| 86 static int saved_hard_reg_compare_func (const void *, const void *); | |
| 87 | |
| 88 static void mark_set_regs (rtx, const_rtx, void *); | |
|
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
89 static void mark_referenced_regs (rtx *, refmarker_fn *mark, void *mark_arg); |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
90 static refmarker_fn mark_reg_as_referenced; |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
91 static refmarker_fn replace_reg_with_saved_mem; |
| 145 | 92 static int insert_save (class insn_chain *, int, HARD_REG_SET *, |
| 111 | 93 machine_mode *); |
| 145 | 94 static int insert_restore (class insn_chain *, int, int, int, |
| 111 | 95 machine_mode *); |
| 145 | 96 static class insn_chain *insert_one_insn (class insn_chain *, int, int, |
| 0 | 97 rtx); |
| 98 static void add_stored_regs (rtx, const_rtx, void *); | |
| 99 | |
| 100 | |
| 101 | |
| 102 static GTY(()) rtx savepat; | |
| 103 static GTY(()) rtx restpat; | |
| 104 static GTY(()) rtx test_reg; | |
| 105 static GTY(()) rtx test_mem; | |
| 111 | 106 static GTY(()) rtx_insn *saveinsn; |
| 107 static GTY(()) rtx_insn *restinsn; | |
| 0 | 108 |
| 109 /* Return the INSN_CODE used to save register REG in mode MODE. */ | |
| 110 static int | |
| 111 | 111 reg_save_code (int reg, machine_mode mode) |
| 0 | 112 { |
| 113 bool ok; | |
| 114 if (cached_reg_save_code[reg][mode]) | |
| 115 return cached_reg_save_code[reg][mode]; | |
| 111 | 116 if (!targetm.hard_regno_mode_ok (reg, mode)) |
|
67
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
117 { |
| 111 | 118 /* Depending on how targetm.hard_regno_mode_ok is defined, range |
| 119 propagation might deduce here that reg >= FIRST_PSEUDO_REGISTER. | |
| 120 So the assert below silences a warning. */ | |
|
67
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
121 gcc_assert (reg < FIRST_PSEUDO_REGISTER); |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
122 cached_reg_save_code[reg][mode] = -1; |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
123 cached_reg_restore_code[reg][mode] = -1; |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
124 return -1; |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
125 } |
| 0 | 126 |
| 127 /* Update the register number and modes of the register | |
| 128 and memory operand. */ | |
| 111 | 129 set_mode_and_regno (test_reg, mode, reg); |
| 0 | 130 PUT_MODE (test_mem, mode); |
| 131 | |
| 132 /* Force re-recognition of the modified insns. */ | |
| 133 INSN_CODE (saveinsn) = -1; | |
| 134 INSN_CODE (restinsn) = -1; | |
| 135 | |
| 136 cached_reg_save_code[reg][mode] = recog_memoized (saveinsn); | |
| 137 cached_reg_restore_code[reg][mode] = recog_memoized (restinsn); | |
| 138 | |
| 139 /* Now extract both insns and see if we can meet their | |
| 111 | 140 constraints. We don't know here whether the save and restore will |
| 141 be in size- or speed-tuned code, so just use the set of enabled | |
| 142 alternatives. */ | |
| 0 | 143 ok = (cached_reg_save_code[reg][mode] != -1 |
| 144 && cached_reg_restore_code[reg][mode] != -1); | |
| 145 if (ok) | |
| 146 { | |
| 147 extract_insn (saveinsn); | |
| 111 | 148 ok = constrain_operands (1, get_enabled_alternatives (saveinsn)); |
| 0 | 149 extract_insn (restinsn); |
| 111 | 150 ok &= constrain_operands (1, get_enabled_alternatives (restinsn)); |
| 0 | 151 } |
| 152 | |
| 153 if (! ok) | |
| 154 { | |
| 155 cached_reg_save_code[reg][mode] = -1; | |
| 156 cached_reg_restore_code[reg][mode] = -1; | |
| 157 } | |
| 158 gcc_assert (cached_reg_save_code[reg][mode]); | |
| 159 return cached_reg_save_code[reg][mode]; | |
| 160 } | |
| 161 | |
| 162 /* Return the INSN_CODE used to restore register REG in mode MODE. */ | |
| 163 static int | |
| 111 | 164 reg_restore_code (int reg, machine_mode mode) |
| 0 | 165 { |
| 166 if (cached_reg_restore_code[reg][mode]) | |
| 167 return cached_reg_restore_code[reg][mode]; | |
| 168 /* Populate our cache. */ | |
| 169 reg_save_code (reg, mode); | |
| 170 return cached_reg_restore_code[reg][mode]; | |
| 171 } | |
| 172 | |
| 173 /* Initialize for caller-save. | |
| 174 | |
| 175 Look at all the hard registers that are used by a call and for which | |
| 176 reginfo.c has not already excluded from being used across a call. | |
| 177 | |
| 178 Ensure that we can find a mode to save the register and that there is a | |
| 179 simple insn to save and restore the register. This latter check avoids | |
| 180 problems that would occur if we tried to save the MQ register of some | |
| 181 machines directly into memory. */ | |
| 182 | |
| 183 void | |
| 184 init_caller_save (void) | |
| 185 { | |
| 186 rtx addr_reg; | |
| 187 int offset; | |
| 188 rtx address; | |
| 189 int i, j; | |
| 190 | |
|
63
b7f97abdc517
update gcc from gcc-4.5.0 to gcc-4.6
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
55
diff
changeset
|
191 if (caller_save_initialized_p) |
|
b7f97abdc517
update gcc from gcc-4.5.0 to gcc-4.6
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
55
diff
changeset
|
192 return; |
|
b7f97abdc517
update gcc from gcc-4.5.0 to gcc-4.6
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
55
diff
changeset
|
193 |
|
b7f97abdc517
update gcc from gcc-4.5.0 to gcc-4.6
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
55
diff
changeset
|
194 caller_save_initialized_p = true; |
|
b7f97abdc517
update gcc from gcc-4.5.0 to gcc-4.6
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
55
diff
changeset
|
195 |
| 0 | 196 /* First find all the registers that we need to deal with and all |
| 197 the modes that they can have. If we can't find a mode to use, | |
| 198 we can't have the register live over calls. */ | |
| 199 | |
| 200 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
| 145 | 201 for (j = 1; j <= MOVE_MAX_WORDS; j++) |
| 202 { | |
| 203 regno_save_mode[i][j] = HARD_REGNO_CALLER_SAVE_MODE (i, j, VOIDmode); | |
| 204 if (regno_save_mode[i][j] == VOIDmode && j == 1) | |
| 205 CLEAR_HARD_REG_BIT (savable_regs, i); | |
| 206 } | |
| 0 | 207 |
| 208 /* The following code tries to approximate the conditions under which | |
| 209 we can easily save and restore a register without scratch registers or | |
| 210 other complexities. It will usually work, except under conditions where | |
| 211 the validity of an insn operand is dependent on the address offset. | |
| 212 No such cases are currently known. | |
| 213 | |
| 214 We first find a typical offset from some BASE_REG_CLASS register. | |
| 215 This address is chosen by finding the first register in the class | |
| 216 and by finding the smallest power of two that is a valid offset from | |
| 217 that register in every mode we will use to save registers. */ | |
| 218 | |
| 219 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
| 220 if (TEST_HARD_REG_BIT | |
| 221 (reg_class_contents | |
| 111 | 222 [(int) base_reg_class (regno_save_mode[i][1], ADDR_SPACE_GENERIC, |
| 223 PLUS, CONST_INT)], i)) | |
| 0 | 224 break; |
| 225 | |
| 226 gcc_assert (i < FIRST_PSEUDO_REGISTER); | |
| 227 | |
| 228 addr_reg = gen_rtx_REG (Pmode, i); | |
| 229 | |
| 230 for (offset = 1 << (HOST_BITS_PER_INT / 2); offset; offset >>= 1) | |
| 231 { | |
| 111 | 232 address = gen_rtx_PLUS (Pmode, addr_reg, gen_int_mode (offset, Pmode)); |
| 0 | 233 |
| 234 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
| 235 if (regno_save_mode[i][1] != VOIDmode | |
| 236 && ! strict_memory_address_p (regno_save_mode[i][1], address)) | |
| 237 break; | |
| 238 | |
| 239 if (i == FIRST_PSEUDO_REGISTER) | |
| 240 break; | |
| 241 } | |
| 242 | |
| 243 /* If we didn't find a valid address, we must use register indirect. */ | |
| 244 if (offset == 0) | |
| 245 address = addr_reg; | |
| 246 | |
| 247 /* Next we try to form an insn to save and restore the register. We | |
| 248 see if such an insn is recognized and meets its constraints. | |
| 249 | |
| 250 To avoid lots of unnecessary RTL allocation, we construct all the RTL | |
| 251 once, then modify the memory and register operands in-place. */ | |
| 252 | |
| 111 | 253 test_reg = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1); |
| 254 test_mem = gen_rtx_MEM (word_mode, address); | |
| 255 savepat = gen_rtx_SET (test_mem, test_reg); | |
| 256 restpat = gen_rtx_SET (test_reg, test_mem); | |
| 0 | 257 |
| 111 | 258 saveinsn = gen_rtx_INSN (VOIDmode, 0, 0, 0, savepat, 0, -1, 0); |
| 259 restinsn = gen_rtx_INSN (VOIDmode, 0, 0, 0, restpat, 0, -1, 0); | |
| 0 | 260 |
| 261 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
| 262 for (j = 1; j <= MOVE_MAX_WORDS; j++) | |
| 263 if (reg_save_code (i,regno_save_mode[i][j]) == -1) | |
| 264 { | |
| 265 regno_save_mode[i][j] = VOIDmode; | |
| 266 if (j == 1) | |
| 145 | 267 CLEAR_HARD_REG_BIT (savable_regs, i); |
| 0 | 268 } |
| 269 } | |
| 270 | |
| 271 | |
| 272 | |
| 273 /* Initialize save areas by showing that we haven't allocated any yet. */ | |
| 274 | |
| 275 void | |
| 276 init_save_areas (void) | |
| 277 { | |
| 278 int i, j; | |
| 279 | |
| 280 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
| 281 for (j = 1; j <= MOVE_MAX_WORDS; j++) | |
| 282 regno_save_mem[i][j] = 0; | |
| 283 save_slots_num = 0; | |
|
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
284 |
| 0 | 285 } |
| 286 | |
| 287 /* The structure represents a hard register which should be saved | |
| 288 through the call. It is used when the integrated register | |
| 289 allocator (IRA) is used and sharing save slots is on. */ | |
| 290 struct saved_hard_reg | |
| 291 { | |
| 292 /* Order number starting with 0. */ | |
| 293 int num; | |
| 294 /* The hard regno. */ | |
| 295 int hard_regno; | |
| 296 /* Execution frequency of all calls through which given hard | |
| 297 register should be saved. */ | |
| 298 int call_freq; | |
| 299 /* Stack slot reserved to save the hard register through calls. */ | |
| 300 rtx slot; | |
| 301 /* True if it is first hard register in the chain of hard registers | |
| 302 sharing the same stack slot. */ | |
| 303 int first_p; | |
| 304 /* Order number of the next hard register structure with the same | |
| 305 slot in the chain. -1 represents end of the chain. */ | |
| 306 int next; | |
| 307 }; | |
| 308 | |
| 309 /* Map: hard register number to the corresponding structure. */ | |
| 310 static struct saved_hard_reg *hard_reg_map[FIRST_PSEUDO_REGISTER]; | |
| 311 | |
| 312 /* The number of all structures representing hard registers should be | |
| 313 saved, in order words, the number of used elements in the following | |
| 314 array. */ | |
| 315 static int saved_regs_num; | |
| 316 | |
| 317 /* Pointers to all the structures. Index is the order number of the | |
| 318 corresponding structure. */ | |
| 319 static struct saved_hard_reg *all_saved_regs[FIRST_PSEUDO_REGISTER]; | |
| 320 | |
| 321 /* First called function for work with saved hard registers. */ | |
| 322 static void | |
| 323 initiate_saved_hard_regs (void) | |
| 324 { | |
| 325 int i; | |
| 326 | |
| 327 saved_regs_num = 0; | |
| 328 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
| 329 hard_reg_map[i] = NULL; | |
| 330 } | |
| 331 | |
| 332 /* Allocate and return new saved hard register with given REGNO and | |
| 333 CALL_FREQ. */ | |
| 111 | 334 static void |
| 0 | 335 new_saved_hard_reg (int regno, int call_freq) |
| 336 { | |
| 337 struct saved_hard_reg *saved_reg; | |
| 338 | |
| 339 saved_reg | |
| 340 = (struct saved_hard_reg *) xmalloc (sizeof (struct saved_hard_reg)); | |
| 341 hard_reg_map[regno] = all_saved_regs[saved_regs_num] = saved_reg; | |
| 342 saved_reg->num = saved_regs_num++; | |
| 343 saved_reg->hard_regno = regno; | |
| 344 saved_reg->call_freq = call_freq; | |
| 345 saved_reg->first_p = FALSE; | |
| 346 saved_reg->next = -1; | |
| 347 } | |
| 348 | |
| 349 /* Free memory allocated for the saved hard registers. */ | |
| 350 static void | |
| 351 finish_saved_hard_regs (void) | |
| 352 { | |
| 353 int i; | |
| 354 | |
| 355 for (i = 0; i < saved_regs_num; i++) | |
| 356 free (all_saved_regs[i]); | |
| 357 } | |
| 358 | |
| 359 /* The function is used to sort the saved hard register structures | |
| 360 according their frequency. */ | |
| 361 static int | |
| 362 saved_hard_reg_compare_func (const void *v1p, const void *v2p) | |
| 363 { | |
| 364 const struct saved_hard_reg *p1 = *(struct saved_hard_reg * const *) v1p; | |
| 365 const struct saved_hard_reg *p2 = *(struct saved_hard_reg * const *) v2p; | |
|
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
366 |
| 0 | 367 if (flag_omit_frame_pointer) |
| 368 { | |
| 369 if (p1->call_freq - p2->call_freq != 0) | |
| 370 return p1->call_freq - p2->call_freq; | |
| 371 } | |
| 372 else if (p2->call_freq - p1->call_freq != 0) | |
| 373 return p2->call_freq - p1->call_freq; | |
| 374 | |
| 375 return p1->num - p2->num; | |
| 376 } | |
| 377 | |
| 378 /* Allocate save areas for any hard registers that might need saving. | |
| 379 We take a conservative approach here and look for call-clobbered hard | |
| 380 registers that are assigned to pseudos that cross calls. This may | |
| 381 overestimate slightly (especially if some of these registers are later | |
| 382 used as spill registers), but it should not be significant. | |
| 383 | |
| 384 For IRA we use priority coloring to decrease stack slots needed for | |
| 385 saving hard registers through calls. We build conflicts for them | |
| 386 to do coloring. | |
| 387 | |
| 388 Future work: | |
| 389 | |
| 390 In the fallback case we should iterate backwards across all possible | |
| 391 modes for the save, choosing the largest available one instead of | |
| 392 falling back to the smallest mode immediately. (eg TF -> DF -> SF). | |
| 393 | |
| 394 We do not try to use "move multiple" instructions that exist | |
| 395 on some machines (such as the 68k moveml). It could be a win to try | |
| 396 and use them when possible. The hard part is doing it in a way that is | |
| 397 machine independent since they might be saving non-consecutive | |
| 398 registers. (imagine caller-saving d0,d1,a0,a1 on the 68k) */ | |
| 399 | |
| 400 void | |
| 401 setup_save_areas (void) | |
| 402 { | |
|
67
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
403 int i, j, k, freq; |
| 0 | 404 HARD_REG_SET hard_regs_used; |
|
67
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
405 struct saved_hard_reg *saved_reg; |
| 111 | 406 rtx_insn *insn; |
| 145 | 407 class insn_chain *chain, *next; |
|
67
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
408 unsigned int regno; |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
409 HARD_REG_SET hard_regs_to_save, used_regs, this_insn_sets; |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
410 reg_set_iterator rsi; |
| 0 | 411 |
| 412 CLEAR_HARD_REG_SET (hard_regs_used); | |
|
67
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
413 |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
414 /* Find every CALL_INSN and record which hard regs are live across the |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
415 call into HARD_REG_MAP and HARD_REGS_USED. */ |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
416 initiate_saved_hard_regs (); |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
417 /* Create hard reg saved regs. */ |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
418 for (chain = reload_insn_chain; chain != 0; chain = next) |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
419 { |
| 111 | 420 rtx cheap; |
| 421 | |
|
67
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
422 insn = chain->insn; |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
423 next = chain->next; |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
424 if (!CALL_P (insn) |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
425 || find_reg_note (insn, REG_NORETURN, NULL)) |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
426 continue; |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
427 freq = REG_FREQ_FROM_BB (BLOCK_FOR_INSN (insn)); |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
428 REG_SET_TO_HARD_REG_SET (hard_regs_to_save, |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
429 &chain->live_throughout); |
| 145 | 430 used_regs = insn_callee_abi (insn).full_reg_clobbers (); |
|
67
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
431 |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
432 /* Record all registers set in this call insn. These don't |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
433 need to be saved. N.B. the call insn might set a subreg |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
434 of a multi-hard-reg pseudo; then the pseudo is considered |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
435 live during the call, but the subreg that is set |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
436 isn't. */ |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
437 CLEAR_HARD_REG_SET (this_insn_sets); |
| 145 | 438 note_stores (insn, mark_set_regs, &this_insn_sets); |
|
67
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
439 /* Sibcalls are considered to set the return value. */ |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
440 if (SIBLING_CALL_P (insn) && crtl->return_rtx) |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
441 mark_set_regs (crtl->return_rtx, NULL_RTX, &this_insn_sets); |
| 0 | 442 |
| 145 | 443 used_regs &= ~(fixed_reg_set | this_insn_sets); |
| 444 hard_regs_to_save &= used_regs & savable_regs; | |
|
67
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
445 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
446 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno)) |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
447 { |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
448 if (hard_reg_map[regno] != NULL) |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
449 hard_reg_map[regno]->call_freq += freq; |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
450 else |
| 111 | 451 new_saved_hard_reg (regno, freq); |
|
67
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
452 SET_HARD_REG_BIT (hard_regs_used, regno); |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
453 } |
| 111 | 454 cheap = find_reg_note (insn, REG_RETURNED, NULL); |
| 455 if (cheap) | |
| 456 cheap = XEXP (cheap, 0); | |
|
67
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
457 /* Look through all live pseudos, mark their hard registers. */ |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
458 EXECUTE_IF_SET_IN_REG_SET |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
459 (&chain->live_throughout, FIRST_PSEUDO_REGISTER, regno, rsi) |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
460 { |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
461 int r = reg_renumber[regno]; |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
462 int bound; |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
463 |
| 111 | 464 if (r < 0 || regno_reg_rtx[regno] == cheap) |
|
67
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
465 continue; |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
466 |
| 111 | 467 bound = r + hard_regno_nregs (r, PSEUDO_REGNO_MODE (regno)); |
|
67
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
468 for (; r < bound; r++) |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
469 if (TEST_HARD_REG_BIT (used_regs, r)) |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
470 { |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
471 if (hard_reg_map[r] != NULL) |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
472 hard_reg_map[r]->call_freq += freq; |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
473 else |
| 111 | 474 new_saved_hard_reg (r, freq); |
|
67
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
475 SET_HARD_REG_BIT (hard_regs_to_save, r); |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
476 SET_HARD_REG_BIT (hard_regs_used, r); |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
477 } |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
478 } |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
479 } |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
480 |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
481 /* If requested, figure out which hard regs can share save slots. */ |
| 0 | 482 if (optimize && flag_ira_share_save_slots) |
| 483 { | |
|
67
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
484 rtx slot; |
| 0 | 485 char *saved_reg_conflicts; |
|
67
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
486 int next_k; |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
487 struct saved_hard_reg *saved_reg2, *saved_reg3; |
| 0 | 488 int call_saved_regs_num; |
| 489 struct saved_hard_reg *call_saved_regs[FIRST_PSEUDO_REGISTER]; | |
| 490 int best_slot_num; | |
| 491 int prev_save_slots_num; | |
| 492 rtx prev_save_slots[FIRST_PSEUDO_REGISTER]; | |
|
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
493 |
| 0 | 494 /* Find saved hard register conflicts. */ |
| 495 saved_reg_conflicts = (char *) xmalloc (saved_regs_num * saved_regs_num); | |
| 496 memset (saved_reg_conflicts, 0, saved_regs_num * saved_regs_num); | |
| 497 for (chain = reload_insn_chain; chain != 0; chain = next) | |
| 498 { | |
| 111 | 499 rtx cheap; |
| 0 | 500 call_saved_regs_num = 0; |
| 501 insn = chain->insn; | |
| 502 next = chain->next; | |
|
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
503 if (!CALL_P (insn) |
| 0 | 504 || find_reg_note (insn, REG_NORETURN, NULL)) |
| 505 continue; | |
| 111 | 506 |
| 507 cheap = find_reg_note (insn, REG_RETURNED, NULL); | |
| 508 if (cheap) | |
| 509 cheap = XEXP (cheap, 0); | |
| 510 | |
| 0 | 511 REG_SET_TO_HARD_REG_SET (hard_regs_to_save, |
| 512 &chain->live_throughout); | |
| 145 | 513 used_regs = insn_callee_abi (insn).full_reg_clobbers (); |
| 0 | 514 |
| 515 /* Record all registers set in this call insn. These don't | |
| 516 need to be saved. N.B. the call insn might set a subreg | |
| 517 of a multi-hard-reg pseudo; then the pseudo is considered | |
| 518 live during the call, but the subreg that is set | |
| 519 isn't. */ | |
| 520 CLEAR_HARD_REG_SET (this_insn_sets); | |
| 145 | 521 note_stores (insn, mark_set_regs, &this_insn_sets); |
| 0 | 522 /* Sibcalls are considered to set the return value, |
|
63
b7f97abdc517
update gcc from gcc-4.5.0 to gcc-4.6
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
55
diff
changeset
|
523 compare df-scan.c:df_get_call_refs. */ |
| 0 | 524 if (SIBLING_CALL_P (insn) && crtl->return_rtx) |
| 525 mark_set_regs (crtl->return_rtx, NULL_RTX, &this_insn_sets); | |
| 526 | |
| 145 | 527 used_regs &= ~(fixed_reg_set | this_insn_sets); |
| 528 hard_regs_to_save &= used_regs & savable_regs; | |
| 0 | 529 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) |
| 530 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno)) | |
| 531 { | |
| 532 gcc_assert (hard_reg_map[regno] != NULL); | |
| 533 call_saved_regs[call_saved_regs_num++] = hard_reg_map[regno]; | |
| 534 } | |
| 535 /* Look through all live pseudos, mark their hard registers. */ | |
| 536 EXECUTE_IF_SET_IN_REG_SET | |
| 537 (&chain->live_throughout, FIRST_PSEUDO_REGISTER, regno, rsi) | |
| 538 { | |
| 539 int r = reg_renumber[regno]; | |
| 540 int bound; | |
|
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
541 |
| 111 | 542 if (r < 0 || regno_reg_rtx[regno] == cheap) |
| 0 | 543 continue; |
| 544 | |
| 111 | 545 bound = r + hard_regno_nregs (r, PSEUDO_REGNO_MODE (regno)); |
| 0 | 546 for (; r < bound; r++) |
| 547 if (TEST_HARD_REG_BIT (used_regs, r)) | |
| 548 call_saved_regs[call_saved_regs_num++] = hard_reg_map[r]; | |
| 549 } | |
| 550 for (i = 0; i < call_saved_regs_num; i++) | |
| 551 { | |
| 552 saved_reg = call_saved_regs[i]; | |
| 553 for (j = 0; j < call_saved_regs_num; j++) | |
| 554 if (i != j) | |
| 555 { | |
| 556 saved_reg2 = call_saved_regs[j]; | |
| 557 saved_reg_conflicts[saved_reg->num * saved_regs_num | |
| 558 + saved_reg2->num] | |
| 559 = saved_reg_conflicts[saved_reg2->num * saved_regs_num | |
| 560 + saved_reg->num] | |
| 561 = TRUE; | |
| 562 } | |
| 563 } | |
| 564 } | |
| 565 /* Sort saved hard regs. */ | |
| 566 qsort (all_saved_regs, saved_regs_num, sizeof (struct saved_hard_reg *), | |
| 567 saved_hard_reg_compare_func); | |
| 568 /* Initiate slots available from the previous reload | |
| 569 iteration. */ | |
| 570 prev_save_slots_num = save_slots_num; | |
| 571 memcpy (prev_save_slots, save_slots, save_slots_num * sizeof (rtx)); | |
| 572 save_slots_num = 0; | |
| 573 /* Allocate stack slots for the saved hard registers. */ | |
| 574 for (i = 0; i < saved_regs_num; i++) | |
| 575 { | |
| 576 saved_reg = all_saved_regs[i]; | |
| 577 regno = saved_reg->hard_regno; | |
| 578 for (j = 0; j < i; j++) | |
| 579 { | |
| 580 saved_reg2 = all_saved_regs[j]; | |
| 581 if (! saved_reg2->first_p) | |
| 582 continue; | |
| 583 slot = saved_reg2->slot; | |
| 584 for (k = j; k >= 0; k = next_k) | |
| 585 { | |
| 586 saved_reg3 = all_saved_regs[k]; | |
| 587 next_k = saved_reg3->next; | |
| 588 if (saved_reg_conflicts[saved_reg->num * saved_regs_num | |
| 589 + saved_reg3->num]) | |
| 590 break; | |
| 591 } | |
| 592 if (k < 0 | |
| 131 | 593 && known_le (GET_MODE_SIZE (regno_save_mode[regno][1]), |
| 594 GET_MODE_SIZE (regno_save_mode | |
| 595 [saved_reg2->hard_regno][1]))) | |
| 0 | 596 { |
| 597 saved_reg->slot | |
| 598 = adjust_address_nv | |
| 599 (slot, regno_save_mode[saved_reg->hard_regno][1], 0); | |
| 600 regno_save_mem[regno][1] = saved_reg->slot; | |
| 601 saved_reg->next = saved_reg2->next; | |
| 602 saved_reg2->next = i; | |
| 603 if (dump_file != NULL) | |
| 604 fprintf (dump_file, "%d uses slot of %d\n", | |
| 605 regno, saved_reg2->hard_regno); | |
| 606 break; | |
| 607 } | |
| 608 } | |
| 609 if (j == i) | |
| 610 { | |
| 611 saved_reg->first_p = TRUE; | |
| 612 for (best_slot_num = -1, j = 0; j < prev_save_slots_num; j++) | |
| 613 { | |
| 614 slot = prev_save_slots[j]; | |
| 615 if (slot == NULL_RTX) | |
| 616 continue; | |
| 131 | 617 if (known_le (GET_MODE_SIZE (regno_save_mode[regno][1]), |
| 618 GET_MODE_SIZE (GET_MODE (slot))) | |
| 0 | 619 && best_slot_num < 0) |
| 620 best_slot_num = j; | |
| 621 if (GET_MODE (slot) == regno_save_mode[regno][1]) | |
| 622 break; | |
| 623 } | |
| 624 if (best_slot_num >= 0) | |
| 625 { | |
| 626 saved_reg->slot = prev_save_slots[best_slot_num]; | |
| 627 saved_reg->slot | |
| 628 = adjust_address_nv | |
| 629 (saved_reg->slot, | |
| 630 regno_save_mode[saved_reg->hard_regno][1], 0); | |
| 631 if (dump_file != NULL) | |
| 632 fprintf (dump_file, | |
| 633 "%d uses a slot from prev iteration\n", regno); | |
| 634 prev_save_slots[best_slot_num] = NULL_RTX; | |
| 635 if (best_slot_num + 1 == prev_save_slots_num) | |
| 636 prev_save_slots_num--; | |
| 637 } | |
| 638 else | |
| 639 { | |
| 640 saved_reg->slot | |
| 641 = assign_stack_local_1 | |
| 642 (regno_save_mode[regno][1], | |
|
67
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
643 GET_MODE_SIZE (regno_save_mode[regno][1]), 0, |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
644 ASLK_REDUCE_ALIGN); |
| 0 | 645 if (dump_file != NULL) |
| 646 fprintf (dump_file, "%d uses a new slot\n", regno); | |
| 647 } | |
| 648 regno_save_mem[regno][1] = saved_reg->slot; | |
| 649 save_slots[save_slots_num++] = saved_reg->slot; | |
| 650 } | |
| 651 } | |
| 652 free (saved_reg_conflicts); | |
| 653 finish_saved_hard_regs (); | |
| 654 } | |
| 655 else | |
| 656 { | |
|
67
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
657 /* We are not sharing slots. |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
658 |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
659 Run through all the call-used hard-registers and allocate |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
660 space for each in the caller-save area. Try to allocate space |
| 0 | 661 in a manner which allows multi-register saves/restores to be done. */ |
|
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
662 |
| 0 | 663 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) |
| 664 for (j = MOVE_MAX_WORDS; j > 0; j--) | |
| 665 { | |
| 666 int do_save = 1; | |
|
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
667 |
| 0 | 668 /* If no mode exists for this size, try another. Also break out |
| 669 if we have already saved this hard register. */ | |
| 670 if (regno_save_mode[i][j] == VOIDmode || regno_save_mem[i][1] != 0) | |
| 671 continue; | |
|
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
672 |
| 0 | 673 /* See if any register in this group has been saved. */ |
| 674 for (k = 0; k < j; k++) | |
| 675 if (regno_save_mem[i + k][1]) | |
| 676 { | |
| 677 do_save = 0; | |
| 678 break; | |
| 679 } | |
| 680 if (! do_save) | |
| 681 continue; | |
|
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
682 |
| 0 | 683 for (k = 0; k < j; k++) |
| 684 if (! TEST_HARD_REG_BIT (hard_regs_used, i + k)) | |
| 685 { | |
| 686 do_save = 0; | |
| 687 break; | |
| 688 } | |
| 689 if (! do_save) | |
| 690 continue; | |
|
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
691 |
| 0 | 692 /* We have found an acceptable mode to store in. Since |
| 693 hard register is always saved in the widest mode | |
| 694 available, the mode may be wider than necessary, it is | |
| 695 OK to reduce the alignment of spill space. We will | |
| 696 verify that it is equal to or greater than required | |
| 697 when we restore and save the hard register in | |
| 698 insert_restore and insert_save. */ | |
| 699 regno_save_mem[i][j] | |
| 700 = assign_stack_local_1 (regno_save_mode[i][j], | |
| 701 GET_MODE_SIZE (regno_save_mode[i][j]), | |
|
67
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
702 0, ASLK_REDUCE_ALIGN); |
|
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
703 |
| 0 | 704 /* Setup single word save area just in case... */ |
| 705 for (k = 0; k < j; k++) | |
| 706 /* This should not depend on WORDS_BIG_ENDIAN. | |
| 707 The order of words in regs is the same as in memory. */ | |
| 708 regno_save_mem[i + k][1] | |
| 709 = adjust_address_nv (regno_save_mem[i][j], | |
| 710 regno_save_mode[i + k][1], | |
| 711 k * UNITS_PER_WORD); | |
| 712 } | |
| 713 } | |
| 714 | |
| 715 /* Now loop again and set the alias set of any save areas we made to | |
| 716 the alias set used to represent frame objects. */ | |
| 717 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
| 718 for (j = MOVE_MAX_WORDS; j > 0; j--) | |
| 719 if (regno_save_mem[i][j] != 0) | |
| 720 set_mem_alias_set (regno_save_mem[i][j], get_frame_alias_set ()); | |
| 721 } | |
| 722 | |
| 723 | |
| 724 | |
| 725 /* Find the places where hard regs are live across calls and save them. */ | |
| 726 | |
| 727 void | |
| 728 save_call_clobbered_regs (void) | |
| 729 { | |
| 145 | 730 class insn_chain *chain, *next, *last = NULL; |
| 111 | 731 machine_mode save_mode [FIRST_PSEUDO_REGISTER]; |
| 0 | 732 |
| 733 /* Computed in mark_set_regs, holds all registers set by the current | |
| 734 instruction. */ | |
| 735 HARD_REG_SET this_insn_sets; | |
| 736 | |
| 737 CLEAR_HARD_REG_SET (hard_regs_saved); | |
| 738 n_regs_saved = 0; | |
| 739 | |
| 740 for (chain = reload_insn_chain; chain != 0; chain = next) | |
| 741 { | |
| 111 | 742 rtx_insn *insn = chain->insn; |
| 0 | 743 enum rtx_code code = GET_CODE (insn); |
| 744 | |
| 745 next = chain->next; | |
| 746 | |
| 747 gcc_assert (!chain->is_caller_save_insn); | |
| 748 | |
|
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
749 if (NONDEBUG_INSN_P (insn)) |
| 0 | 750 { |
| 751 /* If some registers have been saved, see if INSN references | |
| 752 any of them. We must restore them before the insn if so. */ | |
| 753 | |
| 754 if (n_regs_saved) | |
| 755 { | |
| 756 int regno; | |
|
67
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
757 HARD_REG_SET this_insn_sets; |
| 0 | 758 |
| 759 if (code == JUMP_INSN) | |
| 760 /* Restore all registers if this is a JUMP_INSN. */ | |
| 145 | 761 referenced_regs = hard_regs_saved; |
| 0 | 762 else |
| 763 { | |
| 764 CLEAR_HARD_REG_SET (referenced_regs); | |
|
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
765 mark_referenced_regs (&PATTERN (insn), |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
766 mark_reg_as_referenced, NULL); |
| 145 | 767 referenced_regs &= hard_regs_saved; |
| 0 | 768 } |
| 769 | |
| 770 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) | |
| 771 if (TEST_HARD_REG_BIT (referenced_regs, regno)) | |
|
67
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
772 regno += insert_restore (chain, 1, regno, MOVE_MAX_WORDS, |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
773 save_mode); |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
774 /* If a saved register is set after the call, this means we no |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
775 longer should restore it. This can happen when parts of a |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
776 multi-word pseudo do not conflict with other pseudos, so |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
777 IRA may allocate the same hard register for both. One may |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
778 be live across the call, while the other is set |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
779 afterwards. */ |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
780 CLEAR_HARD_REG_SET (this_insn_sets); |
| 145 | 781 note_stores (insn, mark_set_regs, &this_insn_sets); |
| 782 hard_regs_saved &= ~this_insn_sets; | |
| 0 | 783 } |
| 784 | |
| 785 if (code == CALL_INSN | |
| 786 && ! SIBLING_CALL_P (insn) | |
| 787 && ! find_reg_note (insn, REG_NORETURN, NULL)) | |
| 788 { | |
| 789 unsigned regno; | |
| 790 HARD_REG_SET hard_regs_to_save; | |
| 791 reg_set_iterator rsi; | |
| 111 | 792 rtx cheap; |
| 793 | |
| 794 cheap = find_reg_note (insn, REG_RETURNED, NULL); | |
| 795 if (cheap) | |
| 796 cheap = XEXP (cheap, 0); | |
| 0 | 797 |
| 798 /* Use the register life information in CHAIN to compute which | |
| 799 regs are live during the call. */ | |
| 800 REG_SET_TO_HARD_REG_SET (hard_regs_to_save, | |
| 801 &chain->live_throughout); | |
| 802 /* Save hard registers always in the widest mode available. */ | |
| 803 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) | |
| 804 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno)) | |
| 805 save_mode [regno] = regno_save_mode [regno][1]; | |
| 806 else | |
| 807 save_mode [regno] = VOIDmode; | |
| 808 | |
| 809 /* Look through all live pseudos, mark their hard registers | |
| 810 and choose proper mode for saving. */ | |
| 811 EXECUTE_IF_SET_IN_REG_SET | |
| 812 (&chain->live_throughout, FIRST_PSEUDO_REGISTER, regno, rsi) | |
| 813 { | |
| 814 int r = reg_renumber[regno]; | |
| 815 int nregs; | |
| 111 | 816 machine_mode mode; |
| 0 | 817 |
| 111 | 818 if (r < 0 || regno_reg_rtx[regno] == cheap) |
| 0 | 819 continue; |
| 111 | 820 nregs = hard_regno_nregs (r, PSEUDO_REGNO_MODE (regno)); |
| 0 | 821 mode = HARD_REGNO_CALLER_SAVE_MODE |
| 822 (r, nregs, PSEUDO_REGNO_MODE (regno)); | |
| 111 | 823 if (partial_subreg_p (save_mode[r], mode)) |
| 0 | 824 save_mode[r] = mode; |
| 825 while (nregs-- > 0) | |
| 826 SET_HARD_REG_BIT (hard_regs_to_save, r + nregs); | |
| 827 } | |
| 828 | |
| 829 /* Record all registers set in this call insn. These don't need | |
| 830 to be saved. N.B. the call insn might set a subreg of a | |
| 831 multi-hard-reg pseudo; then the pseudo is considered live | |
| 832 during the call, but the subreg that is set isn't. */ | |
| 833 CLEAR_HARD_REG_SET (this_insn_sets); | |
| 145 | 834 note_stores (insn, mark_set_regs, &this_insn_sets); |
| 0 | 835 |
| 836 /* Compute which hard regs must be saved before this call. */ | |
| 145 | 837 function_abi callee_abi = insn_callee_abi (insn); |
| 838 hard_regs_to_save &= ~(fixed_reg_set | |
| 839 | this_insn_sets | |
| 840 | hard_regs_saved); | |
| 841 hard_regs_to_save &= savable_regs; | |
| 842 hard_regs_to_save &= callee_abi.full_reg_clobbers (); | |
| 0 | 843 |
| 844 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) | |
| 845 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno)) | |
| 131 | 846 regno += insert_save (chain, regno, |
| 847 &hard_regs_to_save, save_mode); | |
| 0 | 848 |
| 849 /* Must recompute n_regs_saved. */ | |
| 850 n_regs_saved = 0; | |
| 851 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) | |
| 852 if (TEST_HARD_REG_BIT (hard_regs_saved, regno)) | |
| 853 n_regs_saved++; | |
| 111 | 854 |
| 855 if (cheap | |
| 856 && HARD_REGISTER_P (cheap) | |
| 145 | 857 && callee_abi.clobbers_reg_p (GET_MODE (cheap), |
| 858 REGNO (cheap))) | |
| 111 | 859 { |
| 860 rtx dest, newpat; | |
| 861 rtx pat = PATTERN (insn); | |
| 862 if (GET_CODE (pat) == PARALLEL) | |
| 863 pat = XVECEXP (pat, 0, 0); | |
| 864 dest = SET_DEST (pat); | |
| 865 /* For multiple return values dest is PARALLEL. | |
| 866 Currently we handle only single return value case. */ | |
| 867 if (REG_P (dest)) | |
| 868 { | |
| 869 newpat = gen_rtx_SET (cheap, copy_rtx (dest)); | |
| 870 chain = insert_one_insn (chain, 0, -1, newpat); | |
| 871 } | |
| 872 } | |
| 0 | 873 } |
|
63
b7f97abdc517
update gcc from gcc-4.5.0 to gcc-4.6
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
55
diff
changeset
|
874 last = chain; |
| 0 | 875 } |
|
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
876 else if (DEBUG_INSN_P (insn) && n_regs_saved) |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
877 mark_referenced_regs (&PATTERN (insn), |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
878 replace_reg_with_saved_mem, |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
879 save_mode); |
| 0 | 880 |
| 881 if (chain->next == 0 || chain->next->block != chain->block) | |
| 882 { | |
| 883 int regno; | |
| 884 /* At the end of the basic block, we must restore any registers that | |
| 885 remain saved. If the last insn in the block is a JUMP_INSN, put | |
| 886 the restore before the insn, otherwise, put it after the insn. */ | |
| 887 | |
|
67
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
888 if (n_regs_saved |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
889 && DEBUG_INSN_P (insn) |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
890 && last |
|
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
891 && last->block == chain->block) |
|
63
b7f97abdc517
update gcc from gcc-4.5.0 to gcc-4.6
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
55
diff
changeset
|
892 { |
| 111 | 893 rtx_insn *ins, *prev; |
|
63
b7f97abdc517
update gcc from gcc-4.5.0 to gcc-4.6
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
55
diff
changeset
|
894 basic_block bb = BLOCK_FOR_INSN (insn); |
|
b7f97abdc517
update gcc from gcc-4.5.0 to gcc-4.6
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
55
diff
changeset
|
895 |
|
b7f97abdc517
update gcc from gcc-4.5.0 to gcc-4.6
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
55
diff
changeset
|
896 /* When adding hard reg restores after a DEBUG_INSN, move |
|
b7f97abdc517
update gcc from gcc-4.5.0 to gcc-4.6
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
55
diff
changeset
|
897 all notes between last real insn and this DEBUG_INSN after |
|
b7f97abdc517
update gcc from gcc-4.5.0 to gcc-4.6
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
55
diff
changeset
|
898 the DEBUG_INSN, otherwise we could get code |
|
b7f97abdc517
update gcc from gcc-4.5.0 to gcc-4.6
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
55
diff
changeset
|
899 -g/-g0 differences. */ |
|
b7f97abdc517
update gcc from gcc-4.5.0 to gcc-4.6
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
55
diff
changeset
|
900 for (ins = PREV_INSN (insn); ins != last->insn; ins = prev) |
|
b7f97abdc517
update gcc from gcc-4.5.0 to gcc-4.6
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
55
diff
changeset
|
901 { |
|
b7f97abdc517
update gcc from gcc-4.5.0 to gcc-4.6
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
55
diff
changeset
|
902 prev = PREV_INSN (ins); |
|
b7f97abdc517
update gcc from gcc-4.5.0 to gcc-4.6
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
55
diff
changeset
|
903 if (NOTE_P (ins)) |
|
b7f97abdc517
update gcc from gcc-4.5.0 to gcc-4.6
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
55
diff
changeset
|
904 { |
| 111 | 905 SET_NEXT_INSN (prev) = NEXT_INSN (ins); |
| 906 SET_PREV_INSN (NEXT_INSN (ins)) = prev; | |
| 907 SET_PREV_INSN (ins) = insn; | |
| 908 SET_NEXT_INSN (ins) = NEXT_INSN (insn); | |
| 909 SET_NEXT_INSN (insn) = ins; | |
|
63
b7f97abdc517
update gcc from gcc-4.5.0 to gcc-4.6
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
55
diff
changeset
|
910 if (NEXT_INSN (ins)) |
| 111 | 911 SET_PREV_INSN (NEXT_INSN (ins)) = ins; |
|
63
b7f97abdc517
update gcc from gcc-4.5.0 to gcc-4.6
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
55
diff
changeset
|
912 if (BB_END (bb) == insn) |
|
b7f97abdc517
update gcc from gcc-4.5.0 to gcc-4.6
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
55
diff
changeset
|
913 BB_END (bb) = ins; |
|
b7f97abdc517
update gcc from gcc-4.5.0 to gcc-4.6
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
55
diff
changeset
|
914 } |
|
b7f97abdc517
update gcc from gcc-4.5.0 to gcc-4.6
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
55
diff
changeset
|
915 else |
|
b7f97abdc517
update gcc from gcc-4.5.0 to gcc-4.6
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
55
diff
changeset
|
916 gcc_assert (DEBUG_INSN_P (ins)); |
|
b7f97abdc517
update gcc from gcc-4.5.0 to gcc-4.6
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
55
diff
changeset
|
917 } |
|
b7f97abdc517
update gcc from gcc-4.5.0 to gcc-4.6
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
55
diff
changeset
|
918 } |
|
b7f97abdc517
update gcc from gcc-4.5.0 to gcc-4.6
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
55
diff
changeset
|
919 last = NULL; |
|
b7f97abdc517
update gcc from gcc-4.5.0 to gcc-4.6
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
55
diff
changeset
|
920 |
| 0 | 921 if (n_regs_saved) |
| 922 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) | |
| 923 if (TEST_HARD_REG_BIT (hard_regs_saved, regno)) | |
| 924 regno += insert_restore (chain, JUMP_P (insn), | |
| 925 regno, MOVE_MAX_WORDS, save_mode); | |
| 926 } | |
| 927 } | |
| 928 } | |
| 929 | |
| 930 /* Here from note_stores, or directly from save_call_clobbered_regs, when | |
| 931 an insn stores a value in a register. | |
| 932 Set the proper bit or bits in this_insn_sets. All pseudos that have | |
| 933 been assigned hard regs have had their register number changed already, | |
| 934 so we can ignore pseudos. */ | |
| 935 static void | |
| 936 mark_set_regs (rtx reg, const_rtx setter ATTRIBUTE_UNUSED, void *data) | |
| 937 { | |
| 938 int regno, endregno, i; | |
| 939 HARD_REG_SET *this_insn_sets = (HARD_REG_SET *) data; | |
| 940 | |
| 941 if (GET_CODE (reg) == SUBREG) | |
| 942 { | |
| 943 rtx inner = SUBREG_REG (reg); | |
| 944 if (!REG_P (inner) || REGNO (inner) >= FIRST_PSEUDO_REGISTER) | |
| 945 return; | |
| 946 regno = subreg_regno (reg); | |
| 947 endregno = regno + subreg_nregs (reg); | |
| 948 } | |
| 949 else if (REG_P (reg) | |
| 950 && REGNO (reg) < FIRST_PSEUDO_REGISTER) | |
| 951 { | |
| 952 regno = REGNO (reg); | |
| 111 | 953 endregno = END_REGNO (reg); |
| 0 | 954 } |
| 955 else | |
| 956 return; | |
| 957 | |
| 958 for (i = regno; i < endregno; i++) | |
| 959 SET_HARD_REG_BIT (*this_insn_sets, i); | |
| 960 } | |
| 961 | |
| 962 /* Here from note_stores when an insn stores a value in a register. | |
| 963 Set the proper bit or bits in the passed regset. All pseudos that have | |
| 964 been assigned hard regs have had their register number changed already, | |
| 965 so we can ignore pseudos. */ | |
| 966 static void | |
| 967 add_stored_regs (rtx reg, const_rtx setter, void *data) | |
| 968 { | |
| 969 int regno, endregno, i; | |
| 111 | 970 machine_mode mode = GET_MODE (reg); |
| 0 | 971 int offset = 0; |
| 972 | |
| 973 if (GET_CODE (setter) == CLOBBER) | |
| 974 return; | |
| 975 | |
| 976 if (GET_CODE (reg) == SUBREG | |
| 977 && REG_P (SUBREG_REG (reg)) | |
| 978 && REGNO (SUBREG_REG (reg)) < FIRST_PSEUDO_REGISTER) | |
| 979 { | |
| 980 offset = subreg_regno_offset (REGNO (SUBREG_REG (reg)), | |
| 981 GET_MODE (SUBREG_REG (reg)), | |
| 982 SUBREG_BYTE (reg), | |
| 983 GET_MODE (reg)); | |
| 984 regno = REGNO (SUBREG_REG (reg)) + offset; | |
| 985 endregno = regno + subreg_nregs (reg); | |
| 986 } | |
| 987 else | |
| 988 { | |
| 989 if (!REG_P (reg) || REGNO (reg) >= FIRST_PSEUDO_REGISTER) | |
| 990 return; | |
| 991 | |
| 992 regno = REGNO (reg) + offset; | |
| 993 endregno = end_hard_regno (mode, regno); | |
| 994 } | |
| 995 | |
| 996 for (i = regno; i < endregno; i++) | |
| 997 SET_REGNO_REG_SET ((regset) data, i); | |
| 998 } | |
| 999 | |
| 1000 /* Walk X and record all referenced registers in REFERENCED_REGS. */ | |
| 1001 static void | |
|
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1002 mark_referenced_regs (rtx *loc, refmarker_fn *mark, void *arg) |
| 0 | 1003 { |
|
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1004 enum rtx_code code = GET_CODE (*loc); |
| 0 | 1005 const char *fmt; |
| 1006 int i, j; | |
| 1007 | |
| 1008 if (code == SET) | |
|
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1009 mark_referenced_regs (&SET_SRC (*loc), mark, arg); |
| 0 | 1010 if (code == SET || code == CLOBBER) |
| 1011 { | |
|
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1012 loc = &SET_DEST (*loc); |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1013 code = GET_CODE (*loc); |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1014 if ((code == REG && REGNO (*loc) < FIRST_PSEUDO_REGISTER) |
| 0 | 1015 || code == PC || code == CC0 |
|
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1016 || (code == SUBREG && REG_P (SUBREG_REG (*loc)) |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1017 && REGNO (SUBREG_REG (*loc)) < FIRST_PSEUDO_REGISTER |
| 0 | 1018 /* If we're setting only part of a multi-word register, |
| 1019 we shall mark it as referenced, because the words | |
| 1020 that are not being set should be restored. */ | |
| 111 | 1021 && !read_modify_subreg_p (*loc))) |
| 0 | 1022 return; |
| 1023 } | |
| 1024 if (code == MEM || code == SUBREG) | |
| 1025 { | |
|
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1026 loc = &XEXP (*loc, 0); |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1027 code = GET_CODE (*loc); |
| 0 | 1028 } |
| 1029 | |
| 1030 if (code == REG) | |
| 1031 { | |
|
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1032 int regno = REGNO (*loc); |
| 0 | 1033 int hardregno = (regno < FIRST_PSEUDO_REGISTER ? regno |
| 1034 : reg_renumber[regno]); | |
| 1035 | |
| 1036 if (hardregno >= 0) | |
|
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1037 mark (loc, GET_MODE (*loc), hardregno, arg); |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1038 else if (arg) |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1039 /* ??? Will we ever end up with an equiv expression in a debug |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1040 insn, that would have required restoring a reg, or will |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1041 reload take care of it for us? */ |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1042 return; |
| 0 | 1043 /* If this is a pseudo that did not get a hard register, scan its |
| 1044 memory location, since it might involve the use of another | |
| 1045 register, which might be saved. */ | |
| 111 | 1046 else if (reg_equiv_mem (regno) != 0) |
| 1047 mark_referenced_regs (&XEXP (reg_equiv_mem (regno), 0), mark, arg); | |
| 1048 else if (reg_equiv_address (regno) != 0) | |
| 1049 mark_referenced_regs (®_equiv_address (regno), mark, arg); | |
| 0 | 1050 return; |
| 1051 } | |
| 1052 | |
| 1053 fmt = GET_RTX_FORMAT (code); | |
| 1054 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
| 1055 { | |
| 1056 if (fmt[i] == 'e') | |
|
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1057 mark_referenced_regs (&XEXP (*loc, i), mark, arg); |
| 0 | 1058 else if (fmt[i] == 'E') |
|
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1059 for (j = XVECLEN (*loc, i) - 1; j >= 0; j--) |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1060 mark_referenced_regs (&XVECEXP (*loc, i, j), mark, arg); |
| 0 | 1061 } |
| 1062 } | |
|
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1063 |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1064 /* Parameter function for mark_referenced_regs() that adds registers |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1065 present in the insn and in equivalent mems and addresses to |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1066 referenced_regs. */ |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1067 |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1068 static void |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1069 mark_reg_as_referenced (rtx *loc ATTRIBUTE_UNUSED, |
| 111 | 1070 machine_mode mode, |
|
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1071 int hardregno, |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1072 void *arg ATTRIBUTE_UNUSED) |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1073 { |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1074 add_to_hard_reg_set (&referenced_regs, mode, hardregno); |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1075 } |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1076 |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1077 /* Parameter function for mark_referenced_regs() that replaces |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1078 registers referenced in a debug_insn that would have been restored, |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1079 should it be a non-debug_insn, with their save locations. */ |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1080 |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1081 static void |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1082 replace_reg_with_saved_mem (rtx *loc, |
| 111 | 1083 machine_mode mode, |
|
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1084 int regno, |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1085 void *arg) |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1086 { |
| 111 | 1087 unsigned int i, nregs = hard_regno_nregs (regno, mode); |
|
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1088 rtx mem; |
| 111 | 1089 machine_mode *save_mode = (machine_mode *)arg; |
|
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1090 |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1091 for (i = 0; i < nregs; i++) |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1092 if (TEST_HARD_REG_BIT (hard_regs_saved, regno + i)) |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1093 break; |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1094 |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1095 /* If none of the registers in the range would need restoring, we're |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1096 all set. */ |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1097 if (i == nregs) |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1098 return; |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1099 |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1100 while (++i < nregs) |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1101 if (!TEST_HARD_REG_BIT (hard_regs_saved, regno + i)) |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1102 break; |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1103 |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1104 if (i == nregs |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1105 && regno_save_mem[regno][nregs]) |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1106 { |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1107 mem = copy_rtx (regno_save_mem[regno][nregs]); |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1108 |
| 111 | 1109 if (nregs == hard_regno_nregs (regno, save_mode[regno])) |
|
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1110 mem = adjust_address_nv (mem, save_mode[regno], 0); |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1111 |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1112 if (GET_MODE (mem) != mode) |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1113 { |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1114 /* This is gen_lowpart_if_possible(), but without validating |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1115 the newly-formed address. */ |
| 131 | 1116 poly_int64 offset = byte_lowpart_offset (mode, GET_MODE (mem)); |
|
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1117 mem = adjust_address_nv (mem, mode, offset); |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1118 } |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1119 } |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1120 else |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1121 { |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1122 mem = gen_rtx_CONCATN (mode, rtvec_alloc (nregs)); |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1123 for (i = 0; i < nregs; i++) |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1124 if (TEST_HARD_REG_BIT (hard_regs_saved, regno + i)) |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1125 { |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1126 gcc_assert (regno_save_mem[regno + i][1]); |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1127 XVECEXP (mem, 0, i) = copy_rtx (regno_save_mem[regno + i][1]); |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1128 } |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1129 else |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1130 { |
| 111 | 1131 machine_mode smode = save_mode[regno]; |
| 1132 gcc_assert (smode != VOIDmode); | |
| 1133 if (hard_regno_nregs (regno, smode) > 1) | |
| 131 | 1134 smode = mode_for_size (exact_div (GET_MODE_BITSIZE (mode), |
| 1135 nregs), | |
| 111 | 1136 GET_MODE_CLASS (mode), 0).require (); |
| 1137 XVECEXP (mem, 0, i) = gen_rtx_REG (smode, regno + i); | |
|
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1138 } |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1139 } |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1140 |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1141 gcc_assert (GET_MODE (mem) == mode); |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1142 *loc = mem; |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1143 } |
|
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
|
1144 |
| 0 | 1145 |
| 1146 /* Insert a sequence of insns to restore. Place these insns in front of | |
| 1147 CHAIN if BEFORE_P is nonzero, behind the insn otherwise. MAXRESTORE is | |
| 1148 the maximum number of registers which should be restored during this call. | |
| 1149 It should never be less than 1 since we only work with entire registers. | |
| 1150 | |
| 1151 Note that we have verified in init_caller_save that we can do this | |
| 1152 with a simple SET, so use it. Set INSN_CODE to what we save there | |
| 1153 since the address might not be valid so the insn might not be recognized. | |
| 1154 These insns will be reloaded and have register elimination done by | |
| 1155 find_reload, so we need not worry about that here. | |
| 1156 | |
| 1157 Return the extra number of registers saved. */ | |
| 1158 | |
| 1159 static int | |
| 145 | 1160 insert_restore (class insn_chain *chain, int before_p, int regno, |
| 111 | 1161 int maxrestore, machine_mode *save_mode) |
| 0 | 1162 { |
| 1163 int i, k; | |
| 1164 rtx pat = NULL_RTX; | |
| 1165 int code; | |
| 1166 unsigned int numregs = 0; | |
| 145 | 1167 class insn_chain *new_chain; |
| 0 | 1168 rtx mem; |
| 1169 | |
| 1170 /* A common failure mode if register status is not correct in the | |
| 1171 RTL is for this routine to be called with a REGNO we didn't | |
| 1172 expect to save. That will cause us to write an insn with a (nil) | |
| 1173 SET_DEST or SET_SRC. Instead of doing so and causing a crash | |
| 1174 later, check for this common case here instead. This will remove | |
| 1175 one step in debugging such problems. */ | |
| 1176 gcc_assert (regno_save_mem[regno][1]); | |
| 1177 | |
| 1178 /* Get the pattern to emit and update our status. | |
| 1179 | |
| 1180 See if we can restore `maxrestore' registers at once. Work | |
| 1181 backwards to the single register case. */ | |
| 1182 for (i = maxrestore; i > 0; i--) | |
| 1183 { | |
| 1184 int j; | |
| 1185 int ok = 1; | |
| 1186 | |
| 1187 if (regno_save_mem[regno][i] == 0) | |
| 1188 continue; | |
| 1189 | |
| 1190 for (j = 0; j < i; j++) | |
| 1191 if (! TEST_HARD_REG_BIT (hard_regs_saved, regno + j)) | |
| 1192 { | |
| 1193 ok = 0; | |
| 1194 break; | |
| 1195 } | |
| 1196 /* Must do this one restore at a time. */ | |
| 1197 if (! ok) | |
| 1198 continue; | |
| 1199 | |
| 1200 numregs = i; | |
| 1201 break; | |
| 1202 } | |
| 1203 | |
| 1204 mem = regno_save_mem [regno][numregs]; | |
| 1205 if (save_mode [regno] != VOIDmode | |
| 1206 && save_mode [regno] != GET_MODE (mem) | |
| 111 | 1207 && numregs == hard_regno_nregs (regno, save_mode [regno]) |
| 0 | 1208 /* Check that insn to restore REGNO in save_mode[regno] is |
| 1209 correct. */ | |
| 1210 && reg_save_code (regno, save_mode[regno]) >= 0) | |
|
67
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
1211 mem = adjust_address_nv (mem, save_mode[regno], 0); |
| 0 | 1212 else |
| 1213 mem = copy_rtx (mem); | |
| 1214 | |
| 1215 /* Verify that the alignment of spill space is equal to or greater | |
| 1216 than required. */ | |
| 1217 gcc_assert (MIN (MAX_SUPPORTED_STACK_ALIGNMENT, | |
| 1218 GET_MODE_ALIGNMENT (GET_MODE (mem))) <= MEM_ALIGN (mem)); | |
| 1219 | |
| 111 | 1220 pat = gen_rtx_SET (gen_rtx_REG (GET_MODE (mem), regno), mem); |
| 0 | 1221 code = reg_restore_code (regno, GET_MODE (mem)); |
| 1222 new_chain = insert_one_insn (chain, before_p, code, pat); | |
| 1223 | |
| 1224 /* Clear status for all registers we restored. */ | |
| 1225 for (k = 0; k < i; k++) | |
| 1226 { | |
| 1227 CLEAR_HARD_REG_BIT (hard_regs_saved, regno + k); | |
| 1228 SET_REGNO_REG_SET (&new_chain->dead_or_set, regno + k); | |
| 1229 n_regs_saved--; | |
| 1230 } | |
| 1231 | |
| 1232 /* Tell our callers how many extra registers we saved/restored. */ | |
| 1233 return numregs - 1; | |
| 1234 } | |
| 1235 | |
| 1236 /* Like insert_restore above, but save registers instead. */ | |
| 1237 | |
| 1238 static int | |
| 145 | 1239 insert_save (class insn_chain *chain, int regno, |
| 111 | 1240 HARD_REG_SET *to_save, machine_mode *save_mode) |
| 0 | 1241 { |
| 1242 int i; | |
| 1243 unsigned int k; | |
| 1244 rtx pat = NULL_RTX; | |
| 1245 int code; | |
| 1246 unsigned int numregs = 0; | |
| 145 | 1247 class insn_chain *new_chain; |
| 0 | 1248 rtx mem; |
| 1249 | |
| 1250 /* A common failure mode if register status is not correct in the | |
| 1251 RTL is for this routine to be called with a REGNO we didn't | |
| 1252 expect to save. That will cause us to write an insn with a (nil) | |
| 1253 SET_DEST or SET_SRC. Instead of doing so and causing a crash | |
| 1254 later, check for this common case here. This will remove one | |
| 1255 step in debugging such problems. */ | |
| 1256 gcc_assert (regno_save_mem[regno][1]); | |
| 1257 | |
| 1258 /* Get the pattern to emit and update our status. | |
| 1259 | |
| 1260 See if we can save several registers with a single instruction. | |
| 1261 Work backwards to the single register case. */ | |
| 1262 for (i = MOVE_MAX_WORDS; i > 0; i--) | |
| 1263 { | |
| 1264 int j; | |
| 1265 int ok = 1; | |
| 1266 if (regno_save_mem[regno][i] == 0) | |
| 1267 continue; | |
| 1268 | |
| 1269 for (j = 0; j < i; j++) | |
| 1270 if (! TEST_HARD_REG_BIT (*to_save, regno + j)) | |
| 1271 { | |
| 1272 ok = 0; | |
| 1273 break; | |
| 1274 } | |
| 1275 /* Must do this one save at a time. */ | |
| 1276 if (! ok) | |
| 1277 continue; | |
| 1278 | |
| 1279 numregs = i; | |
| 1280 break; | |
| 1281 } | |
| 1282 | |
| 1283 mem = regno_save_mem [regno][numregs]; | |
| 1284 if (save_mode [regno] != VOIDmode | |
| 1285 && save_mode [regno] != GET_MODE (mem) | |
| 111 | 1286 && numregs == hard_regno_nregs (regno, save_mode [regno]) |
| 0 | 1287 /* Check that insn to save REGNO in save_mode[regno] is |
| 1288 correct. */ | |
| 1289 && reg_save_code (regno, save_mode[regno]) >= 0) | |
|
67
f6334be47118
update gcc from gcc-4.6-20100522 to gcc-4.6-20110318
nobuyasu <dimolto@cr.ie.u-ryukyu.ac.jp>
parents:
63
diff
changeset
|
1290 mem = adjust_address_nv (mem, save_mode[regno], 0); |
| 0 | 1291 else |
| 1292 mem = copy_rtx (mem); | |
| 1293 | |
| 1294 /* Verify that the alignment of spill space is equal to or greater | |
| 1295 than required. */ | |
| 1296 gcc_assert (MIN (MAX_SUPPORTED_STACK_ALIGNMENT, | |
| 1297 GET_MODE_ALIGNMENT (GET_MODE (mem))) <= MEM_ALIGN (mem)); | |
| 1298 | |
| 111 | 1299 pat = gen_rtx_SET (mem, gen_rtx_REG (GET_MODE (mem), regno)); |
| 0 | 1300 code = reg_save_code (regno, GET_MODE (mem)); |
| 131 | 1301 new_chain = insert_one_insn (chain, 1, code, pat); |
| 0 | 1302 |
| 1303 /* Set hard_regs_saved and dead_or_set for all the registers we saved. */ | |
| 1304 for (k = 0; k < numregs; k++) | |
| 1305 { | |
| 1306 SET_HARD_REG_BIT (hard_regs_saved, regno + k); | |
| 1307 SET_REGNO_REG_SET (&new_chain->dead_or_set, regno + k); | |
| 1308 n_regs_saved++; | |
| 1309 } | |
| 1310 | |
| 1311 /* Tell our callers how many extra registers we saved/restored. */ | |
| 1312 return numregs - 1; | |
| 1313 } | |
| 1314 | |
| 1315 /* A note_uses callback used by insert_one_insn. Add the hard-register | |
| 1316 equivalent of each REG to regset DATA. */ | |
| 1317 | |
| 1318 static void | |
| 1319 add_used_regs (rtx *loc, void *data) | |
| 1320 { | |
| 111 | 1321 subrtx_iterator::array_type array; |
| 1322 FOR_EACH_SUBRTX (iter, array, *loc, NONCONST) | |
| 1323 { | |
| 1324 const_rtx x = *iter; | |
| 1325 if (REG_P (x)) | |
| 1326 { | |
| 1327 unsigned int regno = REGNO (x); | |
| 1328 if (HARD_REGISTER_NUM_P (regno)) | |
| 1329 bitmap_set_range ((regset) data, regno, REG_NREGS (x)); | |
| 1330 else | |
| 1331 gcc_checking_assert (reg_renumber[regno] < 0); | |
| 1332 } | |
| 1333 } | |
| 0 | 1334 } |
| 1335 | |
| 1336 /* Emit a new caller-save insn and set the code. */ | |
| 145 | 1337 static class insn_chain * |
| 1338 insert_one_insn (class insn_chain *chain, int before_p, int code, rtx pat) | |
| 0 | 1339 { |
| 111 | 1340 rtx_insn *insn = chain->insn; |
| 145 | 1341 class insn_chain *new_chain; |
| 0 | 1342 |
| 1343 /* If INSN references CC0, put our insns in front of the insn that sets | |
| 1344 CC0. This is always safe, since the only way we could be passed an | |
| 1345 insn that references CC0 is for a restore, and doing a restore earlier | |
| 1346 isn't a problem. We do, however, assume here that CALL_INSNs don't | |
| 1347 reference CC0. Guard against non-INSN's like CODE_LABEL. */ | |
| 1348 | |
| 111 | 1349 if (HAVE_cc0 && (NONJUMP_INSN_P (insn) || JUMP_P (insn)) |
| 0 | 1350 && before_p |
| 1351 && reg_referenced_p (cc0_rtx, PATTERN (insn))) | |
| 1352 chain = chain->prev, insn = chain->insn; | |
| 1353 | |
| 1354 new_chain = new_insn_chain (); | |
| 1355 if (before_p) | |
| 1356 { | |
| 1357 rtx link; | |
| 1358 | |
| 1359 new_chain->prev = chain->prev; | |
| 1360 if (new_chain->prev != 0) | |
| 1361 new_chain->prev->next = new_chain; | |
| 1362 else | |
| 1363 reload_insn_chain = new_chain; | |
| 1364 | |
| 1365 chain->prev = new_chain; | |
| 1366 new_chain->next = chain; | |
| 1367 new_chain->insn = emit_insn_before (pat, insn); | |
| 1368 /* ??? It would be nice if we could exclude the already / still saved | |
| 1369 registers from the live sets. */ | |
| 1370 COPY_REG_SET (&new_chain->live_throughout, &chain->live_throughout); | |
| 1371 note_uses (&PATTERN (chain->insn), add_used_regs, | |
| 1372 &new_chain->live_throughout); | |
| 1373 /* If CHAIN->INSN is a call, then the registers which contain | |
| 1374 the arguments to the function are live in the new insn. */ | |
| 1375 if (CALL_P (chain->insn)) | |
| 1376 for (link = CALL_INSN_FUNCTION_USAGE (chain->insn); | |
| 1377 link != NULL_RTX; | |
| 1378 link = XEXP (link, 1)) | |
| 1379 note_uses (&XEXP (link, 0), add_used_regs, | |
| 1380 &new_chain->live_throughout); | |
| 1381 | |
| 1382 CLEAR_REG_SET (&new_chain->dead_or_set); | |
| 111 | 1383 if (chain->insn == BB_HEAD (BASIC_BLOCK_FOR_FN (cfun, chain->block))) |
| 1384 BB_HEAD (BASIC_BLOCK_FOR_FN (cfun, chain->block)) = new_chain->insn; | |
| 0 | 1385 } |
| 1386 else | |
| 1387 { | |
| 1388 new_chain->next = chain->next; | |
| 1389 if (new_chain->next != 0) | |
| 1390 new_chain->next->prev = new_chain; | |
| 1391 chain->next = new_chain; | |
| 1392 new_chain->prev = chain; | |
| 1393 new_chain->insn = emit_insn_after (pat, insn); | |
| 1394 /* ??? It would be nice if we could exclude the already / still saved | |
| 1395 registers from the live sets, and observe REG_UNUSED notes. */ | |
| 1396 COPY_REG_SET (&new_chain->live_throughout, &chain->live_throughout); | |
| 1397 /* Registers that are set in CHAIN->INSN live in the new insn. | |
| 1398 (Unless there is a REG_UNUSED note for them, but we don't | |
| 1399 look for them here.) */ | |
| 145 | 1400 note_stores (chain->insn, add_stored_regs, &new_chain->live_throughout); |
| 0 | 1401 CLEAR_REG_SET (&new_chain->dead_or_set); |
| 111 | 1402 if (chain->insn == BB_END (BASIC_BLOCK_FOR_FN (cfun, chain->block))) |
| 1403 BB_END (BASIC_BLOCK_FOR_FN (cfun, chain->block)) = new_chain->insn; | |
| 0 | 1404 } |
| 1405 new_chain->block = chain->block; | |
| 1406 new_chain->is_caller_save_insn = 1; | |
| 1407 | |
| 1408 INSN_CODE (new_chain->insn) = code; | |
| 1409 return new_chain; | |
| 1410 } | |
| 1411 #include "gt-caller-save.h" |