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111
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1 /* Common hooks for AArch64.
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145
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2 Copyright (C) 2012-2020 Free Software Foundation, Inc.
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111
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3 Contributed by ARM Ltd.
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4
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5 This file is part of GCC.
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6
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7 GCC is free software; you can redistribute it and/or modify it
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8 under the terms of the GNU General Public License as published
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9 by the Free Software Foundation; either version 3, or (at your
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10 option) any later version.
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11
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12 GCC is distributed in the hope that it will be useful, but WITHOUT
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13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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15 License for more details.
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16
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17 You should have received a copy of the GNU General Public License
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18 along with GCC; see the file COPYING3. If not see
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19 <http://www.gnu.org/licenses/>. */
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20
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21 #include "config.h"
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22 #define INCLUDE_STRING
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23 #include "system.h"
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24 #include "coretypes.h"
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25 #include "tm.h"
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26 #include "memmodel.h"
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27 #include "tm_p.h"
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28 #include "common/common-target.h"
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29 #include "common/common-target-def.h"
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30 #include "opts.h"
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31 #include "flags.h"
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32 #include "diagnostic.h"
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33
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34 #ifdef TARGET_BIG_ENDIAN_DEFAULT
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35 #undef TARGET_DEFAULT_TARGET_FLAGS
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36 #define TARGET_DEFAULT_TARGET_FLAGS (MASK_BIG_END)
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37 #endif
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38
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39 #undef TARGET_HANDLE_OPTION
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40 #define TARGET_HANDLE_OPTION aarch64_handle_option
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41
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42 #undef TARGET_OPTION_OPTIMIZATION_TABLE
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43 #define TARGET_OPTION_OPTIMIZATION_TABLE aarch_option_optimization_table
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145
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44 #undef TARGET_OPTION_INIT_STRUCT
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45 #define TARGET_OPTION_INIT_STRUCT aarch64_option_init_struct
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111
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46
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47 /* Set default optimization options. */
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48 static const struct default_options aarch_option_optimization_table[] =
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49 {
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50 /* Enable section anchors by default at -O1 or higher. */
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51 { OPT_LEVELS_1_PLUS, OPT_fsection_anchors, NULL, 1 },
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131
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52 /* Disable fomit-frame-pointer by default. */
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53 { OPT_LEVELS_ALL, OPT_fomit_frame_pointer, NULL, 0 },
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111
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54 /* Enable -fsched-pressure by default when optimizing. */
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55 { OPT_LEVELS_1_PLUS, OPT_fsched_pressure, NULL, 1 },
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56 /* Enable redundant extension instructions removal at -O2 and higher. */
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57 { OPT_LEVELS_2_PLUS, OPT_free, NULL, 1 },
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131
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58 #if (TARGET_DEFAULT_ASYNC_UNWIND_TABLES == 1)
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59 { OPT_LEVELS_ALL, OPT_fasynchronous_unwind_tables, NULL, 1 },
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60 { OPT_LEVELS_ALL, OPT_funwind_tables, NULL, 1},
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61 #endif
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145
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62 { OPT_LEVELS_ALL, OPT__param_stack_clash_protection_guard_size_, NULL,
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63 DEFAULT_STK_CLASH_GUARD_SIZE == 0 ? 16 : DEFAULT_STK_CLASH_GUARD_SIZE },
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64
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111
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65 { OPT_LEVELS_NONE, 0, NULL, 0 }
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66 };
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67
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68 /* Implement TARGET_HANDLE_OPTION.
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69 This function handles the target specific options for CPU/target selection.
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70
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71 -mcpu=CPU is shorthand for -march=ARCH_FOR_CPU, -mtune=CPU.
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72 If either of -march or -mtune is given, they override their
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73 respective component of -mcpu. This logic is implemented
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74 in config/aarch64/aarch64.c:aarch64_override_options. */
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75
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76 bool
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77 aarch64_handle_option (struct gcc_options *opts,
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78 struct gcc_options *opts_set ATTRIBUTE_UNUSED,
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79 const struct cl_decoded_option *decoded,
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80 location_t loc ATTRIBUTE_UNUSED)
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81 {
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82 size_t code = decoded->opt_index;
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83 const char *arg = decoded->arg;
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84 int val = decoded->value;
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85
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86 switch (code)
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87 {
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88 case OPT_march_:
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89 opts->x_aarch64_arch_string = arg;
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90 return true;
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91
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92 case OPT_mcpu_:
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93 opts->x_aarch64_cpu_string = arg;
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94 return true;
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95
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96 case OPT_mtune_:
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97 opts->x_aarch64_tune_string = arg;
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98 return true;
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99
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100 case OPT_mgeneral_regs_only:
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101 opts->x_target_flags |= MASK_GENERAL_REGS_ONLY;
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102 return true;
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103
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104 case OPT_mfix_cortex_a53_835769:
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105 opts->x_aarch64_fix_a53_err835769 = val;
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106 return true;
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107
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108 case OPT_mstrict_align:
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131
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109 if (val)
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110 opts->x_target_flags |= MASK_STRICT_ALIGN;
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111 else
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112 opts->x_target_flags &= ~MASK_STRICT_ALIGN;
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111
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113 return true;
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114
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115 case OPT_momit_leaf_frame_pointer:
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116 opts->x_flag_omit_leaf_frame_pointer = val;
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117 return true;
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118
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119 default:
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120 return true;
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121 }
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122 }
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123
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124 /* An ISA extension in the co-processor and main instruction set space. */
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125 struct aarch64_option_extension
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126 {
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127 const char *const name;
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145
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128 const uint64_t flag_canonical;
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129 const uint64_t flags_on;
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130 const uint64_t flags_off;
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131 const bool is_synthetic;
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111
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132 };
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133
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134 /* ISA extensions in AArch64. */
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135 static const struct aarch64_option_extension all_extensions[] =
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136 {
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145
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137 #define AARCH64_OPT_EXTENSION(NAME, FLAG_CANONICAL, FLAGS_ON, FLAGS_OFF, \
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138 SYNTHETIC, Z) \
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139 {NAME, FLAG_CANONICAL, FLAGS_ON, FLAGS_OFF, SYNTHETIC},
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111
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140 #include "config/aarch64/aarch64-option-extensions.def"
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145
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141 {NULL, 0, 0, 0, false}
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142 };
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143
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144 /* A copy of the ISA extensions list for AArch64 sorted by the popcount of
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145 bits and extension turned on. Cached for efficiency. */
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146 static struct aarch64_option_extension all_extensions_by_on[] =
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147 {
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148 #define AARCH64_OPT_EXTENSION(NAME, FLAG_CANONICAL, FLAGS_ON, FLAGS_OFF, \
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149 SYNTHETIC, Z) \
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150 {NAME, FLAG_CANONICAL, FLAGS_ON, FLAGS_OFF, SYNTHETIC},
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151 #include "config/aarch64/aarch64-option-extensions.def"
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152 {NULL, 0, 0, 0, false}
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111
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153 };
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154
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155 struct processor_name_to_arch
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156 {
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157 const std::string processor_name;
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158 const enum aarch64_arch arch;
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145
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159 const uint64_t flags;
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111
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160 };
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161
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162 struct arch_to_arch_name
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163 {
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164 const enum aarch64_arch arch;
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165 const std::string arch_name;
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145
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166 const uint64_t flags;
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111
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167 };
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168
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169 /* Map processor names to the architecture revision they implement and
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170 the default set of architectural feature flags they support. */
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171 static const struct processor_name_to_arch all_cores[] =
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172 {
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173 #define AARCH64_CORE(NAME, X, IDENT, ARCH_IDENT, FLAGS, COSTS, IMP, PART, VARIANT) \
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174 {NAME, AARCH64_ARCH_##ARCH_IDENT, FLAGS},
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175 #include "config/aarch64/aarch64-cores.def"
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176 {"generic", AARCH64_ARCH_8A, AARCH64_FL_FOR_ARCH8},
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177 {"", aarch64_no_arch, 0}
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178 };
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179
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180 /* Map architecture revisions to their string representation. */
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181 static const struct arch_to_arch_name all_architectures[] =
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182 {
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183 #define AARCH64_ARCH(NAME, CORE, ARCH_IDENT, ARCH, FLAGS) \
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184 {AARCH64_ARCH_##ARCH_IDENT, NAME, FLAGS},
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185 #include "config/aarch64/aarch64-arches.def"
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186 {aarch64_no_arch, "", 0}
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187 };
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188
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189 /* Parse the architecture extension string STR and update ISA_FLAGS
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190 with the architecture features turned on or off. Return a
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145
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191 aarch64_parse_opt_result describing the result.
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192 When the STR string contains an invalid extension,
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193 a copy of the string is created and stored to INVALID_EXTENSION. */
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111
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194
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195 enum aarch64_parse_opt_result
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145
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196 aarch64_parse_extension (const char *str, uint64_t *isa_flags,
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197 std::string *invalid_extension)
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111
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198 {
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199 /* The extension string is parsed left to right. */
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200 const struct aarch64_option_extension *opt = NULL;
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201
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202 /* Flag to say whether we are adding or removing an extension. */
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203 int adding_ext = -1;
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204
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205 while (str != NULL && *str != 0)
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206 {
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207 const char *ext;
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208 size_t len;
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209
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210 str++;
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211 ext = strchr (str, '+');
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212
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213 if (ext != NULL)
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214 len = ext - str;
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215 else
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216 len = strlen (str);
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217
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218 if (len >= 2 && strncmp (str, "no", 2) == 0)
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219 {
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220 adding_ext = 0;
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221 len -= 2;
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222 str += 2;
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223 }
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224 else if (len > 0)
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225 adding_ext = 1;
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226
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227 if (len == 0)
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228 return AARCH64_PARSE_MISSING_ARG;
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229
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230
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231 /* Scan over the extensions table trying to find an exact match. */
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232 for (opt = all_extensions; opt->name != NULL; opt++)
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233 {
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234 if (strlen (opt->name) == len && strncmp (opt->name, str, len) == 0)
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235 {
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236 /* Add or remove the extension. */
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237 if (adding_ext)
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238 *isa_flags |= (opt->flags_on | opt->flag_canonical);
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239 else
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240 *isa_flags &= ~(opt->flags_off | opt->flag_canonical);
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241 break;
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242 }
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243 }
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244
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245 if (opt->name == NULL)
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246 {
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247 /* Extension not found in list. */
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145
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248 if (invalid_extension)
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249 *invalid_extension = std::string (str, len);
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111
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250 return AARCH64_PARSE_INVALID_FEATURE;
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251 }
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252
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253 str = ext;
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254 };
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255
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256 return AARCH64_PARSE_OK;
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257 }
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258
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145
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259 /* Append all architecture extension candidates to the CANDIDATES vector. */
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260
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261 void
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262 aarch64_get_all_extension_candidates (auto_vec<const char *> *candidates)
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263 {
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264 const struct aarch64_option_extension *opt;
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265 for (opt = all_extensions; opt->name != NULL; opt++)
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266 candidates->safe_push (opt->name);
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267 }
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268
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269 /* Comparer to sort aarch64's feature extensions by population count. Largest
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270 first. */
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271
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272 typedef const struct aarch64_option_extension opt_ext;
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273
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274 int opt_ext_cmp (const void* a, const void* b)
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275 {
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276 opt_ext *opt_a = (opt_ext *)a;
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277 opt_ext *opt_b = (opt_ext *)b;
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278
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279 /* We consider the total set of bits an options turns on to be the union of
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280 the singleton set containing the option itself and the set of options it
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281 turns on as a dependency. As an example +dotprod turns on FL_DOTPROD and
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282 FL_SIMD. As such the set of bits represented by this option is
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283 {FL_DOTPROD, FL_SIMD}. */
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284 uint64_t total_flags_a = opt_a->flag_canonical & opt_a->flags_on;
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285 uint64_t total_flags_b = opt_b->flag_canonical & opt_b->flags_on;
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286 int popcnt_a = popcount_hwi ((HOST_WIDE_INT)total_flags_a);
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287 int popcnt_b = popcount_hwi ((HOST_WIDE_INT)total_flags_b);
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288 int order = popcnt_b - popcnt_a;
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289
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290 /* If they have the same amount of bits set, give it a more
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291 deterministic ordering by using the value of the bits themselves. */
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292 if (order != 0)
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293 return order;
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294
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295 if (total_flags_a != total_flags_b)
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296 return total_flags_a < total_flags_b ? 1 : -1;
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297
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298 return 0;
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299 }
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300
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301 /* Implement TARGET_OPTION_INIT_STRUCT. */
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302
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303 static void
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304 aarch64_option_init_struct (struct gcc_options *opts ATTRIBUTE_UNUSED)
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305 {
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306 /* Sort the extensions based on how many bits they set, order the larger
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307 counts first. We sort the list because this makes processing the
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308 feature bits O(n) instead of O(n^2). While n is small, the function
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309 to calculate the feature strings is called on every options push,
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310 pop and attribute change (arm_neon headers, lto etc all cause this to
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311 happen quite frequently). It is a trade-off between time and space and
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312 so time won. */
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313 int n_extensions
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314 = sizeof (all_extensions) / sizeof (struct aarch64_option_extension);
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315 qsort (&all_extensions_by_on, n_extensions,
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316 sizeof (struct aarch64_option_extension), opt_ext_cmp);
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317 }
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318
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319 /* Checks to see if enough bits from the option OPT are enabled in
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320 ISA_FLAG_BITS to be able to replace the individual options with the
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321 canonicalized version of the option. This is done based on two rules:
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322
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323 1) Synthetic groups, such as +crypto we only care about the bits that are
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324 turned on. e.g. +aes+sha2 can be replaced with +crypto.
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325
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326 2) Options that themselves have a bit, such as +rdma, in this case, all the
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327 feature bits they turn on must be available and the bit for the option
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328 itself must be. In this case it's effectively a reduction rather than a
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329 grouping. e.g. +fp+simd is not enough to turn on +rdma, for that you would
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330 need +rdma+fp+simd which is reduced down to +rdma.
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331 */
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332
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333 static bool
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334 aarch64_contains_opt (uint64_t isa_flag_bits, opt_ext *opt)
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335 {
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336 uint64_t flags_check
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337 = opt->is_synthetic ? opt->flags_on : opt->flag_canonical;
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338
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339 return (isa_flag_bits & flags_check) == flags_check;
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340 }
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341
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111
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342 /* Return a string representation of ISA_FLAGS. DEFAULT_ARCH_FLAGS
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343 gives the default set of flags which are implied by whatever -march
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344 we'd put out. Our job is to figure out the minimal set of "+" and
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345 "+no" feature flags to put out, and to put them out grouped such
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346 that all the "+" flags come before the "+no" flags. */
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347
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348 std::string
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145
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349 aarch64_get_extension_string_for_isa_flags (uint64_t isa_flags,
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350 uint64_t default_arch_flags)
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111
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351 {
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352 const struct aarch64_option_extension *opt = NULL;
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353 std::string outstr = "";
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354
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145
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355 uint64_t isa_flag_bits = isa_flags;
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356
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357 /* Pass one: Minimize the search space by reducing the set of options
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358 to the smallest set that still turns on the same features as before in
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359 conjunction with the bits that are turned on by default for the selected
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360 architecture. */
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361 for (opt = all_extensions_by_on; opt->name != NULL; opt++)
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362 {
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363 /* If the bit is on by default, then all the options it turns on are also
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364 on by default due to the transitive dependencies.
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365
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366 If the option is enabled explicitly in the set then we need to emit
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367 an option for it. Since this list is sorted by extensions setting the
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368 largest number of featers first, we can be sure that nothing else will
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369 ever need to set the bits we already set. Consider the following
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370 situation:
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371
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372 Feat1 = A + B + C
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373 Feat2 = A + B
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374 Feat3 = A + D
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375 Feat4 = B + C
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376 Feat5 = C
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377
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378 The following results are expected:
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379
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380 A + C = A + Feat5
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381 B + C = Feat4
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382 Feat4 + A = Feat1
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383 Feat2 + Feat5 = Feat1
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384 Feat1 + C = Feat1
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385 Feat3 + Feat4 = Feat1 + D
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386
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387 This search assumes that all invidual feature bits are use visible,
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388 in other words the user must be able to do +A, +B, +C and +D. */
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389 if (aarch64_contains_opt (isa_flag_bits | default_arch_flags, opt))
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111
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390 {
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145
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391 /* We remove all the dependent bits, to prevent them from being turned
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392 on twice. This only works because we assume that all there are
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393 individual options to set all bits standalone. */
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394 isa_flag_bits &= ~opt->flags_on;
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395 isa_flag_bits |= opt->flag_canonical;
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111
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396 }
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145
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397 }
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398
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399 /* By toggling bits on and off, we may have set bits on that are already
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400 enabled by default. So we mask the default set out so we don't emit an
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401 option for them. Instead of checking for this each time during Pass One
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402 we just mask all default bits away at the end. */
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403 isa_flag_bits &= ~default_arch_flags;
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404
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405 /* We now have the smallest set of features we need to process. A subsequent
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406 linear scan of the bits in isa_flag_bits will allow us to print the ext
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407 names. However as a special case if CRC was enabled before, always print
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408 it. This is required because some CPUs have an incorrect specification
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|
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409 in older assemblers. Even though CRC should be the default for these
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410 cases the -mcpu values won't turn it on. */
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|
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411 if (isa_flags & AARCH64_ISA_CRC)
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|
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412 isa_flag_bits |= AARCH64_ISA_CRC;
|
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111
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413
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145
|
414 /* Pass Two:
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415 Print the option names that we're sure we must turn on. These are only
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416 optional extension names. Mandatory ones have already been removed and
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|
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417 ones we explicitly want off have been too. */
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|
|
418 for (opt = all_extensions_by_on; opt->name != NULL; opt++)
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|
|
419 {
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|
|
420 if (isa_flag_bits & opt->flag_canonical)
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|
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421 {
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|
|
422 outstr += "+";
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|
|
423 outstr += opt->name;
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|
|
424 }
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|
|
425 }
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|
|
426
|
|
|
427 /* Pass Three:
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|
|
428 Print out a +no for any mandatory extension that we are
|
|
|
429 turning off. By this point aarch64_parse_extension would have ensured
|
|
|
430 that any optional extensions are turned off. The only things left are
|
|
|
431 things that can't be turned off usually, e.g. something that is on by
|
|
|
432 default because it's mandatory and we want it off. For turning off bits
|
|
|
433 we don't guarantee the smallest set of flags, but instead just emit all
|
|
|
434 options the user has specified.
|
|
|
435
|
|
|
436 The assembler requires all +<opts> to be printed before +no<opts>. */
|
|
|
437 for (opt = all_extensions_by_on; opt->name != NULL; opt++)
|
|
|
438 {
|
|
|
439 if ((~isa_flags) & opt->flag_canonical
|
|
|
440 && !((~default_arch_flags) & opt->flag_canonical))
|
|
|
441 {
|
|
|
442 outstr += "+no";
|
|
|
443 outstr += opt->name;
|
|
|
444 }
|
|
|
445 }
|
|
111
|
446
|
|
|
447 return outstr;
|
|
|
448 }
|
|
|
449
|
|
|
450 /* Attempt to rewrite NAME, which has been passed on the command line
|
|
|
451 as a -mcpu option to an equivalent -march value. If we can do so,
|
|
|
452 return the new string, otherwise return an error. */
|
|
|
453
|
|
|
454 const char *
|
|
|
455 aarch64_rewrite_selected_cpu (const char *name)
|
|
|
456 {
|
|
|
457 std::string original_string (name);
|
|
|
458 std::string extension_str;
|
|
|
459 std::string processor;
|
|
|
460 size_t extension_pos = original_string.find_first_of ('+');
|
|
|
461
|
|
|
462 /* Strip and save the extension string. */
|
|
|
463 if (extension_pos != std::string::npos)
|
|
|
464 {
|
|
|
465 processor = original_string.substr (0, extension_pos);
|
|
|
466 extension_str = original_string.substr (extension_pos,
|
|
|
467 std::string::npos);
|
|
|
468 }
|
|
|
469 else
|
|
|
470 {
|
|
|
471 /* No extensions. */
|
|
|
472 processor = original_string;
|
|
|
473 }
|
|
|
474
|
|
|
475 const struct processor_name_to_arch* p_to_a;
|
|
|
476 for (p_to_a = all_cores;
|
|
|
477 p_to_a->arch != aarch64_no_arch;
|
|
|
478 p_to_a++)
|
|
|
479 {
|
|
|
480 if (p_to_a->processor_name == processor)
|
|
|
481 break;
|
|
|
482 }
|
|
|
483
|
|
|
484 const struct arch_to_arch_name* a_to_an;
|
|
|
485 for (a_to_an = all_architectures;
|
|
|
486 a_to_an->arch != aarch64_no_arch;
|
|
|
487 a_to_an++)
|
|
|
488 {
|
|
|
489 if (a_to_an->arch == p_to_a->arch)
|
|
|
490 break;
|
|
|
491 }
|
|
|
492
|
|
|
493 /* We couldn't find that proceesor name, or the processor name we
|
|
|
494 found does not map to an architecture we understand. */
|
|
|
495 if (p_to_a->arch == aarch64_no_arch
|
|
|
496 || a_to_an->arch == aarch64_no_arch)
|
|
145
|
497 fatal_error (input_location, "unknown value %qs for %<-mcpu%>", name);
|
|
111
|
498
|
|
145
|
499 uint64_t extensions = p_to_a->flags;
|
|
|
500 aarch64_parse_extension (extension_str.c_str (), &extensions, NULL);
|
|
111
|
501
|
|
|
502 std::string outstr = a_to_an->arch_name
|
|
|
503 + aarch64_get_extension_string_for_isa_flags (extensions,
|
|
|
504 a_to_an->flags);
|
|
|
505
|
|
|
506 /* We are going to memory leak here, nobody elsewhere
|
|
|
507 in the callchain is going to clean up after us. The alternative is
|
|
|
508 to allocate a static buffer, and assert that it is big enough for our
|
|
|
509 modified string, which seems much worse! */
|
|
|
510 return xstrdup (outstr.c_str ());
|
|
|
511 }
|
|
|
512
|
|
|
513 /* Called by the driver to rewrite a name passed to the -mcpu
|
|
|
514 argument in preparation to be passed to the assembler. The
|
|
|
515 names passed from the commend line will be in ARGV, we want
|
|
|
516 to use the right-most argument, which should be in
|
|
|
517 ARGV[ARGC - 1]. ARGC should always be greater than 0. */
|
|
|
518
|
|
|
519 const char *
|
|
|
520 aarch64_rewrite_mcpu (int argc, const char **argv)
|
|
|
521 {
|
|
|
522 gcc_assert (argc);
|
|
|
523 return aarch64_rewrite_selected_cpu (argv[argc - 1]);
|
|
|
524 }
|
|
|
525
|
|
145
|
526 struct gcc_targetm_common targetm_common = TARGETM_COMMON_INITIALIZER;
|
|
|
527
|
|
111
|
528 #undef AARCH64_CPU_NAME_LENGTH
|
|
|
529
|
