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1 /* AArch64 Non-NEON ACLE intrinsics include file.
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2
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3 Copyright (C) 2014-2020 Free Software Foundation, Inc.
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4 Contributed by ARM Ltd.
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5
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6 This file is part of GCC.
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7
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8 GCC is free software; you can redistribute it and/or modify it
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9 under the terms of the GNU General Public License as published
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10 by the Free Software Foundation; either version 3, or (at your
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11 option) any later version.
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12
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13 GCC is distributed in the hope that it will be useful, but WITHOUT
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14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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15 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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16 License for more details.
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17
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18 Under Section 7 of GPL version 3, you are granted additional
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19 permissions described in the GCC Runtime Library Exception, version
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20 3.1, as published by the Free Software Foundation.
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21
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22 You should have received a copy of the GNU General Public License and
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23 a copy of the GCC Runtime Library Exception along with this program;
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24 see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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25 <http://www.gnu.org/licenses/>. */
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26
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27 #ifndef _GCC_ARM_ACLE_H
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28 #define _GCC_ARM_ACLE_H
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29
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30 #include <stdint.h>
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31
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145
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32 #ifdef __cplusplus
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33 extern "C" {
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34 #endif
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35
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36 #pragma GCC push_options
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37 #pragma GCC target ("arch=armv8.3-a")
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38 __extension__ static __inline int32_t __attribute__ ((__always_inline__))
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39 __jcvt (double __a)
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40 {
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41 return __builtin_aarch64_jcvtzs (__a);
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42 }
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43
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44 #pragma GCC pop_options
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45
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46 #pragma GCC push_options
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47 #pragma GCC target ("arch=armv8.5-a")
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48 __extension__ static __inline float __attribute__ ((__always_inline__))
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49 __rint32zf (float __a)
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50 {
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51 return __builtin_aarch64_frint32zsf (__a);
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52 }
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53
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54 __extension__ static __inline double __attribute__ ((__always_inline__))
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55 __rint32z (double __a)
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56 {
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57 return __builtin_aarch64_frint32zdf (__a);
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58 }
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59
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60 __extension__ static __inline float __attribute__ ((__always_inline__))
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61 __rint64zf (float __a)
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62 {
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63 return __builtin_aarch64_frint64zsf (__a);
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64 }
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65
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66 __extension__ static __inline double __attribute__ ((__always_inline__))
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67 __rint64z (double __a)
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68 {
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69 return __builtin_aarch64_frint64zdf (__a);
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70 }
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71
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72 __extension__ static __inline float __attribute__ ((__always_inline__))
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73 __rint32xf (float __a)
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74 {
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75 return __builtin_aarch64_frint32xsf (__a);
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76 }
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77
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78 __extension__ static __inline double __attribute__ ((__always_inline__))
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79 __rint32x (double __a)
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80 {
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81 return __builtin_aarch64_frint32xdf (__a);
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82 }
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83
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84 __extension__ static __inline float __attribute__ ((__always_inline__))
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85 __rint64xf (float __a)
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86 {
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87 return __builtin_aarch64_frint64xsf (__a);
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88 }
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89
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90 __extension__ static __inline double __attribute__ ((__always_inline__))
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91 __rint64x (double __a)
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92 {
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93 return __builtin_aarch64_frint64xdf (__a);
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94 }
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95
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96
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97 #pragma GCC pop_options
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98
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99 #pragma GCC push_options
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100
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101 #pragma GCC target ("+nothing+crc")
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102
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103 __extension__ static __inline uint32_t __attribute__ ((__always_inline__))
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104 __crc32b (uint32_t __a, uint8_t __b)
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105 {
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106 return __builtin_aarch64_crc32b (__a, __b);
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107 }
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108
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109 __extension__ static __inline uint32_t __attribute__ ((__always_inline__))
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110 __crc32cb (uint32_t __a, uint8_t __b)
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111 {
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112 return __builtin_aarch64_crc32cb (__a, __b);
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113 }
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114
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115 __extension__ static __inline uint32_t __attribute__ ((__always_inline__))
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116 __crc32ch (uint32_t __a, uint16_t __b)
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117 {
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118 return __builtin_aarch64_crc32ch (__a, __b);
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119 }
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120
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121 __extension__ static __inline uint32_t __attribute__ ((__always_inline__))
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122 __crc32cw (uint32_t __a, uint32_t __b)
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123 {
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124 return __builtin_aarch64_crc32cw (__a, __b);
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125 }
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126
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127 __extension__ static __inline uint32_t __attribute__ ((__always_inline__))
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128 __crc32cd (uint32_t __a, uint64_t __b)
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129 {
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130 return __builtin_aarch64_crc32cx (__a, __b);
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131 }
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132
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133 __extension__ static __inline uint32_t __attribute__ ((__always_inline__))
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134 __crc32h (uint32_t __a, uint16_t __b)
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135 {
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136 return __builtin_aarch64_crc32h (__a, __b);
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137 }
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138
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139 __extension__ static __inline uint32_t __attribute__ ((__always_inline__))
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140 __crc32w (uint32_t __a, uint32_t __b)
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141 {
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142 return __builtin_aarch64_crc32w (__a, __b);
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143 }
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144
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145 __extension__ static __inline uint32_t __attribute__ ((__always_inline__))
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146 __crc32d (uint32_t __a, uint64_t __b)
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147 {
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148 return __builtin_aarch64_crc32x (__a, __b);
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149 }
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150
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145
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151 #pragma GCC pop_options
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152
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153 #ifdef __ARM_FEATURE_TME
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154 #pragma GCC push_options
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155 #pragma GCC target ("+nothing+tme")
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156
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157 #define _TMFAILURE_REASON 0x00007fffu
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158 #define _TMFAILURE_RTRY 0x00008000u
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159 #define _TMFAILURE_CNCL 0x00010000u
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160 #define _TMFAILURE_MEM 0x00020000u
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161 #define _TMFAILURE_IMP 0x00040000u
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162 #define _TMFAILURE_ERR 0x00080000u
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163 #define _TMFAILURE_SIZE 0x00100000u
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164 #define _TMFAILURE_NEST 0x00200000u
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165 #define _TMFAILURE_DBG 0x00400000u
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166 #define _TMFAILURE_INT 0x00800000u
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167 #define _TMFAILURE_TRIVIAL 0x01000000u
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168
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169 __extension__ static __inline uint64_t __attribute__ ((__always_inline__))
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170 __tstart (void)
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171 {
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172 return __builtin_aarch64_tstart ();
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173 }
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174
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175 __extension__ static __inline void __attribute__ ((__always_inline__))
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176 __tcommit (void)
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177 {
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178 __builtin_aarch64_tcommit ();
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179 }
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180
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181 __extension__ static __inline void __attribute__ ((__always_inline__))
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182 __tcancel (const uint64_t __reason)
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183 {
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184 __builtin_aarch64_tcancel (__reason);
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185 }
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186
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187 __extension__ static __inline uint64_t __attribute__ ((__always_inline__))
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188 __ttest (void)
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189 {
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190 return __builtin_aarch64_ttest ();
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191 }
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192
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193 #pragma GCC pop_options
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194 #endif
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195
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196 #pragma GCC push_options
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197 #pragma GCC target ("+nothing+rng")
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198 __extension__ static __inline int __attribute__ ((__always_inline__))
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199 __rndr (uint64_t *__res)
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200 {
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201 return __builtin_aarch64_rndr (__res);
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202 }
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203
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204 __extension__ static __inline int __attribute__ ((__always_inline__))
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205 __rndrrs (uint64_t *__res)
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206 {
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207 return __builtin_aarch64_rndrrs (__res);
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208 }
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209
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210 #pragma GCC pop_options
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211
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212 #pragma GCC push_options
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213 #pragma GCC target ("arch=armv8.5-a+memtag")
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214
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215 #define __arm_mte_create_random_tag(__ptr, __u64_mask) \
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216 __builtin_aarch64_memtag_irg(__ptr, __u64_mask)
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217
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218 #define __arm_mte_exclude_tag(__ptr, __u64_excluded) \
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219 __builtin_aarch64_memtag_gmi(__ptr, __u64_excluded)
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220
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221 #define __arm_mte_ptrdiff(__ptr_a, __ptr_b) \
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222 __builtin_aarch64_memtag_subp(__ptr_a, __ptr_b)
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223
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224 #define __arm_mte_increment_tag(__ptr, __u_offset) \
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225 __builtin_aarch64_memtag_inc_tag(__ptr, __u_offset)
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226
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227 #define __arm_mte_set_tag(__tagged_address) \
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228 __builtin_aarch64_memtag_set_tag(__tagged_address)
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229
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230 #define __arm_mte_get_tag(__address) \
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231 __builtin_aarch64_memtag_get_tag(__address)
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232
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233 #pragma GCC pop_options
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234
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111
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235 #ifdef __cplusplus
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236 }
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237 #endif
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238
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239 #endif
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