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annotate gcc/config/alpha/constraints.md @ 158:494b0b89df80 default tip
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author | Shinji KONO <kono@ie.u-ryukyu.ac.jp> |
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date | Mon, 25 May 2020 18:13:55 +0900 |
parents | 1830386684a0 |
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rev | line source |
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0 | 1 ;; Constraint definitions for DEC Alpha. |
145 | 2 ;; Copyright (C) 2007-2020 Free Software Foundation, Inc. |
0 | 3 ;; |
4 ;; This file is part of GCC. | |
5 ;; | |
6 ;; GCC is free software; you can redistribute it and/or modify | |
7 ;; it under the terms of the GNU General Public License as published by | |
8 ;; the Free Software Foundation; either version 3, or (at your option) | |
9 ;; any later version. | |
10 ;; | |
11 ;; GCC is distributed in the hope that it will be useful, | |
12 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 ;; GNU General Public License for more details. | |
15 ;; | |
16 ;; You should have received a copy of the GNU General Public License | |
17 ;; along with GCC; see the file COPYING3. If not see | |
18 ;; <http://www.gnu.org/licenses/>. | |
19 | |
20 ;;; Unused letters: | |
111 | 21 ;;; ABCDEF H V YZ |
22 ;;; de ghijkl pq tu wxyz | |
0 | 23 |
24 ;; Integer register constraints. | |
25 | |
26 (define_register_constraint "a" "R24_REG" | |
27 "General register 24, input to division routine") | |
28 | |
29 (define_register_constraint "b" "R25_REG" | |
30 "General register 24, input to division routine") | |
31 | |
32 (define_register_constraint "c" "R27_REG" | |
33 "General register 27, function call address") | |
34 | |
111 | 35 (define_register_constraint "f" "TARGET_FPREGS ? FLOAT_REGS : NO_REGS" |
0 | 36 "Any floating-point register") |
37 | |
38 (define_register_constraint "v" "R0_REG" | |
39 "General register 0, function value return address") | |
40 | |
111 | 41 (define_memory_constraint "w" |
42 "A memory whose address is only a register" | |
43 (match_operand 0 "mem_noofs_operand")) | |
44 | |
0 | 45 ;; Integer constant constraints. |
46 (define_constraint "I" | |
47 "An unsigned 8 bit constant" | |
48 (and (match_code "const_int") | |
55
77e2b8dfacca
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
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changeset
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49 (match_test "IN_RANGE (ival, 0, 255)"))) |
0 | 50 |
51 (define_constraint "J" | |
52 "The constant zero" | |
53 (and (match_code "const_int") | |
54 (match_test "ival == 0"))) | |
55 | |
56 (define_constraint "K" | |
57 "Signed 16-bit integer constant" | |
58 (and (match_code "const_int") | |
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
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changeset
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59 (match_test "IN_RANGE (ival, -32768, 32767)"))) |
0 | 60 |
61 (define_constraint "L" | |
62 "A shifted signed 16-bit constant appropriate for LDAH" | |
63 (and (match_code "const_int") | |
64 (match_test "(ival & 0xffff) == 0 | |
65 && (ival >> 31 == -1 || ival >> 31 == 0)"))) | |
66 | |
67 (define_constraint "M" | |
68 "A valid operand of a ZAP insn" | |
69 (and (match_code "const_int") | |
70 (match_test "zap_mask (ival) != 0"))) | |
71 | |
72 (define_constraint "N" | |
73 "A complemented unsigned 8-bit constant" | |
74 (and (match_code "const_int") | |
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
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75 (match_test "IN_RANGE (~ival, 0, 255)"))) |
0 | 76 |
77 (define_constraint "O" | |
78 "A negated unsigned 8-bit constant" | |
79 (and (match_code "const_int") | |
55
77e2b8dfacca
update it from 4.4.3 to 4.5.0
ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
0
diff
changeset
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80 (match_test "IN_RANGE (-ival, 0, 255)"))) |
0 | 81 |
82 (define_constraint "P" | |
83 "The constant 1, 2 or 3" | |
84 (and (match_code "const_int") | |
131 | 85 (match_test "IN_RANGE (ival, 1, 3)"))) |
0 | 86 |
87 ;; Floating-point constant constraints. | |
88 (define_constraint "G" | |
89 "The floating point zero constant" | |
90 (and (match_code "const_double") | |
111 | 91 (match_test "op == CONST0_RTX (mode)"))) |
0 | 92 |
93 ;; "Extra" constraints. | |
111 | 94 |
95 ;; A memory location that is not a reference | |
96 ;; (using an AND) to an unaligned location. | |
97 (define_memory_constraint "Q" | |
0 | 98 "@internal A normal_memory_operand" |
111 | 99 (and (match_code "mem") |
100 (not (match_code "and" "0")))) | |
0 | 101 |
102 (define_constraint "R" | |
103 "@internal A direct_call_operand" | |
104 (match_operand:DI 0 "direct_call_operand")) | |
105 | |
106 (define_constraint "S" | |
107 "An unsigned 6-bit constant" | |
108 (and (match_code "const_int") | |
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77e2b8dfacca
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ryoma <e075725@ie.u-ryukyu.ac.jp>
parents:
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diff
changeset
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109 (match_test "IN_RANGE (ival, 0, 63)"))) |
0 | 110 |
111 (define_constraint "T" | |
112 "@internal A high-part symbol" | |
113 (match_code "high")) | |
114 | |
115 (define_constraint "W" | |
116 "A vector zero constant" | |
117 (and (match_code "const_vector") | |
118 (match_test "op == CONST0_RTX (mode)"))) |