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1 /* Definitions of target machine for GNU compiler, Synopsys DesignWare ARC cpu.
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2 Copyright (C) 2002-2020 Free Software Foundation, Inc.
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3 Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
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4 on behalf of Synopsys Inc.
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5
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6 This file is part of GCC.
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7
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8 GCC is free software; you can redistribute it and/or modify
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9 it under the terms of the GNU General Public License as published by
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10 the Free Software Foundation; either version 3, or (at your option)
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11 any later version.
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12
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13 GCC is distributed in the hope that it will be useful,
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14 but WITHOUT ANY WARRANTY; without even the implied warranty of
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15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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16 GNU General Public License for more details.
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17
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18 You should have received a copy of the GNU General Public License
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19 along with GCC; see the file COPYING3. If not see
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20 <http://www.gnu.org/licenses/>. */
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21
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22 /* Some insns set all condition code flags, some only set the ZNC flags, and
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23 some only set the ZN flags. */
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24
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25 CC_MODE (CC_ZN);
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26 CC_MODE (CC_Z);
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27 CC_MODE (CC_C);
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28 CC_MODE (CC_FP_GT);
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29 CC_MODE (CC_FP_GE);
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30 CC_MODE (CC_FP_ORD);
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31 CC_MODE (CC_FP_UNEQ);
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32 CC_MODE (CC_FPX);
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33
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34 /* Vector modes. */
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35 VECTOR_MODES (INT, 4); /* V4QI V2HI */
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36 VECTOR_MODES (INT, 8); /* V8QI V4HI V2SI */
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37 VECTOR_MODES (INT, 16); /* V16QI V8HI V4SI V2DI */
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38
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39 /* FPU condition flags. */
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40 CC_MODE (CC_FPU);
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41 CC_MODE (CC_FPUE);
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42 CC_MODE (CC_FPU_UNEQ);
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