131
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1 /* Declarations for the C-SKY back end.
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145
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2 Copyright (C) 2018-2020 Free Software Foundation, Inc.
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131
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3 Contributed by C-SKY Microsystems and Mentor Graphics.
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4
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5 This file is part of GCC.
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6
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7 GCC is free software; you can redistribute it and/or modify it
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8 under the terms of the GNU General Public License as published
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9 by the Free Software Foundation; either version 3, or (at your
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10 option) any later version.
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11
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12 GCC is distributed in the hope that it will be useful, but WITHOUT
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13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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15 License for more details.
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16
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17 You should have received a copy of the GNU General Public License
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18 along with GCC; see the file COPYING3. If not see
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19 <http://www.gnu.org/licenses/>. */
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20
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21
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22 #ifndef GCC_CSKY_H
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23 #define GCC_CSKY_H
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24
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25 /* In some places e.g. csky_secondary_reload, we use -1 to indicate an
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26 invalid register. In other places where N is unsigned the comparison
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27 to zero would give an error, so explicitly cast to int here. */
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28 #define CSKY_GENERAL_REGNO_P(N) \
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29 ((N) < CSKY_NGPR_REGS && (int)(N) >= 0)
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30
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31 #define CSKY_VREG_P(N) \
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32 ((N) >= CSKY_FIRST_VFP_REGNUM && (N) <= CSKY_LAST_VFP_REGNUM)
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33
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34 #define CSKY_HILO_REG_P(N) \
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35 ((N) == CSKY_HI_REGNUM || (N) == CSKY_LO_REGNUM)
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36
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37 /* Helper macros for constant constraints and predicates. */
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38 #define CSKY_VALUE_BETWEEN(VALUE, LOW, HIGH) \
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39 ((VALUE) >= (LOW) && (VALUE) <= (HIGH))
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40
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41 #define CSKY_CONST_OK_FOR_I(VALUE) \
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42 CSKY_VALUE_BETWEEN (VALUE, 0, 65535)
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43
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44 #define CSKY_CONST_OK_FOR_J(VALUE) \
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45 CSKY_VALUE_BETWEEN (VALUE, 1, 32)
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46
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47 #define CSKY_CONST_OK_FOR_K(VALUE) \
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48 CSKY_VALUE_BETWEEN (VALUE, 0, 31)
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49
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50 #define CSKY_CONST_OK_FOR_L(VALUE) \
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51 CSKY_VALUE_BETWEEN (VALUE, 1, 8)
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52
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53 #define CSKY_CONST_OK_FOR_M(VALUE) \
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54 CSKY_VALUE_BETWEEN (VALUE, 1, 4096)
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55
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56 #define CSKY_CONST_OK_FOR_N(VALUE) \
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57 CSKY_VALUE_BETWEEN (VALUE, 1, 256)
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58
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59 #define CSKY_CONST_OK_FOR_O(VALUE) \
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60 CSKY_VALUE_BETWEEN (VALUE, 0, 4095)
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61
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62 #define CSKY_CONST_OK_FOR_P(VALUE) \
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63 (((VALUE) & 0x3) == 0 && CSKY_VALUE_BETWEEN (VALUE, 4, 508))
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64
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65 #define CSKY_CONST_OK_FOR_T(VALUE) \
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66 CSKY_VALUE_BETWEEN (VALUE, -256, -1)
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67
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68 #define CSKY_CONST_OK_FOR_Ub(VALUE) \
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69 (exact_log2 (VALUE & 0xFFFFFFFF) >= 0)
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70
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71 #define CSKY_CONST_OK_FOR_Uc(VALUE) \
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72 ((VALUE) == (HOST_WIDE_INT) -1 \
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73 || (exact_log2 ((VALUE) + 1) >= 0 \
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74 && exact_log2 ((VALUE) + 1) <= 31))
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75
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76 #define CSKY_CONST_OK_FOR_Ud(VALUE) \
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77 ((CSKY_CONST_OK_FOR_I ((VALUE) & 0xffffffff) \
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78 || CSKY_CONST_OK_FOR_Ub ((VALUE)) \
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79 || CSKY_CONST_OK_FOR_Uc (((VALUE) << 32) >> 32)) \
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80 && (CSKY_CONST_OK_FOR_I ((VALUE) >> 32) \
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81 || CSKY_CONST_OK_FOR_Ub ((VALUE) >> 32) \
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82 || CSKY_CONST_OK_FOR_Uc ((VALUE) >> 32))) \
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83
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84 #define CSKY_CONST_OK_FOR_Ug(VALUE) \
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85 (((VALUE) & 0x3) == 0 && CSKY_VALUE_BETWEEN (VALUE, -508, -4))
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86
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87 #define CSKY_CONST_OK_FOR_Uh(VALUE) \
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88 CSKY_VALUE_BETWEEN (VALUE, -31, 0)
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89
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90 #define CSKY_CONST_OK_FOR_Uj(VALUE) \
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91 (((VALUE) & 0x3) == 0 && CSKY_VALUE_BETWEEN (VALUE, 1, 1024))
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92
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93 #define CSKY_CONST_OK_FOR_Uk(VALUE) \
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94 CSKY_VALUE_BETWEEN (VALUE, 1, 65536)
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95
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96 #define CSKY_CONST_OK_FOR_Ul(VALUE) \
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97 (((VALUE) & 0x3) == 0 && CSKY_VALUE_BETWEEN (VALUE, -1024, -4))
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98
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99 #define CSKY_CONST_OK_FOR_Um(VALUE) \
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100 CSKY_VALUE_BETWEEN (VALUE, -4096, -1)
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101
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102 #define CSKY_CONST_OK_FOR_US(VALUE) \
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103 CSKY_VALUE_BETWEEN (VALUE, -8, -1)
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104
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105 #define CSKY_CONST_OK_FOR_MOVIH(VALUE) \
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106 (((VALUE) & 0xFFFF) == 0)
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107
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108 #ifndef TARGET_CPU_DEFAULT
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109 #define TARGET_CPU_DEFAULT CSKY_TARGET_CORE_GET(ck810f)
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110 #endif
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111
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112 /* Options that are enabled by default are specified as such in the
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113 .opt file. */
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114 #define TARGET_DEFAULT 0
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115
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116 /* The highest CSKY architecture version supported by the target. */
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117 #define CSKY_TARGET_ARCH(arch) \
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118 (csky_base_arch == CSKY_TARGET_ARCH_GET (arch))
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119
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120 /* Define some macros for target code generation options. */
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121 #define TARGET_SOFT_FPU \
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122 (csky_fpu_index == TARGET_FPU_fpv2_sf)
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123 #define TARGET_CASESI \
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124 (optimize_size && TARGET_CONSTANT_POOL \
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125 && (CSKY_TARGET_ARCH (CK801) || CSKY_TARGET_ARCH (CK802)))
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126 #define TARGET_TLS \
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127 (CSKY_TARGET_ARCH (CK807) || CSKY_TARGET_ARCH (CK810))
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128
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129 /* Number of loads/stores handled by ldm/stm. */
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130 #define CSKY_MIN_MULTIPLE_STLD 3
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131 #define CSKY_MAX_MULTIPLE_STLD 12
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132
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133 /* Pull in enums and defines for processor/arch variants. This makes
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134 it possible to use CSKY_TARGET_ARCH in macros defined in this file. */
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135 #include "csky_opts.h"
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136 extern enum csky_base_architecture csky_base_arch;
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137
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138 /* Pull in enums and defines for ISA features. Likewise required to
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139 support use of CSKY_ISA_FEATURE in this file.
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140 Note that the CSKY_ISA_FEATURE macro tests properties of the
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141 particular processor we're compiling for, not code generation
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142 options that may have dependencies on those features. The latter
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143 are handled by TARGET_xxxx macros/variables instead. See csky.opt. */
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144 #include "csky_isa.h"
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145 extern int csky_arch_isa_features[];
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146 #define CSKY_ISA_FEATURE(IDENT) \
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147 csky_arch_isa_features[CSKY_ISA_FEATURE_GET (IDENT)]
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148
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149 /******************************************************************
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150 * Storage Layout *
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151 ******************************************************************/
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152
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153
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154 /* Define this if most significant bit is lowest numbered
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155 in instructions that operate on numbered bit-fields. */
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156 #define BITS_BIG_ENDIAN 0
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157
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158 /* If the most significant byte of a word is the lowest numbered. */
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159 #define BYTES_BIG_ENDIAN (TARGET_BIG_ENDIAN != 0)
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160
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161 /* If the most significant word of a multiword number is the lowest. */
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162 #define WORDS_BIG_ENDIAN (BYTES_BIG_ENDIAN)
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163
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164 /* Width of a word, in units (bytes). */
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165 #define UNITS_PER_WORD 4
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166
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167 /* Define this macro if it is advisable to hold scalars in registers
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168 in a wider mode than that declared by the program. In such cases,
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169 the value is constrained to be within the bounds of the declared
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170 type, but kept valid in the wider mode. The signedness of the
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171 extension may differ from that of the type. */
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172 #define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \
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173 if (GET_MODE_CLASS (MODE) == MODE_INT \
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174 && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \
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175 (MODE) = SImode;
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176
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177
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178 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
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179 #define PARM_BOUNDARY 32
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180
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181 /* Boundary (in *bits*) on which stack pointer should be aligned.
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182 Per C-SKY, the published V2 ABI document is incorrect and the proper
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183 alignment is on a 4-byte boundary rather than 8 bytes. */
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184 #define STACK_BOUNDARY 32
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185
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186 /* Align definitions of arrays, unions and structures so that
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187 initializations and copies can be made more efficient. This is not
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188 ABI-changing, so it only affects places where we can see the
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189 definition. Increasing the alignment tends to introduce padding,
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190 so don't do this when optimizing for size/conserving stack space. */
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191 #define CSKY_EXPAND_ALIGNMENT(COND, EXP, ALIGN) \
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192 (((COND) && ((ALIGN) < BITS_PER_WORD) \
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193 && (TREE_CODE (EXP) == ARRAY_TYPE \
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194 || TREE_CODE (EXP) == UNION_TYPE \
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195 || TREE_CODE (EXP) == RECORD_TYPE)) \
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196 ? BITS_PER_WORD : (ALIGN))
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197
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198 /* Align global data. */
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199 #define DATA_ALIGNMENT(EXP, ALIGN) \
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200 CSKY_EXPAND_ALIGNMENT (!optimize_size, EXP, ALIGN)
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201
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202 /* Similarly, make sure that objects on the stack are sensibly aligned. */
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203 #define LOCAL_ALIGNMENT(EXP, ALIGN) \
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204 CSKY_EXPAND_ALIGNMENT (!flag_conserve_stack, EXP, ALIGN)
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205
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206 /* No data type wants to be aligned rounder than this. */
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207 #define BIGGEST_ALIGNMENT 32
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208
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209 /* Every structures size must be a multiple of 8 bits. */
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210 #define STRUCTURE_SIZE_BOUNDARY 8
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211
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212 /* Look at the fundamental type that is used for a bit-field and use
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213 that to impose alignment on the enclosing structure.
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214 struct s {int a:8}; should have same alignment as "int", not "char". */
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215 #define PCC_BITFIELD_TYPE_MATTERS 1
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216
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217 /* Largest integer machine mode for structures. If undefined, the default
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218 is GET_MODE_SIZE(DImode). */
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219 #define MAX_FIXED_MODE_SIZE 64
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220
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221 /* Allocation boundary (in *bits*) for the code of a function.
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222 Optimize ck801 and ck802 a little harder for size. */
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223 #define FUNCTION_BOUNDARY \
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224 (((CSKY_TARGET_ARCH (CK801) || CSKY_TARGET_ARCH (CK802)) \
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225 && optimize_size) \
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226 ? 16 : 32)
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227
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228 /* C-SKY does not support unaligned access. */
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229 #define STRICT_ALIGNMENT 1
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230
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231 #undef SIZE_TYPE
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232 #define SIZE_TYPE "unsigned int"
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233
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234 #undef PTRDIFF_TYPE
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235 #define PTRDIFF_TYPE "int"
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236
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237 #undef WCHAR_TYPE
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238 #define WCHAR_TYPE "long int"
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239
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240 #undef UINT_LEAST32_TYPE
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241 #define UINT_LEAST32_TYPE "unsigned int"
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242
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243 #undef INT_LEAST32_TYPE
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244 #define INT_LEAST32_TYPE "int"
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245
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246 #undef WCHAR_TYPE_SIZE
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247 #define WCHAR_TYPE_SIZE BITS_PER_WORD
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248
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249 /******************************************************************
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250 * Layout of Source Language Data Types *
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251 ******************************************************************/
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252
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253
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254 /* 'char' is unsigned by default for backward compatibility. */
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255 #define DEFAULT_SIGNED_CHAR 0
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256
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257
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258 /******************************************************************
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259 * Stack Layout and Calling Conventions *
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260 ******************************************************************/
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261
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262
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263 /* Basic Stack Layout */
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264
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265
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266 /* Define this if pushing a word on the stack
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267 makes the stack pointer a smaller address. */
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268 #define STACK_GROWS_DOWNWARD 1
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269
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270 /* Define this to nonzero if the nominal address of the stack frame
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271 is at the high-address end of the local variables;
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272 that is, each additional local variable allocated
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273 goes at a more negative offset in the frame. */
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274 #define FRAME_GROWS_DOWNWARD 1
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275
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276 /* Offset of first parameter from the argument pointer register value. */
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277 #define FIRST_PARM_OFFSET(FNDECL) 0
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278
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279 /* A C expression whose value is RTL representing the value of the return
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280 address for the frame COUNT steps up from the current frame. */
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281 #define RETURN_ADDR_RTX(COUNT, FRAME) \
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282 csky_return_addr (COUNT, FRAME)
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283
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284 /* Pick up the return address upon entry to a procedure. Used for
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285 dwarf2 unwind information. This also enables the table driven
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286 mechanism. */
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287 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, CSKY_LR_REGNUM)
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288
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289
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290 /* Exception Handling Support */
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291
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292 /* The register that holds the return address in exception handlers. */
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293 #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (SImode, CSKY_EH_STACKADJ_REGNUM)
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294
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145
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295 /* Select a format to encode pointers in exception handling data. */
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296 #define ASM_PREFERRED_EH_DATA_FORMAT(CODE, GLOBAL) \
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297 (((GLOBAL) ? DW_EH_PE_indirect : 0) | DW_EH_PE_pcrel | DW_EH_PE_sdata4)
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131
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298
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299 /* Registers That Address the Stack Frame */
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300
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301
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302 /* Register to use for pushing function arguments. */
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303 #define STACK_POINTER_REGNUM CSKY_SP_REGNUM
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304
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305 /* Base register for access to local variables of the function. */
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306 #define FRAME_POINTER_REGNUM 8
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307
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308 /* Base register for access to arguments of the function. This is a fake
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309 register that is always eliminated. */
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310 #define ARG_POINTER_REGNUM 32
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311
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312 /* Static chain register.
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313 Register use is more restricted on CK801. */
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314 #define STATIC_CHAIN_REGNUM (CSKY_TARGET_ARCH (CK801) ? 13 : 12)
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315
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316
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317 /* Eliminating Frame Pointer and Arg Pointer */
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318
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319
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320 /* Definitions for register eliminations.
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321
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322 This is an array of structures. Each structure initializes one pair
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323 of eliminable registers. The "from" register number is given first,
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324 followed by "to". Eliminations of the same "from" register are listed
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325 in order of preference.
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326
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327 We have two registers that can be eliminated on the CSKY. First, the
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328 arg pointer register can often be eliminated in favor of the stack
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329 pointer register. Secondly, the pseudo frame pointer register can always
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330 be eliminated; it is replaced with the stack pointer. */
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331 #define ELIMINABLE_REGS \
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332 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM },\
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333 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM },\
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334 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM }}
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335
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336 /* Define the offset between two registers, one to be eliminated, and the
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337 other its replacement, at the start of a routine. */
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338 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
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339 (OFFSET) = csky_initial_elimination_offset (FROM, TO)
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340
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341
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342 /* Passing Function Arguments on the Stack */
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343
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344
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345 /* Define this if the maximum size of all the outgoing args is to be
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346 accumulated and pushed during the prologue. The amount can be
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347 found in the variable crtl->outgoing_args_size. */
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348 #define ACCUMULATE_OUTGOING_ARGS 1
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349
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350
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351 /* Passing Arguments in Registers */
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352
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353
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354 /* A C type for declaring a variable that is used as the first argument of
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355 TARGET_ FUNCTION_ARG and other related values. */
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356 #define CUMULATIVE_ARGS int
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357
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358 /* Initialize a variable CUM of type CUMULATIVE_ARGS
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359 for a call to a function whose data type is FNTYPE.
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360 For a library call, FNTYPE is 0.
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361
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362 On CSKY, the offset always starts at 0: the first parm reg is always
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363 the same reg. */
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364 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
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365 ((CUM) = 0)
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366
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367 /* True if N is a possible register number for function argument passing.
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368 On the CSKY, r0-r3 are used to pass args.
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369 The int cast is to prevent a complaint about unsigned comparison to
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370 zero, since CSKY_FIRST_PARM_REGNUM is zero. */
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371 #define FUNCTION_ARG_REGNO_P(REGNO) \
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372 (((int)(REGNO) >= CSKY_FIRST_PARM_REGNUM) && \
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373 ((REGNO) < (CSKY_NPARM_REGS + CSKY_FIRST_PARM_REGNUM)))
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374
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375 /* How Large Values Are Returned */
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376
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377
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378 /* Define DEFAULT_PCC_STRUCT_RETURN to 1 if all structure and union return
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379 values must be in memory. On the CSKY, small
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380 structures (eight bytes or fewer) are returned in
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381 the register pair r0/r1. */
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382 #define DEFAULT_PCC_STRUCT_RETURN 0
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383
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384 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
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385 the stack pointer does not matter. The value is tested only in
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386 functions that have frame pointers.
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387 No definition is equivalent to always zero.
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388
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389 On the CSKY, the function epilogue recovers the stack pointer from the
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390 frame. */
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391 #define EXIT_IGNORE_STACK 1
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392
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393
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394 /******************************************************************
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395 * Register Usage & Register Classes *
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396 ******************************************************************/
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397
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398
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399 #define FIRST_PSEUDO_REGISTER 71
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400
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401 /* 1 for registers that have pervasive standard uses
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402 and are not available for the register allocator.
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403 On C-SKY, r14 is SP, r26 is used by linker,
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404 r27 is used by assembler, r28 is data base address,
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405 r29 is GOT base address, r30 is handler base address,
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406 r31 is TLS register. */
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407 #define FIXED_REGISTERS \
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408 /* r0 r1 r2 r3 r4 r5 r6 r7 */ \
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409 { 0, 0, 0, 0, 0, 0, 0, 0, \
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410 /* r8 r9 r10 r11 r12 r13 r14 r15 */ \
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411 0, 0, 0, 0, 0, 0, 1, 0, \
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412 /* r16 r17 r18 r19 r20 r21 r22 r23 */ \
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413 0, 0, 0, 0, 0, 0, 0, 0, \
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414 /* r24 r25 r26 r27 r28 r29 r30 tls */ \
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415 0, 0, 1, 1, 1, 1, 1, 1, \
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416 /* reserved c hi lo */ \
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417 1, 1, 0, 0, \
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418 /* reserved */ \
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419 1, 1, 1, 1, 1, 1, 1, 1, \
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420 1, 1, 1, 1, 1, 1, 1, 1, \
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421 /* vr0 vr1 vr2 vr3 vr4 vr5 vr6 vr7 */ \
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422 0, 0, 0, 0, 0, 0, 0, 0, \
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423 /* vr8 vr9 vr10 vr11 vr12 vr13 vr14 vr15 */ \
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424 0, 0, 0, 0, 0, 0, 0, 0 , \
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425 /* reserved */ \
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426 1, 1, \
|
|
427 /* epc */ \
|
|
428 1 \
|
|
429 }
|
|
430
|
|
431 /* Like `CALL_USED_REGISTERS' but used to overcome a historical
|
|
432 problem which makes CALL_USED_REGISTERS *always* include
|
|
433 all the FIXED_REGISTERS. Until this problem has been
|
|
434 resolved this macro can be used to overcome this situation.
|
|
435 In particular, block_propagate() requires this list
|
|
436 be accurate, or we can remove registers which should be live.
|
|
437 This macro is used in get_csky_live_regs(). */
|
|
438 #define CALL_REALLY_USED_REGISTERS \
|
|
439 /* r0 r1 r2 r3 r4 r5 r6 r7 */ \
|
|
440 { 1, 1, 1, 1, 0, 0, 0, 0, \
|
|
441 /* r8 r9 r10 r11 r12 r13 r14 r15 */ \
|
|
442 0, 0, 0, 0, 1, 1, 1, 0, \
|
|
443 /* r16 r17 r18 r19 r20 r21 r22 r23 */ \
|
|
444 0, 0, 1, 1, 1, 1, 1, 1, \
|
|
445 /* r24 r25 r26 r27 r28 r29 r30 r31 */ \
|
|
446 1, 1, 1, 1, 1, 1, 1, 1, \
|
|
447 /* reserved c hi lo */ \
|
|
448 1, 1, 1, 1, \
|
|
449 /* reserved */ \
|
|
450 1, 1, 1, 1, 1, 1, 1, 1, \
|
|
451 1, 1, 1, 1, 1, 1, 1, 1, \
|
|
452 /* vr0 vr1 vr2 vr3 vr4 vr5 vr6 vr7 */ \
|
|
453 1, 1, 1, 1, 1, 1, 1, 1, \
|
|
454 /* vr8 vr9 vr10 vr11 vr12 vr13 vr14 vr15 */ \
|
|
455 1, 1, 1, 1, 1, 1, 1, 1, \
|
|
456 /* reserved */ \
|
|
457 1, 1, \
|
|
458 /* epc */ \
|
|
459 1 \
|
|
460 }
|
|
461
|
|
462 #define REGISTER_NAMES \
|
|
463 { \
|
|
464 "a0", "a1", "a2", "a3", "l0", "l1", "l2", "l3", \
|
|
465 "l4", "l5", "l6", "l7", "t0", "t1", "sp", "lr", \
|
|
466 "l8", "l9", "t2", "t3", "t4", "t5", "t6", "t7", \
|
|
467 "t8", "t9", "r26", "r27", "gb", "r29", "svbr", "r31", \
|
|
468 /* reserved */ \
|
|
469 "reserved", \
|
|
470 /* CC register: 33 */ \
|
|
471 "c", \
|
|
472 /* DSP instruction register: 34, 35 */ \
|
|
473 "hi", "lo", \
|
|
474 "reserved", "reserved", "reserved", "reserved", "reserved", \
|
|
475 "reserved", "reserved", "reserved", "reserved", "reserved", \
|
|
476 "reserved", "reserved", "reserved", "reserved", "reserved", \
|
|
477 "reserved", \
|
|
478 /* V registers: 52~67 */ \
|
|
479 "vr0", "vr1", "vr2", "vr3", "vr4", "vr5", "vr6", "vr7", \
|
|
480 "vr8", "vr9", "vr10", "vr11", "vr12", "vr13", "vr14", "vr15", \
|
|
481 "reserved", "reserved", \
|
|
482 "epc" \
|
|
483 }
|
|
484
|
|
485 /* Table of additional register names to use in user input. */
|
|
486 #define ADDITIONAL_REGISTER_NAMES \
|
|
487 { \
|
|
488 {"r0", 0}, \
|
|
489 {"r1", 1}, \
|
|
490 {"r2", 2}, \
|
|
491 {"r3", 3}, \
|
|
492 {"r4", 4}, \
|
|
493 {"r5", 5}, \
|
|
494 {"r6", 6}, \
|
|
495 {"r7", 7}, \
|
|
496 {"r8", 8}, \
|
|
497 {"r9", 9}, \
|
|
498 {"r10", 10}, \
|
|
499 {"r11", 11}, \
|
|
500 {"r12", 12}, \
|
|
501 {"r13", 13}, \
|
|
502 {"r14", 14}, \
|
|
503 {"r15", 15}, \
|
|
504 {"r16", 16}, \
|
|
505 {"r17", 17}, \
|
|
506 {"r18", 18}, \
|
|
507 {"r19", 19}, \
|
|
508 {"r20", 20}, \
|
|
509 {"r21", 21}, \
|
|
510 {"r22", 22}, \
|
|
511 {"r23", 23}, \
|
|
512 {"r24", 24}, \
|
|
513 {"r25", 25}, \
|
|
514 {"r26", 26}, \
|
|
515 {"r27", 27}, \
|
|
516 {"r28", 28}, \
|
|
517 {"r29", 29}, \
|
|
518 {"r30", 30}, \
|
|
519 {"r31", 31}, \
|
|
520 }
|
|
521
|
|
522 /* The order in which registers should be allocated.
|
|
523 It is better to use the registers the caller need not save.
|
|
524 Allocate r0 through r3 in reverse order since r3 is least likely
|
|
525 to contain a function parameter; in addition results are returned
|
|
526 in r0. It is quite good to use lr since other calls may clobber
|
|
527 it anyway. */
|
|
528 #define REG_ALLOC_ORDER \
|
|
529 /* r3 r2 r1 r0 r12 r13 r18 r19 */ \
|
|
530 { 3, 2, 1, 0, 12, 13, 18, 19, \
|
|
531 /* r20 r21 r22 r23 r24 r25 */ \
|
|
532 20, 21, 22, 23, 24, 25, \
|
|
533 /* r15 r4 r5 r6 r7 r8 r9 r10 r11 */ \
|
|
534 15, 4, 5, 6, 7, 8, 9, 10, 11, \
|
|
535 /* r16 r17 r26 r27 r28 r29 r30 hi lo */ \
|
|
536 16, 17, 26, 27, 28, 29, 30, 34, 35, \
|
|
537 /* vr0 vr1 vr2 vr3 vr4 vr5 vr6 vr7 */ \
|
|
538 52, 53, 54, 55, 56, 57, 58, 59, \
|
|
539 /* vr8 vr9 vr10 vr11 vr12 vr13 vr14 vr15 */ \
|
|
540 60, 61, 62, 63, 64, 65, 66, 67, \
|
|
541 /* reserved */ \
|
|
542 36, 37, 38, 39, 40, 41, 42, 43, \
|
|
543 44, 45, 46, 47, 48, 49, 50, 51, \
|
|
544 /* sp tls reserved c reserved epc */ \
|
|
545 14, 31, 32, 33, 68, 69, 70 }
|
|
546
|
|
547 /* Register classes. */
|
|
548 enum reg_class
|
|
549 {
|
|
550 NO_REGS,
|
|
551 MINI_REGS,
|
|
552 SP_REGS,
|
|
553 LOW_REGS,
|
|
554 GENERAL_REGS,
|
|
555 C_REGS,
|
|
556 HI_REGS,
|
|
557 LO_REGS,
|
|
558 HILO_REGS,
|
|
559 V_REGS,
|
|
560 OTHER_REGS,
|
|
561 RESERVE_REGS,
|
|
562 ALL_REGS,
|
|
563 LIM_REG_CLASSES
|
|
564 };
|
|
565
|
|
566 #define N_REG_CLASSES (int) LIM_REG_CLASSES
|
|
567
|
|
568 /* Give names of register classes as strings for dump file. */
|
|
569 #define REG_CLASS_NAMES \
|
|
570 { \
|
|
571 "NO_REGS", \
|
|
572 "MINI_REGS", \
|
|
573 "SP_REGS", \
|
|
574 "LOW_REGS", \
|
|
575 "GENERAL_REGS", \
|
|
576 "C_REGS", \
|
|
577 "HI_REGS", \
|
|
578 "LO_REGS", \
|
|
579 "HILO_REGS", \
|
|
580 "V_REGS", \
|
|
581 "OTHER_REGS", \
|
|
582 "RESERVE_REGS", \
|
|
583 "ALL_REGS", \
|
|
584 }
|
|
585
|
|
586 /* Define which registers fit in which classes. This is an initializer
|
|
587 for a vector of HARD_REG_SET of length N_REG_CLASSES. */
|
|
588 #define REG_CLASS_CONTENTS \
|
|
589 { \
|
|
590 {0x00000000, 0x00000000, 0x00000000 }, /* NO_REGS */ \
|
|
591 {0x000000FF, 0x00000000, 0x00000000 }, /* MINI_REGS */ \
|
|
592 {0x00004000, 0x00000000, 0x00000000 }, /* SP_REGS */ \
|
|
593 {0x0000FFFF, 0x00000000, 0x00000000 }, /* LOW_REGS */ \
|
|
594 {0xFFFFFFFF, 0x00000000, 0x00000000 }, /* GENERAL_REGS */ \
|
|
595 {0x00000000, 0x00000002, 0x00000000 }, /* C_REGS */ \
|
|
596 {0x00000000, 0x00000004, 0x00000000 }, /* HI_REG */ \
|
|
597 {0x00000000, 0x00000008, 0x00000000 }, /* LO_REG */ \
|
|
598 {0x00000000, 0x0000000c, 0x00000000 }, /* HILO_REGS */ \
|
|
599 {0x00000000, 0xFFF00000, 0x0000000F }, /* V_REGS */ \
|
|
600 {0x00000000, 0x00000000, 0x00000040 }, /* OTHER_REGS */ \
|
|
601 {0x00000000, 0x0FF00001, 0x00000030 }, /* RESERVE_REGS */ \
|
|
602 {0xFFFFFFFF, 0xFFFFFFFF, 0x0000007F }, /* ALL_REGS */ \
|
|
603 }
|
|
604
|
|
605 /* Return register class from regno. */
|
|
606 extern enum reg_class regno_reg_class[FIRST_PSEUDO_REGISTER];
|
|
607 #define REGNO_REG_CLASS(REGNO) regno_reg_class[REGNO]
|
|
608
|
|
609 /* The class value for index registers, and the one for base regs. */
|
|
610 #define INDEX_REG_CLASS (CSKY_ISA_FEATURE (2E3) ? GENERAL_REGS : NO_REGS)
|
|
611 #define BASE_REG_CLASS GENERAL_REGS
|
|
612
|
|
613 /* TODO is it necessary to set it to MINI_REGS to emit more 16-bit
|
|
614 instructions? */
|
|
615 #define MODE_BASE_REG_CLASS(MODE) GENERAL_REGS
|
|
616
|
|
617 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
|
|
618 and check its validity for a certain class.
|
|
619 We have two alternate definitions for each of them.
|
|
620 The usual definition accepts all pseudo regs; the other rejects
|
|
621 them unless they have been allocated suitable hard regs.
|
|
622 The symbol REG_OK_STRICT causes the latter definition to be used.
|
|
623
|
|
624 Most source files want to accept pseudo regs in the hope that
|
|
625 they will get allocated to the class that the insn wants them to be in.
|
|
626 Source files for reload pass need to be strict.
|
|
627 After reload, it makes no difference, since pseudo regs have
|
|
628 been eliminated by then.
|
|
629
|
|
630 The reg_renumber is used to map pseudo regs into hardware
|
|
631 regs, it is set up as a result of register allocation. */
|
|
632 #ifdef REG_OK_STRICT
|
|
633 #define REGNO_OK_FOR_BASE_P(REGNO) \
|
|
634 (CSKY_GENERAL_REGNO_P (REGNO) \
|
|
635 || CSKY_GENERAL_REGNO_P (reg_renumber[(REGNO)]) )
|
|
636 #else
|
|
637 #define REGNO_OK_FOR_BASE_P(REGNO) \
|
|
638 (CSKY_GENERAL_REGNO_P (REGNO) \
|
|
639 || (REGNO) >= FIRST_PSEUDO_REGISTER)
|
|
640 #endif
|
|
641
|
|
642
|
|
643 #ifdef REG_OK_STRICT
|
|
644 #define REGNO_OK_FOR_INDEX_P(REGNO) \
|
|
645 (CSKY_GENERAL_REGNO_P (REGNO) \
|
|
646 || CSKY_GENERAL_REGNO_P (reg_renumber[(REGNO)]) )
|
|
647 #else
|
|
648 #define REGNO_OK_FOR_INDEX_P(REGNO) \
|
|
649 (CSKY_GENERAL_REGNO_P (REGNO) \
|
|
650 || (REGNO) >= FIRST_PSEUDO_REGISTER)
|
|
651 #endif
|
|
652
|
|
653
|
|
654 /******************************************************************
|
|
655 * Addressing Modes *
|
|
656 ******************************************************************/
|
|
657
|
|
658
|
|
659 /* Recognize any constant value that is a valid address. */
|
|
660 #define CONSTANT_ADDRESS_P(X) \
|
|
661 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF)
|
|
662
|
|
663 /* Maximum number of registers that can appear in a valid memory address.
|
|
664 Shifts in addresses can't be by a register. */
|
|
665 #define MAX_REGS_PER_ADDRESS 2
|
|
666
|
|
667
|
|
668 /******************************************************************
|
|
669 * Run-time Target *
|
|
670 ******************************************************************/
|
|
671
|
|
672
|
|
673 #define TARGET_CPU_CPP_BUILTINS() \
|
|
674 csky_cpu_cpp_builtins (pfile)
|
|
675
|
|
676 /******************************************************************
|
|
677 * Per-function Data *
|
|
678 ******************************************************************/
|
|
679
|
|
680
|
|
681 /* Initialize data used by insn expanders. This is called from insn_emit,
|
|
682 once for every function before code is generated. */
|
|
683 #define INIT_EXPANDERS csky_init_expanders ()
|
|
684
|
|
685
|
|
686 /******************************************************************
|
|
687 * Dividing the Output into Sections (Texts, Data, . . . ) *
|
|
688 ******************************************************************/
|
|
689
|
|
690
|
|
691 /* Switch to the text or data segment. */
|
|
692 #define TEXT_SECTION_ASM_OP "\t.text"
|
|
693 #define DATA_SECTION_ASM_OP "\t.data"
|
|
694
|
|
695 /* The subroutine calls in the .init and .fini sections create literal
|
|
696 pools which must be jumped around... */
|
|
697 #define FORCE_CODE_SECTION_ALIGN \
|
|
698 asm ("br 1f ; .literals ; .align 2 ; 1:");
|
|
699
|
|
700 /* Define this macro to be an expression with a nonzero value if
|
|
701 jump tables (for tablejump insns) should be output in the text section,
|
|
702 along with the assembler instructions. */
|
|
703 #define JUMP_TABLES_IN_TEXT_SECTION TARGET_CASESI
|
|
704
|
|
705
|
|
706 /******************************************************************
|
|
707 * Assembler Format *
|
|
708 ******************************************************************/
|
|
709
|
|
710
|
|
711 /* A C string constant for text to be output before(after) each asm
|
|
712 statement or group of consecutive ones. */
|
|
713 #undef ASM_APP_ON
|
|
714 #define ASM_APP_ON "// inline asm begin\n"
|
|
715 #undef ASM_APP_OFF
|
|
716 #define ASM_APP_OFF "// inline asm end\n"
|
|
717
|
|
718 /* A C string constant describing how to begin a comment in the target
|
|
719 assembler language. */
|
|
720 #define ASM_COMMENT_START "\t//"
|
|
721
|
|
722 /* This says how to output an assembler line
|
|
723 to define a global common symbol, with alignment information. */
|
|
724 #undef ASM_OUTPUT_ALIGNED_COMMON
|
|
725 #define ASM_OUTPUT_ALIGNED_COMMON(STREAM, NAME, SIZE, ALIGN) \
|
|
726 do \
|
|
727 { \
|
|
728 fputs ("\t.comm\t", STREAM); \
|
|
729 assemble_name (STREAM, NAME); \
|
|
730 fprintf (STREAM, ",%lu, %u\n", (unsigned long)(SIZE), \
|
|
731 (ALIGN) / BITS_PER_UNIT); \
|
|
732 } \
|
|
733 while (0)
|
|
734
|
|
735 /* Define a local common symbol whose alignment we wish to specify.
|
|
736 ALIGN comes in as bits, we have to turn it into bytes. */
|
|
737 #undef ASM_OUTPUT_ALIGNED_LOCAL
|
|
738 #define ASM_OUTPUT_ALIGNED_LOCAL(STREAM, NAME, SIZE, ALIGN) \
|
|
739 do \
|
|
740 { \
|
|
741 fputs ("\t.bss\t", (STREAM)); \
|
|
742 assemble_name ((STREAM), (NAME)); \
|
|
743 fprintf ((STREAM), ",%d, %d\n", (int)(SIZE), \
|
|
744 (ALIGN) / BITS_PER_UNIT); \
|
|
745 } \
|
|
746 while (0)
|
|
747
|
|
748 /* Globalizing directive for a label. */
|
|
749 #define GLOBAL_ASM_OP "\t.global\t"
|
|
750
|
|
751 /* Output a reference to a label. */
|
|
752 #undef ASM_OUTPUT_LABELREF
|
|
753 #define ASM_OUTPUT_LABELREF(STREAM, NAME) \
|
|
754 fprintf (STREAM, "%s%s", user_label_prefix, \
|
|
755 (* targetm.strip_name_encoding) (NAME))
|
|
756
|
|
757 /* Make an internal label into a string. */
|
|
758 #undef ASM_GENERATE_INTERNAL_LABEL
|
|
759 #define ASM_GENERATE_INTERNAL_LABEL(STRING, PREFIX, NUM) \
|
|
760 sprintf (STRING, "*.%s%ld", PREFIX, (long) NUM)
|
|
761
|
|
762 /* This is how to output an insn to push a register on the stack.
|
|
763 It need not be very fast code. */
|
|
764 #define ASM_OUTPUT_REG_PUSH(STREAM,REGNO) \
|
|
765 fprintf (STREAM, "\tsubi\t %s,%d\n\tst.w\t %s,(%s)\n", \
|
|
766 reg_names[STACK_POINTER_REGNUM], \
|
|
767 (STACK_BOUNDARY / BITS_PER_UNIT), \
|
|
768 reg_names[REGNO], \
|
|
769 reg_names[STACK_POINTER_REGNUM])
|
|
770
|
|
771 /* This is how to output an insn to pop a register from the stack. */
|
|
772 #define ASM_OUTPUT_REG_POP(STREAM,REGNO) \
|
|
773 fprintf (STREAM, "\tld.w\t %s,(%s)\n\taddi\t %s,%d\n", \
|
|
774 reg_names[REGNO], \
|
|
775 reg_names[STACK_POINTER_REGNUM], \
|
|
776 reg_names[STACK_POINTER_REGNUM], \
|
|
777 (STACK_BOUNDARY / BITS_PER_UNIT))
|
|
778
|
|
779 /* Output an element of a dispatch table. */
|
|
780 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM,VALUE) \
|
|
781 fprintf (STREAM, "\t.long\t.L%d\n", VALUE)
|
|
782
|
|
783 /* This is how to output an assembler line
|
|
784 that says to advance the location counter by SIZE bytes. */
|
|
785 #undef ASM_OUTPUT_SKIP
|
|
786 #define ASM_OUTPUT_SKIP(STREAM,SIZE) \
|
|
787 fprintf (STREAM, "\t.fill %d, 1\n", (int)(SIZE))
|
|
788
|
|
789 /* Align output to a power of two. Note ".align 0" is redundant,
|
|
790 and also GAS will treat it as ".align 2" which we do not want. */
|
|
791 #define ASM_OUTPUT_ALIGN(STREAM, POWER) \
|
|
792 do \
|
|
793 { \
|
|
794 if ((POWER) > 0) \
|
|
795 fprintf (STREAM, "\t.align\t%d\n", POWER); \
|
|
796 } \
|
|
797 while (0)
|
|
798
|
|
799
|
|
800 /******************************************************************
|
|
801 * Controlling the Compilation Driver *
|
|
802 ******************************************************************/
|
|
803
|
|
804
|
|
805 /* Define this macro as a C expression for the initializer of an
|
|
806 array of string to tell the driver program which options are
|
|
807 defaults for this target and thus do not need to be handled
|
|
808 specially when using MULTILIB_OPTIONS. */
|
|
809 #undef MULTILIB_DEFAULTS
|
|
810 #define MULTILIB_DEFAULTS \
|
|
811 {"mlittle-endian", "mcpu=ck810f", "msoft-float"}
|
|
812
|
|
813 /* Support for a compile-time default CPU, et cetera. The rules are:
|
|
814 --with-arch is ignored if -march or -mcpu are specified.
|
|
815 --with-cpu is ignored if -march or -mcpu are specified, and is overridden
|
|
816 by --with-arch. */
|
|
817 #define OPTION_DEFAULT_SPECS \
|
|
818 {"arch", "%{!march=*:%{!mcpu=*:-march=%(VALUE)}}" }, \
|
|
819 {"cpu", "%{!march=*:%{!mcpu=*:-mcpu=%(VALUE)}}" }, \
|
|
820 {"endian", "%{!mbig-endian:%{!mlittle-endian:-m%(VALUE)-endian}}" }, \
|
|
821 {"float", "%{!msoft-float:%{!mhard-float:-m%(VALUE)-float}}" },
|
|
822
|
|
823
|
|
824 /******************************************************************
|
|
825 * Position Independent Code *
|
|
826 ******************************************************************/
|
|
827
|
|
828 /* Define the global table register. */
|
|
829 #define PIC_OFFSET_TABLE_REGNUM (flag_pic ? CSKY_GB_REGNUM : INVALID_REGNUM)
|
|
830
|
|
831 /* Nonzero if x is a legitimate immediate operand on the target machine
|
|
832 when generating position-independent code. */
|
|
833 #define LEGITIMATE_PIC_OPERAND_P(X) \
|
|
834 csky_legitimate_pic_operand_p (X)
|
|
835
|
|
836
|
|
837 /******************************************************************
|
|
838 * Controlling Debugging Information Format *
|
|
839 ******************************************************************/
|
|
840
|
|
841
|
|
842 /* Define this macro if GCC should produce dwarf version 2 format debugging
|
|
843 output in response to the `-g' option. */
|
|
844 #define DWARF2_DEBUGGING_INFO 1
|
|
845
|
|
846 /* Define this macro to 0 if your target supports DWARF 2 frame unwind
|
|
847 information, but it does not yet work with exception handling. */
|
|
848 #define DWARF2_UNWIND_INFO 1
|
|
849
|
|
850 /* Define this if you have arranged for GCC to support
|
|
851 more than one format of debugging output.
|
|
852 The value of this macro only affects the default debugging output. */
|
|
853 #define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG
|
|
854
|
|
855 /* Define this macro if the target’s representation
|
|
856 for dwarf registers used in .eh_frame or .debug_frame
|
|
857 is different from that used in other debug info sections.
|
|
858 Given a GCC hard register number,
|
|
859 this macro should return the .eh_frame register number.*/
|
|
860 #define DWARF_FRAME_REGNUM(REG) DBX_REGISTER_NUMBER (REG)
|
|
861
|
|
862 /* If INCOMING_RETURN_ADDR_RTX is defined & the RTL is REG,
|
|
863 define DWARF_FRAME_RETURN_COLUMN to DWARF_FRAME_REGNUM. */
|
|
864 #define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (CSKY_LR_REGNUM)
|
|
865
|
|
866 /* Use r0 and r1 to pass exception handling information. */
|
|
867 #define EH_RETURN_DATA_REGNO(N) ((N) < 2 ? N : INVALID_REGNUM)
|
|
868
|
|
869 /* How to renumber registers for dbx and gdb. */
|
|
870 extern const int csky_dbx_regno[];
|
|
871 #define DBX_REGISTER_NUMBER(REGNO) ((unsigned int) csky_dbx_regno[REGNO])
|
|
872
|
|
873
|
|
874 /******************************************************************
|
|
875 * Miscellaneous Parameters *
|
|
876 ******************************************************************/
|
|
877
|
|
878
|
|
879 /* Specify the machine mode that this machine uses
|
|
880 for the index in the tablejump instruction. */
|
|
881 #define CASE_VECTOR_MODE SImode
|
|
882
|
|
883 /* Define if operations between registers always perform the operation
|
|
884 on the full register even if a narrower mode is specified. */
|
|
885 #define WORD_REGISTER_OPERATIONS 1
|
|
886
|
|
887 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
|
|
888 will either zero-extend or sign-extend. The value of this macro should
|
|
889 be the code that says which one of the two operations is implicitly
|
|
890 done, UNKNOWN if none. */
|
|
891 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
|
|
892
|
|
893 /* Max number of bytes we can move from memory to memory
|
|
894 in one reasonably fast instruction. */
|
|
895 #define MOVE_MAX 4
|
|
896
|
|
897 /* Shift counts are truncated to 6-bits (0 to 63) instead of the expected
|
145
|
898 5-bits, so we cannot define SHIFT_COUNT_TRUNCATED to true for this
|
131
|
899 target. */
|
|
900 #define SHIFT_COUNT_TRUNCATED 0
|
|
901
|
|
902 #define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 32, 1)
|
|
903
|
|
904 /* The machine modes of pointers and functions. */
|
|
905 #define Pmode SImode
|
|
906 #define FUNCTION_MODE Pmode
|
|
907
|
|
908 /* Define this macro to be a C expression to indicate when jump-tables
|
|
909 should contain relative addresses. */
|
|
910 #define CASE_VECTOR_PC_RELATIVE \
|
|
911 (optimize_size && TARGET_CONSTANT_POOL \
|
|
912 && (CSKY_TARGET_ARCH (CK802) || CSKY_TARGET_ARCH (CK801)))
|
|
913
|
|
914 /* Return the preferred mode for an addr_diff_vec when the minimum
|
|
915 and maximum offset are known. */
|
|
916 #define CASE_VECTOR_SHORTEN_MODE(min, max, body) \
|
|
917 (min >= 0 && max < 512 \
|
|
918 ? (ADDR_DIFF_VEC_FLAGS (body).offset_unsigned = 1, QImode) \
|
|
919 : min >= -256 && max < 256 \
|
|
920 ? (ADDR_DIFF_VEC_FLAGS (body).offset_unsigned = 0, QImode) \
|
|
921 : min >= 0 && max < 8192 \
|
|
922 ? (ADDR_DIFF_VEC_FLAGS (body).offset_unsigned = 1, HImode) \
|
|
923 : min >= -4096 && max < 4096 \
|
|
924 ? (ADDR_DIFF_VEC_FLAGS (body).offset_unsigned = 0, HImode) \
|
|
925 : SImode)
|
|
926
|
|
927 /* This is how to output an element of a case-vector that is relative. */
|
|
928 #define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL) \
|
|
929 do \
|
|
930 { \
|
|
931 if (optimize_size && TARGET_CONSTANT_POOL \
|
|
932 && (CSKY_TARGET_ARCH (CK802) || CSKY_TARGET_ARCH (CK801))) \
|
|
933 { \
|
|
934 switch (GET_MODE (BODY)) \
|
|
935 { \
|
|
936 case E_QImode: \
|
|
937 asm_fprintf (STREAM, "\t.byte\t(.L%d-.L%d)/2\n", \
|
|
938 VALUE, REL); \
|
|
939 break; \
|
|
940 case E_HImode: /* TBH */ \
|
|
941 asm_fprintf (STREAM, "\t.short\t(.L%d-.L%d)/2\n", \
|
|
942 VALUE, REL); \
|
|
943 break; \
|
|
944 case E_SImode: \
|
|
945 asm_fprintf (STREAM, "\t.long\t.L%d-.L%d\n", \
|
|
946 VALUE, REL); \
|
|
947 break; \
|
|
948 default: \
|
|
949 gcc_unreachable (); \
|
|
950 } \
|
|
951 } \
|
|
952 else \
|
|
953 asm_fprintf (STREAM, "\t.long\t.L%d@GOTOFF\n", VALUE); \
|
|
954 } while (0)
|
|
955
|
|
956 /* This macro is not documented yet.
|
|
957 But we do need it to make jump table vector aligned. */
|
|
958 #define ADDR_VEC_ALIGN(JUMPTABLE) 0
|
|
959
|
|
960 /* We have to undef this first to override the version from elfos.h. */
|
|
961 #undef ASM_OUTPUT_CASE_LABEL
|
|
962 #define ASM_OUTPUT_CASE_LABEL(stream, prefix, num, table) \
|
|
963 do \
|
|
964 { \
|
|
965 if (GET_MODE (PATTERN (table)) == SImode) \
|
|
966 ASM_OUTPUT_ALIGN (stream, 2); \
|
|
967 (*targetm.asm_out.internal_label) (stream, prefix, num); \
|
|
968 } while (0)
|
|
969
|
|
970 /* Make sure subsequent insns are aligned after a byte-sized jump offset
|
|
971 table. */
|
|
972 #define ASM_OUTPUT_CASE_END(stream, num, table) \
|
|
973 do \
|
|
974 { \
|
|
975 if (GET_MODE (PATTERN (table)) == QImode) \
|
|
976 ASM_OUTPUT_ALIGN (stream, 1); \
|
|
977 } while (0)
|
|
978
|
|
979
|
|
980
|
|
981
|
|
982 /******************************************************************
|
|
983 * Trampolines for Nested Functions *
|
|
984 ******************************************************************/
|
|
985
|
|
986
|
|
987 /* Length in units of the trampoline for entering a nested function. */
|
|
988 #define TRAMPOLINE_SIZE (CSKY_ISA_FEATURE (2E3) ? 16 : 20)
|
|
989
|
|
990 /* Alignment required for a trampoline in bits. */
|
|
991 #define TRAMPOLINE_ALIGNMENT 32
|
|
992
|
|
993
|
|
994 /******************************************************************
|
|
995 * Describing Relative Costs of Operations *
|
|
996 ******************************************************************/
|
|
997
|
|
998
|
|
999 /* Nonzero if access to memory by bytes is slow and undesirable.
|
|
1000 For RISC chips, it means that access to memory by bytes is no
|
|
1001 better than access by words when possible, so grab a whole word
|
|
1002 and maybe make use of that. */
|
|
1003 #define SLOW_BYTE_ACCESS 0
|
|
1004
|
|
1005 /* On C-SKY, function CSE would allow use of 16-bit jsr instructions
|
|
1006 instead of normal 32-bit calls. But it also needs a separate constant
|
|
1007 pool entry for the function address and an instruction to load it, and
|
|
1008 may cause additional spills due to increased register pressure, etc.
|
|
1009 It doesn't seem like a good idea overall. */
|
|
1010 #define NO_FUNCTION_CSE 1
|
|
1011
|
|
1012 /* Try to generate sequences that don't involve branches, we can then use
|
|
1013 conditional instructions. */
|
|
1014 #define BRANCH_COST(speed_p, predictable_p) \
|
|
1015 csky_default_branch_cost (speed_p, predictable_p)
|
|
1016
|
|
1017 /* False if short circuit operation is preferred. */
|
|
1018 #define LOGICAL_OP_NON_SHORT_CIRCUIT \
|
|
1019 (csky_default_logical_op_non_short_circuit ())
|
|
1020
|
|
1021
|
|
1022 /******************************************************************
|
|
1023 * Generating Code for Profiling *
|
|
1024 ******************************************************************/
|
|
1025
|
|
1026
|
|
1027 #define FUNCTION_PROFILER(FILE, LABELNO)
|
|
1028
|
|
1029 #endif /* GCC_CSKY_H */
|