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1 ;; Predicate definitions for GCN.
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2 ;; Copyright (C) 2016-2020 Free Software Foundation, Inc.
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3 ;;
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4 ;; This file is part of GCC.
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5 ;;
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6 ;; GCC is free software; you can redistribute it and/or modify
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7 ;; it under the terms of the GNU General Public License as published by
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8 ;; the Free Software Foundation; either version 3, or (at your option)
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9 ;; any later version.
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10 ;;
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11 ;; GCC is distributed in the hope that it will be useful,
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12 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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14 ;; GNU General Public License for more details.
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15 ;;
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16 ;; You should have received a copy of the GNU General Public License
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17 ;; along with GCC; see the file COPYING3. If not see
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18 ;; <http://www.gnu.org/licenses/>.
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19 ;; Return true if VALUE can be stored in a sign extended immediate field.
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20
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21 (define_predicate "gcn_conditional_register_operand"
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22 (match_operand 0 "register_operand")
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23 {
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24 if (GET_CODE (op) == SUBREG)
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25 op = SUBREG_REG (op);
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26
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27 if (!REG_P (op) || GET_MODE (op) != BImode)
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28 return 0;
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29
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30 return REGNO (op) == VCCZ_REG
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31 || REGNO (op) == VCC_REG /* Implied VCCZ. */
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32 || REGNO (op) == SCC_REG
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33 || REGNO (op) == EXECZ_REG
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34 || REGNO (op) >= FIRST_PSEUDO_REGISTER;
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35 })
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36
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37 (define_predicate "gcn_ssrc_register_operand"
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38 (match_operand 0 "register_operand")
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39 {
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40 if (GET_CODE (op) == SUBREG)
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41 op = SUBREG_REG (op);
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42
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43 if (!REG_P (op))
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44 return false;
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45
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46 return SSRC_REGNO_P (REGNO (op)) || REGNO (op) >= FIRST_PSEUDO_REGISTER;
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47 })
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48
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49 (define_predicate "gcn_sdst_register_operand"
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50 (match_operand 0 "register_operand")
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51 {
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52 if (GET_CODE (op) == SUBREG)
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53 op = SUBREG_REG (op);
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54
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55 if (!REG_P (op))
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56 return false;
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57
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58 return SDST_REGNO_P (REGNO (op)) || REGNO (op) >= FIRST_PSEUDO_REGISTER;
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59 })
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60
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61 (define_predicate "gcn_vgpr_register_operand"
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62 (match_operand 0 "register_operand")
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63 {
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64 if (GET_CODE (op) == SUBREG)
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65 op = SUBREG_REG (op);
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66
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67 if (!REG_P (op))
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68 return false;
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69
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70 return VGPR_REGNO_P (REGNO (op)) || REGNO (op) >= FIRST_PSEUDO_REGISTER;
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71 })
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72
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73 (define_predicate "gcn_inline_immediate_operand"
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74 (match_code "const_int,const_double,const_vector")
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75 {
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76 return gcn_inline_constant_p (op);
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77 })
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78
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79 (define_predicate "gcn_vop3_operand"
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80 (ior (match_operand 0 "gcn_inline_immediate_operand")
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81 (match_operand 0 "register_operand")))
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82
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83 (define_predicate "gcn_vec0_operand"
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84 (match_code "const_vector")
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85 {
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86 return CONST_VECTOR_ELT (op, 0) == const0_rtx && gcn_inline_constant_p (op);
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87 })
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88
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89 (define_predicate "gcn_vec1_operand"
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90 (match_code "const_vector")
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91 {
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92 return CONST_VECTOR_ELT (op, 0) == const1_rtx && gcn_inline_constant_p (op);
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93 })
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94
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95 (define_predicate "gcn_vec1d_operand"
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96 (match_code "const_vector")
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97 {
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98 if (!gcn_inline_constant_p (op))
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99 return false;
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100
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101 rtx elem = CONST_VECTOR_ELT (op, 0);
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102 if (!CONST_DOUBLE_P (elem))
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103 return false;
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104 return real_identical (CONST_DOUBLE_REAL_VALUE (elem), &dconst1);
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105 })
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106
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107 (define_predicate "gcn_const1d_operand"
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108 (match_code "const_double")
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109 {
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110 return gcn_inline_constant_p (op)
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111 && real_identical (CONST_DOUBLE_REAL_VALUE (op), &dconst1);
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112 })
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113
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114 (define_predicate "gcn_32bit_immediate_operand"
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115 (match_code "const_int,const_double,const_vector,symbol_ref,label_ref")
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116 {
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117 return gcn_constant_p (op);
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118 })
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119
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120 ; LRA works smoother when exec values are immediate constants
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121 ; prior register allocation.
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122 (define_predicate "gcn_exec_operand"
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123 (ior (match_operand 0 "register_operand")
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124 (match_code "const_int")))
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125
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126 (define_predicate "gcn_exec_reg_operand"
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127 (match_operand 0 "register_operand"))
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128
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129 (define_predicate "gcn_load_operand"
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130 (ior (match_operand 0 "nonimmediate_operand")
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131 (match_operand 0 "gcn_32bit_immediate_operand")))
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132
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133 (define_predicate "gcn_alu_operand"
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134 (ior (match_operand 0 "register_operand")
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135 (match_operand 0 "gcn_32bit_immediate_operand")))
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136
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137 (define_predicate "gcn_ds_memory_operand"
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138 (and (match_code "mem")
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139 (and (match_test "AS_ANY_DS_P (MEM_ADDR_SPACE (op))")
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140 (match_operand 0 "memory_operand"))))
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141
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142 (define_predicate "gcn_valu_dst_operand"
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143 (ior (match_operand 0 "register_operand")
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144 (match_operand 0 "gcn_ds_memory_operand")))
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145
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146 (define_predicate "gcn_valu_src0_operand"
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147 (ior (match_operand 0 "register_operand")
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148 (ior (match_operand 0 "gcn_32bit_immediate_operand")
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149 (match_operand 0 "gcn_ds_memory_operand"))))
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150
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151 (define_predicate "gcn_valu_src1_operand"
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152 (match_operand 0 "register_operand"))
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153
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154 (define_predicate "gcn_valu_src1com_operand"
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155 (ior (match_operand 0 "register_operand")
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156 (match_operand 0 "gcn_32bit_immediate_operand")))
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157
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158 (define_predicate "gcn_conditional_operator"
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159 (match_code "eq,ne"))
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160
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161 (define_predicate "gcn_compare_64bit_operator"
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162 (match_code "eq,ne"))
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163
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164 (define_predicate "gcn_compare_operator"
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165 (match_code "eq,ne,gt,ge,lt,le,gtu,geu,ltu,leu"))
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166
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167 (define_predicate "gcn_fp_compare_operator"
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168 (match_code "eq,ne,gt,ge,lt,le,gtu,geu,ltu,leu,ordered,unordered,ltgt"))
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169
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170 (define_predicate "unary_operator"
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171 (match_code "not,popcount"))
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172
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173 (define_predicate "binary_operator"
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174 (match_code "and,ior,xor,ashift,lshiftrt,ashiftrt,smin,smax,umin,umax"))
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175
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176 (define_predicate "gcn_unspec_operand"
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177 (and (match_code "unspec")
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178 (match_test "XINT (op, 1) == UNSPEC_VECTOR")))
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179
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180 (define_predicate "general_or_unspec_operand"
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181 (ior (match_operand 0 "general_operand")
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182 (and (match_code "unspec")
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183 (match_test "XINT (op, 1) == UNSPEC_VECTOR"))))
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184
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185 (define_predicate "gcn_register_or_unspec_operand"
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186 (ior (match_operand 0 "register_operand")
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187 (and (match_code "unspec")
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188 (match_test "XINT (op, 1) == UNSPEC_VECTOR"))))
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189
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190 (define_predicate "gcn_alu_or_unspec_operand"
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191 (ior (match_operand 0 "gcn_alu_operand")
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192 (and (match_code "unspec")
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193 (match_test "XINT (op, 1) == UNSPEC_VECTOR"))))
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194
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195 (define_predicate "gcn_register_ds_or_unspec_operand"
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196 (ior (match_operand 0 "register_operand")
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197 (ior (match_operand 0 "gcn_ds_memory_operand")
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198 (and (match_code "unspec")
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199 (match_test "XINT (op, 1) == UNSPEC_VECTOR")))))
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