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111
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1 /* Dwarf2 Call Frame Information helper routines.
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145
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2 Copyright (C) 1992-2020 Free Software Foundation, Inc.
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111
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3
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4 This file is part of GCC.
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5
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6 GCC is free software; you can redistribute it and/or modify it under
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7 the terms of the GNU General Public License as published by the Free
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8 Software Foundation; either version 3, or (at your option) any later
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9 version.
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10
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11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
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12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
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13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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14 for more details.
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15
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16 You should have received a copy of the GNU General Public License
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17 along with GCC; see the file COPYING3. If not see
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18 <http://www.gnu.org/licenses/>. */
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19
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20 #include "config.h"
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21 #include "system.h"
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22 #include "coretypes.h"
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23 #include "target.h"
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24 #include "function.h"
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25 #include "rtl.h"
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26 #include "tree.h"
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27 #include "tree-pass.h"
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28 #include "memmodel.h"
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29 #include "tm_p.h"
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30 #include "emit-rtl.h"
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31 #include "stor-layout.h"
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32 #include "cfgbuild.h"
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33 #include "dwarf2out.h"
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34 #include "dwarf2asm.h"
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35 #include "common/common-target.h"
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36
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37 #include "except.h" /* expand_builtin_dwarf_sp_column */
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38 #include "profile-count.h" /* For expr.h */
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39 #include "expr.h" /* init_return_column_size */
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40 #include "output.h" /* asm_out_file */
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41 #include "debug.h" /* dwarf2out_do_frame, dwarf2out_do_cfi_asm */
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42
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43
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44 /* ??? Poison these here until it can be done generically. They've been
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45 totally replaced in this file; make sure it stays that way. */
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46 #undef DWARF2_UNWIND_INFO
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47 #undef DWARF2_FRAME_INFO
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48 #if (GCC_VERSION >= 3000)
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49 #pragma GCC poison DWARF2_UNWIND_INFO DWARF2_FRAME_INFO
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50 #endif
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51
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52 #ifndef INCOMING_RETURN_ADDR_RTX
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53 #define INCOMING_RETURN_ADDR_RTX (gcc_unreachable (), NULL_RTX)
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54 #endif
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131
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55
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56 #ifndef DEFAULT_INCOMING_FRAME_SP_OFFSET
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57 #define DEFAULT_INCOMING_FRAME_SP_OFFSET INCOMING_FRAME_SP_OFFSET
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58 #endif
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111
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59
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60 /* A collected description of an entire row of the abstract CFI table. */
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61 struct GTY(()) dw_cfi_row
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62 {
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63 /* The expression that computes the CFA, expressed in two different ways.
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64 The CFA member for the simple cases, and the full CFI expression for
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65 the complex cases. The later will be a DW_CFA_cfa_expression. */
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66 dw_cfa_location cfa;
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67 dw_cfi_ref cfa_cfi;
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68
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69 /* The expressions for any register column that is saved. */
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70 cfi_vec reg_save;
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145
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71
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72 /* True if the register window is saved. */
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73 bool window_save;
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111
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74 };
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75
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76 /* The caller's ORIG_REG is saved in SAVED_IN_REG. */
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77 struct GTY(()) reg_saved_in_data {
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78 rtx orig_reg;
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79 rtx saved_in_reg;
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80 };
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81
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82
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83 /* Since we no longer have a proper CFG, we're going to create a facsimile
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84 of one on the fly while processing the frame-related insns.
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85
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86 We create dw_trace_info structures for each extended basic block beginning
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87 and ending at a "save point". Save points are labels, barriers, certain
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88 notes, and of course the beginning and end of the function.
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89
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90 As we encounter control transfer insns, we propagate the "current"
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91 row state across the edges to the starts of traces. When checking is
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92 enabled, we validate that we propagate the same data from all sources.
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93
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94 All traces are members of the TRACE_INFO array, in the order in which
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95 they appear in the instruction stream.
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96
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97 All save points are present in the TRACE_INDEX hash, mapping the insn
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98 starting a trace to the dw_trace_info describing the trace. */
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99
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100 struct dw_trace_info
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101 {
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102 /* The insn that begins the trace. */
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103 rtx_insn *head;
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104
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105 /* The row state at the beginning and end of the trace. */
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106 dw_cfi_row *beg_row, *end_row;
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107
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108 /* Tracking for DW_CFA_GNU_args_size. The "true" sizes are those we find
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109 while scanning insns. However, the args_size value is irrelevant at
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110 any point except can_throw_internal_p insns. Therefore the "delay"
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111 sizes the values that must actually be emitted for this trace. */
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131
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112 poly_int64_pod beg_true_args_size, end_true_args_size;
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113 poly_int64_pod beg_delay_args_size, end_delay_args_size;
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111
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114
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115 /* The first EH insn in the trace, where beg_delay_args_size must be set. */
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116 rtx_insn *eh_head;
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117
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118 /* The following variables contain data used in interpreting frame related
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119 expressions. These are not part of the "real" row state as defined by
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120 Dwarf, but it seems like they need to be propagated into a trace in case
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121 frame related expressions have been sunk. */
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122 /* ??? This seems fragile. These variables are fragments of a larger
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123 expression. If we do not keep the entire expression together, we risk
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124 not being able to put it together properly. Consider forcing targets
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125 to generate self-contained expressions and dropping all of the magic
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126 interpretation code in this file. Or at least refusing to shrink wrap
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127 any frame related insn that doesn't contain a complete expression. */
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128
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129 /* The register used for saving registers to the stack, and its offset
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130 from the CFA. */
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131 dw_cfa_location cfa_store;
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132
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133 /* A temporary register holding an integral value used in adjusting SP
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134 or setting up the store_reg. The "offset" field holds the integer
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135 value, not an offset. */
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136 dw_cfa_location cfa_temp;
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137
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138 /* A set of registers saved in other registers. This is the inverse of
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139 the row->reg_save info, if the entry is a DW_CFA_register. This is
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140 implemented as a flat array because it normally contains zero or 1
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141 entry, depending on the target. IA-64 is the big spender here, using
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142 a maximum of 5 entries. */
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143 vec<reg_saved_in_data> regs_saved_in_regs;
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144
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145 /* An identifier for this trace. Used only for debugging dumps. */
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146 unsigned id;
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147
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148 /* True if this trace immediately follows NOTE_INSN_SWITCH_TEXT_SECTIONS. */
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149 bool switch_sections;
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150
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151 /* True if we've seen different values incoming to beg_true_args_size. */
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152 bool args_size_undefined;
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131
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153
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154 /* True if we've seen an insn with a REG_ARGS_SIZE note before EH_HEAD. */
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155 bool args_size_defined_for_eh;
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111
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156 };
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157
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158
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159 /* Hashtable helpers. */
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160
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161 struct trace_info_hasher : nofree_ptr_hash <dw_trace_info>
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162 {
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163 static inline hashval_t hash (const dw_trace_info *);
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164 static inline bool equal (const dw_trace_info *, const dw_trace_info *);
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165 };
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166
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167 inline hashval_t
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168 trace_info_hasher::hash (const dw_trace_info *ti)
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169 {
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170 return INSN_UID (ti->head);
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171 }
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172
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173 inline bool
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174 trace_info_hasher::equal (const dw_trace_info *a, const dw_trace_info *b)
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175 {
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176 return a->head == b->head;
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177 }
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178
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179
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180 /* The variables making up the pseudo-cfg, as described above. */
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181 static vec<dw_trace_info> trace_info;
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182 static vec<dw_trace_info *> trace_work_list;
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183 static hash_table<trace_info_hasher> *trace_index;
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184
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185 /* A vector of call frame insns for the CIE. */
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186 cfi_vec cie_cfi_vec;
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187
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188 /* The state of the first row of the FDE table, which includes the
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189 state provided by the CIE. */
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190 static GTY(()) dw_cfi_row *cie_cfi_row;
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191
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192 static GTY(()) reg_saved_in_data *cie_return_save;
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193
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194 static GTY(()) unsigned long dwarf2out_cfi_label_num;
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195
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196 /* The insn after which a new CFI note should be emitted. */
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197 static rtx_insn *add_cfi_insn;
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198
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199 /* When non-null, add_cfi will add the CFI to this vector. */
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200 static cfi_vec *add_cfi_vec;
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201
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202 /* The current instruction trace. */
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203 static dw_trace_info *cur_trace;
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204
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205 /* The current, i.e. most recently generated, row of the CFI table. */
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206 static dw_cfi_row *cur_row;
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207
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208 /* A copy of the current CFA, for use during the processing of a
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209 single insn. */
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210 static dw_cfa_location *cur_cfa;
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211
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212 /* We delay emitting a register save until either (a) we reach the end
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213 of the prologue or (b) the register is clobbered. This clusters
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214 register saves so that there are fewer pc advances. */
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215
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216 struct queued_reg_save {
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217 rtx reg;
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218 rtx saved_reg;
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131
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219 poly_int64_pod cfa_offset;
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111
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220 };
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221
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222
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223 static vec<queued_reg_save> queued_reg_saves;
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224
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225 /* True if any CFI directives were emitted at the current insn. */
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226 static bool any_cfis_emitted;
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227
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228 /* Short-hand for commonly used register numbers. */
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229 static unsigned dw_stack_pointer_regnum;
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230 static unsigned dw_frame_pointer_regnum;
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231
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232 /* Hook used by __throw. */
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233
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234 rtx
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235 expand_builtin_dwarf_sp_column (void)
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236 {
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237 unsigned int dwarf_regnum = DWARF_FRAME_REGNUM (STACK_POINTER_REGNUM);
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238 return GEN_INT (DWARF2_FRAME_REG_OUT (dwarf_regnum, 1));
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239 }
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240
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241 /* MEM is a memory reference for the register size table, each element of
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242 which has mode MODE. Initialize column C as a return address column. */
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243
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244 static void
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245 init_return_column_size (scalar_int_mode mode, rtx mem, unsigned int c)
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246 {
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247 HOST_WIDE_INT offset = c * GET_MODE_SIZE (mode);
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248 HOST_WIDE_INT size = GET_MODE_SIZE (Pmode);
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249 emit_move_insn (adjust_address (mem, mode, offset),
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250 gen_int_mode (size, mode));
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251 }
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252
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253 /* Datastructure used by expand_builtin_init_dwarf_reg_sizes and
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254 init_one_dwarf_reg_size to communicate on what has been done by the
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255 latter. */
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256
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257 struct init_one_dwarf_reg_state
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258 {
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259 /* Whether the dwarf return column was initialized. */
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260 bool wrote_return_column;
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261
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262 /* For each hard register REGNO, whether init_one_dwarf_reg_size
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263 was given REGNO to process already. */
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264 bool processed_regno [FIRST_PSEUDO_REGISTER];
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265
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266 };
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267
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268 /* Helper for expand_builtin_init_dwarf_reg_sizes. Generate code to
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269 initialize the dwarf register size table entry corresponding to register
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270 REGNO in REGMODE. TABLE is the table base address, SLOTMODE is the mode to
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271 use for the size entry to initialize, and INIT_STATE is the communication
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272 datastructure conveying what we're doing to our caller. */
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273
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274 static
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275 void init_one_dwarf_reg_size (int regno, machine_mode regmode,
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276 rtx table, machine_mode slotmode,
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277 init_one_dwarf_reg_state *init_state)
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278 {
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279 const unsigned int dnum = DWARF_FRAME_REGNUM (regno);
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280 const unsigned int rnum = DWARF2_FRAME_REG_OUT (dnum, 1);
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281 const unsigned int dcol = DWARF_REG_TO_UNWIND_COLUMN (rnum);
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282
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131
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283 poly_int64 slotoffset = dcol * GET_MODE_SIZE (slotmode);
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284 poly_int64 regsize = GET_MODE_SIZE (regmode);
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111
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285
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286 init_state->processed_regno[regno] = true;
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287
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288 if (rnum >= DWARF_FRAME_REGISTERS)
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289 return;
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290
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291 if (dnum == DWARF_FRAME_RETURN_COLUMN)
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292 {
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293 if (regmode == VOIDmode)
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294 return;
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295 init_state->wrote_return_column = true;
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296 }
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297
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131
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298 /* ??? When is this true? Should it be a test based on DCOL instead? */
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299 if (maybe_lt (slotoffset, 0))
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111
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300 return;
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301
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302 emit_move_insn (adjust_address (table, slotmode, slotoffset),
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303 gen_int_mode (regsize, slotmode));
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304 }
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305
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306 /* Generate code to initialize the dwarf register size table located
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307 at the provided ADDRESS. */
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308
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309 void
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310 expand_builtin_init_dwarf_reg_sizes (tree address)
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311 {
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312 unsigned int i;
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313 scalar_int_mode mode = SCALAR_INT_TYPE_MODE (char_type_node);
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314 rtx addr = expand_normal (address);
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315 rtx mem = gen_rtx_MEM (BLKmode, addr);
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316
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317 init_one_dwarf_reg_state init_state;
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318
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319 memset ((char *)&init_state, 0, sizeof (init_state));
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320
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321 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
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322 {
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323 machine_mode save_mode;
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324 rtx span;
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325
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326 /* No point in processing a register multiple times. This could happen
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327 with register spans, e.g. when a reg is first processed as a piece of
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328 a span, then as a register on its own later on. */
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329
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330 if (init_state.processed_regno[i])
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331 continue;
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332
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333 save_mode = targetm.dwarf_frame_reg_mode (i);
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334 span = targetm.dwarf_register_span (gen_rtx_REG (save_mode, i));
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335
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336 if (!span)
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337 init_one_dwarf_reg_size (i, save_mode, mem, mode, &init_state);
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338 else
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339 {
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340 for (int si = 0; si < XVECLEN (span, 0); si++)
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341 {
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342 rtx reg = XVECEXP (span, 0, si);
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343
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344 init_one_dwarf_reg_size
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345 (REGNO (reg), GET_MODE (reg), mem, mode, &init_state);
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346 }
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347 }
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348 }
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349
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350 if (!init_state.wrote_return_column)
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351 init_return_column_size (mode, mem, DWARF_FRAME_RETURN_COLUMN);
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352
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353 #ifdef DWARF_ALT_FRAME_RETURN_COLUMN
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354 init_return_column_size (mode, mem, DWARF_ALT_FRAME_RETURN_COLUMN);
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355 #endif
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356
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357 targetm.init_dwarf_reg_sizes_extra (address);
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358 }
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359
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360
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361 static dw_trace_info *
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362 get_trace_info (rtx_insn *insn)
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363 {
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364 dw_trace_info dummy;
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365 dummy.head = insn;
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366 return trace_index->find_with_hash (&dummy, INSN_UID (insn));
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367 }
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368
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369 static bool
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370 save_point_p (rtx_insn *insn)
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371 {
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372 /* Labels, except those that are really jump tables. */
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373 if (LABEL_P (insn))
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374 return inside_basic_block_p (insn);
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375
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376 /* We split traces at the prologue/epilogue notes because those
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377 are points at which the unwind info is usually stable. This
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378 makes it easier to find spots with identical unwind info so
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379 that we can use remember/restore_state opcodes. */
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380 if (NOTE_P (insn))
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381 switch (NOTE_KIND (insn))
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382 {
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383 case NOTE_INSN_PROLOGUE_END:
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384 case NOTE_INSN_EPILOGUE_BEG:
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385 return true;
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386 }
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387
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388 return false;
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389 }
|
|
|
390
|
|
|
391 /* Divide OFF by DWARF_CIE_DATA_ALIGNMENT, asserting no remainder. */
|
|
|
392
|
|
|
393 static inline HOST_WIDE_INT
|
|
|
394 div_data_align (HOST_WIDE_INT off)
|
|
|
395 {
|
|
|
396 HOST_WIDE_INT r = off / DWARF_CIE_DATA_ALIGNMENT;
|
|
|
397 gcc_assert (r * DWARF_CIE_DATA_ALIGNMENT == off);
|
|
|
398 return r;
|
|
|
399 }
|
|
|
400
|
|
|
401 /* Return true if we need a signed version of a given opcode
|
|
|
402 (e.g. DW_CFA_offset_extended_sf vs DW_CFA_offset_extended). */
|
|
|
403
|
|
|
404 static inline bool
|
|
|
405 need_data_align_sf_opcode (HOST_WIDE_INT off)
|
|
|
406 {
|
|
|
407 return DWARF_CIE_DATA_ALIGNMENT < 0 ? off > 0 : off < 0;
|
|
|
408 }
|
|
|
409
|
|
|
410 /* Return a pointer to a newly allocated Call Frame Instruction. */
|
|
|
411
|
|
|
412 static inline dw_cfi_ref
|
|
|
413 new_cfi (void)
|
|
|
414 {
|
|
|
415 dw_cfi_ref cfi = ggc_alloc<dw_cfi_node> ();
|
|
|
416
|
|
|
417 cfi->dw_cfi_oprnd1.dw_cfi_reg_num = 0;
|
|
|
418 cfi->dw_cfi_oprnd2.dw_cfi_reg_num = 0;
|
|
|
419
|
|
|
420 return cfi;
|
|
|
421 }
|
|
|
422
|
|
|
423 /* Return a newly allocated CFI row, with no defined data. */
|
|
|
424
|
|
|
425 static dw_cfi_row *
|
|
|
426 new_cfi_row (void)
|
|
|
427 {
|
|
|
428 dw_cfi_row *row = ggc_cleared_alloc<dw_cfi_row> ();
|
|
|
429
|
|
|
430 row->cfa.reg = INVALID_REGNUM;
|
|
|
431
|
|
|
432 return row;
|
|
|
433 }
|
|
|
434
|
|
|
435 /* Return a copy of an existing CFI row. */
|
|
|
436
|
|
|
437 static dw_cfi_row *
|
|
|
438 copy_cfi_row (dw_cfi_row *src)
|
|
|
439 {
|
|
|
440 dw_cfi_row *dst = ggc_alloc<dw_cfi_row> ();
|
|
|
441
|
|
|
442 *dst = *src;
|
|
|
443 dst->reg_save = vec_safe_copy (src->reg_save);
|
|
|
444
|
|
|
445 return dst;
|
|
|
446 }
|
|
|
447
|
|
131
|
448 /* Return a copy of an existing CFA location. */
|
|
|
449
|
|
|
450 static dw_cfa_location *
|
|
|
451 copy_cfa (dw_cfa_location *src)
|
|
|
452 {
|
|
|
453 dw_cfa_location *dst = ggc_alloc<dw_cfa_location> ();
|
|
|
454 *dst = *src;
|
|
|
455 return dst;
|
|
|
456 }
|
|
|
457
|
|
111
|
458 /* Generate a new label for the CFI info to refer to. */
|
|
|
459
|
|
|
460 static char *
|
|
|
461 dwarf2out_cfi_label (void)
|
|
|
462 {
|
|
|
463 int num = dwarf2out_cfi_label_num++;
|
|
|
464 char label[20];
|
|
|
465
|
|
|
466 ASM_GENERATE_INTERNAL_LABEL (label, "LCFI", num);
|
|
|
467
|
|
|
468 return xstrdup (label);
|
|
|
469 }
|
|
|
470
|
|
|
471 /* Add CFI either to the current insn stream or to a vector, or both. */
|
|
|
472
|
|
|
473 static void
|
|
|
474 add_cfi (dw_cfi_ref cfi)
|
|
|
475 {
|
|
|
476 any_cfis_emitted = true;
|
|
|
477
|
|
|
478 if (add_cfi_insn != NULL)
|
|
|
479 {
|
|
|
480 add_cfi_insn = emit_note_after (NOTE_INSN_CFI, add_cfi_insn);
|
|
|
481 NOTE_CFI (add_cfi_insn) = cfi;
|
|
|
482 }
|
|
|
483
|
|
|
484 if (add_cfi_vec != NULL)
|
|
|
485 vec_safe_push (*add_cfi_vec, cfi);
|
|
|
486 }
|
|
|
487
|
|
|
488 static void
|
|
131
|
489 add_cfi_args_size (poly_int64 size)
|
|
111
|
490 {
|
|
131
|
491 /* We don't yet have a representation for polynomial sizes. */
|
|
|
492 HOST_WIDE_INT const_size = size.to_constant ();
|
|
|
493
|
|
111
|
494 dw_cfi_ref cfi = new_cfi ();
|
|
|
495
|
|
|
496 /* While we can occasionally have args_size < 0 internally, this state
|
|
|
497 should not persist at a point we actually need an opcode. */
|
|
131
|
498 gcc_assert (const_size >= 0);
|
|
111
|
499
|
|
|
500 cfi->dw_cfi_opc = DW_CFA_GNU_args_size;
|
|
131
|
501 cfi->dw_cfi_oprnd1.dw_cfi_offset = const_size;
|
|
111
|
502
|
|
|
503 add_cfi (cfi);
|
|
|
504 }
|
|
|
505
|
|
|
506 static void
|
|
|
507 add_cfi_restore (unsigned reg)
|
|
|
508 {
|
|
|
509 dw_cfi_ref cfi = new_cfi ();
|
|
|
510
|
|
|
511 cfi->dw_cfi_opc = (reg & ~0x3f ? DW_CFA_restore_extended : DW_CFA_restore);
|
|
|
512 cfi->dw_cfi_oprnd1.dw_cfi_reg_num = reg;
|
|
|
513
|
|
|
514 add_cfi (cfi);
|
|
|
515 }
|
|
|
516
|
|
|
517 /* Perform ROW->REG_SAVE[COLUMN] = CFI. CFI may be null, indicating
|
|
|
518 that the register column is no longer saved. */
|
|
|
519
|
|
|
520 static void
|
|
|
521 update_row_reg_save (dw_cfi_row *row, unsigned column, dw_cfi_ref cfi)
|
|
|
522 {
|
|
|
523 if (vec_safe_length (row->reg_save) <= column)
|
|
|
524 vec_safe_grow_cleared (row->reg_save, column + 1);
|
|
|
525 (*row->reg_save)[column] = cfi;
|
|
|
526 }
|
|
|
527
|
|
|
528 /* This function fills in aa dw_cfa_location structure from a dwarf location
|
|
|
529 descriptor sequence. */
|
|
|
530
|
|
|
531 static void
|
|
|
532 get_cfa_from_loc_descr (dw_cfa_location *cfa, struct dw_loc_descr_node *loc)
|
|
|
533 {
|
|
|
534 struct dw_loc_descr_node *ptr;
|
|
|
535 cfa->offset = 0;
|
|
|
536 cfa->base_offset = 0;
|
|
|
537 cfa->indirect = 0;
|
|
|
538 cfa->reg = -1;
|
|
|
539
|
|
|
540 for (ptr = loc; ptr != NULL; ptr = ptr->dw_loc_next)
|
|
|
541 {
|
|
|
542 enum dwarf_location_atom op = ptr->dw_loc_opc;
|
|
|
543
|
|
|
544 switch (op)
|
|
|
545 {
|
|
|
546 case DW_OP_reg0:
|
|
|
547 case DW_OP_reg1:
|
|
|
548 case DW_OP_reg2:
|
|
|
549 case DW_OP_reg3:
|
|
|
550 case DW_OP_reg4:
|
|
|
551 case DW_OP_reg5:
|
|
|
552 case DW_OP_reg6:
|
|
|
553 case DW_OP_reg7:
|
|
|
554 case DW_OP_reg8:
|
|
|
555 case DW_OP_reg9:
|
|
|
556 case DW_OP_reg10:
|
|
|
557 case DW_OP_reg11:
|
|
|
558 case DW_OP_reg12:
|
|
|
559 case DW_OP_reg13:
|
|
|
560 case DW_OP_reg14:
|
|
|
561 case DW_OP_reg15:
|
|
|
562 case DW_OP_reg16:
|
|
|
563 case DW_OP_reg17:
|
|
|
564 case DW_OP_reg18:
|
|
|
565 case DW_OP_reg19:
|
|
|
566 case DW_OP_reg20:
|
|
|
567 case DW_OP_reg21:
|
|
|
568 case DW_OP_reg22:
|
|
|
569 case DW_OP_reg23:
|
|
|
570 case DW_OP_reg24:
|
|
|
571 case DW_OP_reg25:
|
|
|
572 case DW_OP_reg26:
|
|
|
573 case DW_OP_reg27:
|
|
|
574 case DW_OP_reg28:
|
|
|
575 case DW_OP_reg29:
|
|
|
576 case DW_OP_reg30:
|
|
|
577 case DW_OP_reg31:
|
|
|
578 cfa->reg = op - DW_OP_reg0;
|
|
|
579 break;
|
|
|
580 case DW_OP_regx:
|
|
|
581 cfa->reg = ptr->dw_loc_oprnd1.v.val_int;
|
|
|
582 break;
|
|
|
583 case DW_OP_breg0:
|
|
|
584 case DW_OP_breg1:
|
|
|
585 case DW_OP_breg2:
|
|
|
586 case DW_OP_breg3:
|
|
|
587 case DW_OP_breg4:
|
|
|
588 case DW_OP_breg5:
|
|
|
589 case DW_OP_breg6:
|
|
|
590 case DW_OP_breg7:
|
|
|
591 case DW_OP_breg8:
|
|
|
592 case DW_OP_breg9:
|
|
|
593 case DW_OP_breg10:
|
|
|
594 case DW_OP_breg11:
|
|
|
595 case DW_OP_breg12:
|
|
|
596 case DW_OP_breg13:
|
|
|
597 case DW_OP_breg14:
|
|
|
598 case DW_OP_breg15:
|
|
|
599 case DW_OP_breg16:
|
|
|
600 case DW_OP_breg17:
|
|
|
601 case DW_OP_breg18:
|
|
|
602 case DW_OP_breg19:
|
|
|
603 case DW_OP_breg20:
|
|
|
604 case DW_OP_breg21:
|
|
|
605 case DW_OP_breg22:
|
|
|
606 case DW_OP_breg23:
|
|
|
607 case DW_OP_breg24:
|
|
|
608 case DW_OP_breg25:
|
|
|
609 case DW_OP_breg26:
|
|
|
610 case DW_OP_breg27:
|
|
|
611 case DW_OP_breg28:
|
|
|
612 case DW_OP_breg29:
|
|
|
613 case DW_OP_breg30:
|
|
|
614 case DW_OP_breg31:
|
|
|
615 cfa->reg = op - DW_OP_breg0;
|
|
|
616 cfa->base_offset = ptr->dw_loc_oprnd1.v.val_int;
|
|
|
617 break;
|
|
|
618 case DW_OP_bregx:
|
|
|
619 cfa->reg = ptr->dw_loc_oprnd1.v.val_int;
|
|
|
620 cfa->base_offset = ptr->dw_loc_oprnd2.v.val_int;
|
|
|
621 break;
|
|
|
622 case DW_OP_deref:
|
|
|
623 cfa->indirect = 1;
|
|
|
624 break;
|
|
|
625 case DW_OP_plus_uconst:
|
|
|
626 cfa->offset = ptr->dw_loc_oprnd1.v.val_unsigned;
|
|
|
627 break;
|
|
|
628 default:
|
|
|
629 gcc_unreachable ();
|
|
|
630 }
|
|
|
631 }
|
|
|
632 }
|
|
|
633
|
|
|
634 /* Find the previous value for the CFA, iteratively. CFI is the opcode
|
|
|
635 to interpret, *LOC will be updated as necessary, *REMEMBER is used for
|
|
|
636 one level of remember/restore state processing. */
|
|
|
637
|
|
|
638 void
|
|
|
639 lookup_cfa_1 (dw_cfi_ref cfi, dw_cfa_location *loc, dw_cfa_location *remember)
|
|
|
640 {
|
|
|
641 switch (cfi->dw_cfi_opc)
|
|
|
642 {
|
|
|
643 case DW_CFA_def_cfa_offset:
|
|
|
644 case DW_CFA_def_cfa_offset_sf:
|
|
|
645 loc->offset = cfi->dw_cfi_oprnd1.dw_cfi_offset;
|
|
|
646 break;
|
|
|
647 case DW_CFA_def_cfa_register:
|
|
|
648 loc->reg = cfi->dw_cfi_oprnd1.dw_cfi_reg_num;
|
|
|
649 break;
|
|
|
650 case DW_CFA_def_cfa:
|
|
|
651 case DW_CFA_def_cfa_sf:
|
|
|
652 loc->reg = cfi->dw_cfi_oprnd1.dw_cfi_reg_num;
|
|
|
653 loc->offset = cfi->dw_cfi_oprnd2.dw_cfi_offset;
|
|
|
654 break;
|
|
|
655 case DW_CFA_def_cfa_expression:
|
|
131
|
656 if (cfi->dw_cfi_oprnd2.dw_cfi_cfa_loc)
|
|
|
657 *loc = *cfi->dw_cfi_oprnd2.dw_cfi_cfa_loc;
|
|
|
658 else
|
|
|
659 get_cfa_from_loc_descr (loc, cfi->dw_cfi_oprnd1.dw_cfi_loc);
|
|
111
|
660 break;
|
|
|
661
|
|
|
662 case DW_CFA_remember_state:
|
|
|
663 gcc_assert (!remember->in_use);
|
|
|
664 *remember = *loc;
|
|
|
665 remember->in_use = 1;
|
|
|
666 break;
|
|
|
667 case DW_CFA_restore_state:
|
|
|
668 gcc_assert (remember->in_use);
|
|
|
669 *loc = *remember;
|
|
|
670 remember->in_use = 0;
|
|
|
671 break;
|
|
|
672
|
|
|
673 default:
|
|
|
674 break;
|
|
|
675 }
|
|
|
676 }
|
|
|
677
|
|
|
678 /* Determine if two dw_cfa_location structures define the same data. */
|
|
|
679
|
|
|
680 bool
|
|
|
681 cfa_equal_p (const dw_cfa_location *loc1, const dw_cfa_location *loc2)
|
|
|
682 {
|
|
|
683 return (loc1->reg == loc2->reg
|
|
131
|
684 && known_eq (loc1->offset, loc2->offset)
|
|
111
|
685 && loc1->indirect == loc2->indirect
|
|
|
686 && (loc1->indirect == 0
|
|
131
|
687 || known_eq (loc1->base_offset, loc2->base_offset)));
|
|
111
|
688 }
|
|
|
689
|
|
|
690 /* Determine if two CFI operands are identical. */
|
|
|
691
|
|
|
692 static bool
|
|
|
693 cfi_oprnd_equal_p (enum dw_cfi_oprnd_type t, dw_cfi_oprnd *a, dw_cfi_oprnd *b)
|
|
|
694 {
|
|
|
695 switch (t)
|
|
|
696 {
|
|
|
697 case dw_cfi_oprnd_unused:
|
|
|
698 return true;
|
|
|
699 case dw_cfi_oprnd_reg_num:
|
|
|
700 return a->dw_cfi_reg_num == b->dw_cfi_reg_num;
|
|
|
701 case dw_cfi_oprnd_offset:
|
|
|
702 return a->dw_cfi_offset == b->dw_cfi_offset;
|
|
|
703 case dw_cfi_oprnd_addr:
|
|
|
704 return (a->dw_cfi_addr == b->dw_cfi_addr
|
|
|
705 || strcmp (a->dw_cfi_addr, b->dw_cfi_addr) == 0);
|
|
|
706 case dw_cfi_oprnd_loc:
|
|
|
707 return loc_descr_equal_p (a->dw_cfi_loc, b->dw_cfi_loc);
|
|
131
|
708 case dw_cfi_oprnd_cfa_loc:
|
|
|
709 return cfa_equal_p (a->dw_cfi_cfa_loc, b->dw_cfi_cfa_loc);
|
|
111
|
710 }
|
|
|
711 gcc_unreachable ();
|
|
|
712 }
|
|
|
713
|
|
|
714 /* Determine if two CFI entries are identical. */
|
|
|
715
|
|
|
716 static bool
|
|
|
717 cfi_equal_p (dw_cfi_ref a, dw_cfi_ref b)
|
|
|
718 {
|
|
|
719 enum dwarf_call_frame_info opc;
|
|
|
720
|
|
|
721 /* Make things easier for our callers, including missing operands. */
|
|
|
722 if (a == b)
|
|
|
723 return true;
|
|
|
724 if (a == NULL || b == NULL)
|
|
|
725 return false;
|
|
|
726
|
|
|
727 /* Obviously, the opcodes must match. */
|
|
|
728 opc = a->dw_cfi_opc;
|
|
|
729 if (opc != b->dw_cfi_opc)
|
|
|
730 return false;
|
|
|
731
|
|
|
732 /* Compare the two operands, re-using the type of the operands as
|
|
|
733 already exposed elsewhere. */
|
|
|
734 return (cfi_oprnd_equal_p (dw_cfi_oprnd1_desc (opc),
|
|
|
735 &a->dw_cfi_oprnd1, &b->dw_cfi_oprnd1)
|
|
|
736 && cfi_oprnd_equal_p (dw_cfi_oprnd2_desc (opc),
|
|
|
737 &a->dw_cfi_oprnd2, &b->dw_cfi_oprnd2));
|
|
|
738 }
|
|
|
739
|
|
|
740 /* Determine if two CFI_ROW structures are identical. */
|
|
|
741
|
|
|
742 static bool
|
|
|
743 cfi_row_equal_p (dw_cfi_row *a, dw_cfi_row *b)
|
|
|
744 {
|
|
|
745 size_t i, n_a, n_b, n_max;
|
|
|
746
|
|
|
747 if (a->cfa_cfi)
|
|
|
748 {
|
|
|
749 if (!cfi_equal_p (a->cfa_cfi, b->cfa_cfi))
|
|
|
750 return false;
|
|
|
751 }
|
|
|
752 else if (!cfa_equal_p (&a->cfa, &b->cfa))
|
|
|
753 return false;
|
|
|
754
|
|
|
755 n_a = vec_safe_length (a->reg_save);
|
|
|
756 n_b = vec_safe_length (b->reg_save);
|
|
|
757 n_max = MAX (n_a, n_b);
|
|
|
758
|
|
|
759 for (i = 0; i < n_max; ++i)
|
|
|
760 {
|
|
|
761 dw_cfi_ref r_a = NULL, r_b = NULL;
|
|
|
762
|
|
|
763 if (i < n_a)
|
|
|
764 r_a = (*a->reg_save)[i];
|
|
|
765 if (i < n_b)
|
|
|
766 r_b = (*b->reg_save)[i];
|
|
|
767
|
|
|
768 if (!cfi_equal_p (r_a, r_b))
|
|
|
769 return false;
|
|
|
770 }
|
|
|
771
|
|
145
|
772 if (a->window_save != b->window_save)
|
|
|
773 return false;
|
|
|
774
|
|
111
|
775 return true;
|
|
|
776 }
|
|
|
777
|
|
|
778 /* The CFA is now calculated from NEW_CFA. Consider OLD_CFA in determining
|
|
|
779 what opcode to emit. Returns the CFI opcode to effect the change, or
|
|
|
780 NULL if NEW_CFA == OLD_CFA. */
|
|
|
781
|
|
|
782 static dw_cfi_ref
|
|
|
783 def_cfa_0 (dw_cfa_location *old_cfa, dw_cfa_location *new_cfa)
|
|
|
784 {
|
|
|
785 dw_cfi_ref cfi;
|
|
|
786
|
|
|
787 /* If nothing changed, no need to issue any call frame instructions. */
|
|
|
788 if (cfa_equal_p (old_cfa, new_cfa))
|
|
|
789 return NULL;
|
|
|
790
|
|
|
791 cfi = new_cfi ();
|
|
|
792
|
|
131
|
793 HOST_WIDE_INT const_offset;
|
|
|
794 if (new_cfa->reg == old_cfa->reg
|
|
|
795 && !new_cfa->indirect
|
|
|
796 && !old_cfa->indirect
|
|
|
797 && new_cfa->offset.is_constant (&const_offset))
|
|
111
|
798 {
|
|
|
799 /* Construct a "DW_CFA_def_cfa_offset <offset>" instruction, indicating
|
|
|
800 the CFA register did not change but the offset did. The data
|
|
|
801 factoring for DW_CFA_def_cfa_offset_sf happens in output_cfi, or
|
|
|
802 in the assembler via the .cfi_def_cfa_offset directive. */
|
|
131
|
803 if (const_offset < 0)
|
|
111
|
804 cfi->dw_cfi_opc = DW_CFA_def_cfa_offset_sf;
|
|
|
805 else
|
|
|
806 cfi->dw_cfi_opc = DW_CFA_def_cfa_offset;
|
|
131
|
807 cfi->dw_cfi_oprnd1.dw_cfi_offset = const_offset;
|
|
111
|
808 }
|
|
131
|
809 else if (new_cfa->offset.is_constant ()
|
|
|
810 && known_eq (new_cfa->offset, old_cfa->offset)
|
|
111
|
811 && old_cfa->reg != INVALID_REGNUM
|
|
|
812 && !new_cfa->indirect
|
|
|
813 && !old_cfa->indirect)
|
|
|
814 {
|
|
|
815 /* Construct a "DW_CFA_def_cfa_register <register>" instruction,
|
|
|
816 indicating the CFA register has changed to <register> but the
|
|
131
|
817 offset has not changed. This requires the old CFA to have
|
|
|
818 been set as a register plus offset rather than a general
|
|
|
819 DW_CFA_def_cfa_expression. */
|
|
111
|
820 cfi->dw_cfi_opc = DW_CFA_def_cfa_register;
|
|
|
821 cfi->dw_cfi_oprnd1.dw_cfi_reg_num = new_cfa->reg;
|
|
|
822 }
|
|
131
|
823 else if (new_cfa->indirect == 0
|
|
|
824 && new_cfa->offset.is_constant (&const_offset))
|
|
111
|
825 {
|
|
|
826 /* Construct a "DW_CFA_def_cfa <register> <offset>" instruction,
|
|
|
827 indicating the CFA register has changed to <register> with
|
|
|
828 the specified offset. The data factoring for DW_CFA_def_cfa_sf
|
|
|
829 happens in output_cfi, or in the assembler via the .cfi_def_cfa
|
|
|
830 directive. */
|
|
131
|
831 if (const_offset < 0)
|
|
111
|
832 cfi->dw_cfi_opc = DW_CFA_def_cfa_sf;
|
|
|
833 else
|
|
|
834 cfi->dw_cfi_opc = DW_CFA_def_cfa;
|
|
|
835 cfi->dw_cfi_oprnd1.dw_cfi_reg_num = new_cfa->reg;
|
|
131
|
836 cfi->dw_cfi_oprnd2.dw_cfi_offset = const_offset;
|
|
111
|
837 }
|
|
|
838 else
|
|
|
839 {
|
|
|
840 /* Construct a DW_CFA_def_cfa_expression instruction to
|
|
|
841 calculate the CFA using a full location expression since no
|
|
|
842 register-offset pair is available. */
|
|
|
843 struct dw_loc_descr_node *loc_list;
|
|
|
844
|
|
|
845 cfi->dw_cfi_opc = DW_CFA_def_cfa_expression;
|
|
|
846 loc_list = build_cfa_loc (new_cfa, 0);
|
|
|
847 cfi->dw_cfi_oprnd1.dw_cfi_loc = loc_list;
|
|
131
|
848 if (!new_cfa->offset.is_constant ()
|
|
|
849 || !new_cfa->base_offset.is_constant ())
|
|
|
850 /* It's hard to reconstruct the CFA location for a polynomial
|
|
|
851 expression, so just cache it instead. */
|
|
|
852 cfi->dw_cfi_oprnd2.dw_cfi_cfa_loc = copy_cfa (new_cfa);
|
|
|
853 else
|
|
|
854 cfi->dw_cfi_oprnd2.dw_cfi_cfa_loc = NULL;
|
|
111
|
855 }
|
|
|
856
|
|
|
857 return cfi;
|
|
|
858 }
|
|
|
859
|
|
|
860 /* Similarly, but take OLD_CFA from CUR_ROW, and update it after the fact. */
|
|
|
861
|
|
|
862 static void
|
|
|
863 def_cfa_1 (dw_cfa_location *new_cfa)
|
|
|
864 {
|
|
|
865 dw_cfi_ref cfi;
|
|
|
866
|
|
|
867 if (cur_trace->cfa_store.reg == new_cfa->reg && new_cfa->indirect == 0)
|
|
|
868 cur_trace->cfa_store.offset = new_cfa->offset;
|
|
|
869
|
|
|
870 cfi = def_cfa_0 (&cur_row->cfa, new_cfa);
|
|
|
871 if (cfi)
|
|
|
872 {
|
|
|
873 cur_row->cfa = *new_cfa;
|
|
|
874 cur_row->cfa_cfi = (cfi->dw_cfi_opc == DW_CFA_def_cfa_expression
|
|
|
875 ? cfi : NULL);
|
|
|
876
|
|
|
877 add_cfi (cfi);
|
|
|
878 }
|
|
|
879 }
|
|
|
880
|
|
|
881 /* Add the CFI for saving a register. REG is the CFA column number.
|
|
|
882 If SREG is -1, the register is saved at OFFSET from the CFA;
|
|
|
883 otherwise it is saved in SREG. */
|
|
|
884
|
|
|
885 static void
|
|
131
|
886 reg_save (unsigned int reg, unsigned int sreg, poly_int64 offset)
|
|
111
|
887 {
|
|
|
888 dw_fde_ref fde = cfun ? cfun->fde : NULL;
|
|
|
889 dw_cfi_ref cfi = new_cfi ();
|
|
|
890
|
|
|
891 cfi->dw_cfi_oprnd1.dw_cfi_reg_num = reg;
|
|
|
892
|
|
131
|
893 if (sreg == INVALID_REGNUM)
|
|
111
|
894 {
|
|
131
|
895 HOST_WIDE_INT const_offset;
|
|
|
896 /* When stack is aligned, store REG using DW_CFA_expression with FP. */
|
|
|
897 if (fde && fde->stack_realign)
|
|
|
898 {
|
|
|
899 cfi->dw_cfi_opc = DW_CFA_expression;
|
|
|
900 cfi->dw_cfi_oprnd1.dw_cfi_reg_num = reg;
|
|
|
901 cfi->dw_cfi_oprnd2.dw_cfi_loc
|
|
|
902 = build_cfa_aligned_loc (&cur_row->cfa, offset,
|
|
|
903 fde->stack_realignment);
|
|
|
904 }
|
|
|
905 else if (offset.is_constant (&const_offset))
|
|
|
906 {
|
|
|
907 if (need_data_align_sf_opcode (const_offset))
|
|
|
908 cfi->dw_cfi_opc = DW_CFA_offset_extended_sf;
|
|
|
909 else if (reg & ~0x3f)
|
|
|
910 cfi->dw_cfi_opc = DW_CFA_offset_extended;
|
|
|
911 else
|
|
|
912 cfi->dw_cfi_opc = DW_CFA_offset;
|
|
|
913 cfi->dw_cfi_oprnd2.dw_cfi_offset = const_offset;
|
|
|
914 }
|
|
111
|
915 else
|
|
131
|
916 {
|
|
|
917 cfi->dw_cfi_opc = DW_CFA_expression;
|
|
|
918 cfi->dw_cfi_oprnd1.dw_cfi_reg_num = reg;
|
|
|
919 cfi->dw_cfi_oprnd2.dw_cfi_loc
|
|
|
920 = build_cfa_loc (&cur_row->cfa, offset);
|
|
|
921 }
|
|
111
|
922 }
|
|
|
923 else if (sreg == reg)
|
|
|
924 {
|
|
|
925 /* While we could emit something like DW_CFA_same_value or
|
|
|
926 DW_CFA_restore, we never expect to see something like that
|
|
|
927 in a prologue. This is more likely to be a bug. A backend
|
|
|
928 can always bypass this by using REG_CFA_RESTORE directly. */
|
|
|
929 gcc_unreachable ();
|
|
|
930 }
|
|
|
931 else
|
|
|
932 {
|
|
|
933 cfi->dw_cfi_opc = DW_CFA_register;
|
|
|
934 cfi->dw_cfi_oprnd2.dw_cfi_reg_num = sreg;
|
|
|
935 }
|
|
|
936
|
|
|
937 add_cfi (cfi);
|
|
|
938 update_row_reg_save (cur_row, reg, cfi);
|
|
|
939 }
|
|
|
940
|
|
|
941 /* A subroutine of scan_trace. Check INSN for a REG_ARGS_SIZE note
|
|
|
942 and adjust data structures to match. */
|
|
|
943
|
|
|
944 static void
|
|
|
945 notice_args_size (rtx_insn *insn)
|
|
|
946 {
|
|
131
|
947 poly_int64 args_size, delta;
|
|
111
|
948 rtx note;
|
|
|
949
|
|
|
950 note = find_reg_note (insn, REG_ARGS_SIZE, NULL);
|
|
|
951 if (note == NULL)
|
|
|
952 return;
|
|
|
953
|
|
131
|
954 if (!cur_trace->eh_head)
|
|
|
955 cur_trace->args_size_defined_for_eh = true;
|
|
|
956
|
|
|
957 args_size = get_args_size (note);
|
|
111
|
958 delta = args_size - cur_trace->end_true_args_size;
|
|
131
|
959 if (known_eq (delta, 0))
|
|
111
|
960 return;
|
|
|
961
|
|
|
962 cur_trace->end_true_args_size = args_size;
|
|
|
963
|
|
|
964 /* If the CFA is computed off the stack pointer, then we must adjust
|
|
|
965 the computation of the CFA as well. */
|
|
|
966 if (cur_cfa->reg == dw_stack_pointer_regnum)
|
|
|
967 {
|
|
|
968 gcc_assert (!cur_cfa->indirect);
|
|
|
969
|
|
|
970 /* Convert a change in args_size (always a positive in the
|
|
|
971 direction of stack growth) to a change in stack pointer. */
|
|
|
972 if (!STACK_GROWS_DOWNWARD)
|
|
|
973 delta = -delta;
|
|
|
974
|
|
|
975 cur_cfa->offset += delta;
|
|
|
976 }
|
|
|
977 }
|
|
|
978
|
|
|
979 /* A subroutine of scan_trace. INSN is can_throw_internal. Update the
|
|
|
980 data within the trace related to EH insns and args_size. */
|
|
|
981
|
|
|
982 static void
|
|
|
983 notice_eh_throw (rtx_insn *insn)
|
|
|
984 {
|
|
131
|
985 poly_int64 args_size = cur_trace->end_true_args_size;
|
|
111
|
986 if (cur_trace->eh_head == NULL)
|
|
|
987 {
|
|
|
988 cur_trace->eh_head = insn;
|
|
|
989 cur_trace->beg_delay_args_size = args_size;
|
|
|
990 cur_trace->end_delay_args_size = args_size;
|
|
|
991 }
|
|
131
|
992 else if (maybe_ne (cur_trace->end_delay_args_size, args_size))
|
|
111
|
993 {
|
|
|
994 cur_trace->end_delay_args_size = args_size;
|
|
|
995
|
|
|
996 /* ??? If the CFA is the stack pointer, search backward for the last
|
|
|
997 CFI note and insert there. Given that the stack changed for the
|
|
|
998 args_size change, there *must* be such a note in between here and
|
|
|
999 the last eh insn. */
|
|
|
1000 add_cfi_args_size (args_size);
|
|
|
1001 }
|
|
|
1002 }
|
|
|
1003
|
|
|
1004 /* Short-hand inline for the very common D_F_R (REGNO (x)) operation. */
|
|
|
1005 /* ??? This ought to go into dwarf2out.h, except that dwarf2out.h is
|
|
|
1006 used in places where rtl is prohibited. */
|
|
|
1007
|
|
|
1008 static inline unsigned
|
|
|
1009 dwf_regno (const_rtx reg)
|
|
|
1010 {
|
|
|
1011 gcc_assert (REGNO (reg) < FIRST_PSEUDO_REGISTER);
|
|
|
1012 return DWARF_FRAME_REGNUM (REGNO (reg));
|
|
|
1013 }
|
|
|
1014
|
|
|
1015 /* Compare X and Y for equivalence. The inputs may be REGs or PC_RTX. */
|
|
|
1016
|
|
|
1017 static bool
|
|
|
1018 compare_reg_or_pc (rtx x, rtx y)
|
|
|
1019 {
|
|
|
1020 if (REG_P (x) && REG_P (y))
|
|
|
1021 return REGNO (x) == REGNO (y);
|
|
|
1022 return x == y;
|
|
|
1023 }
|
|
|
1024
|
|
|
1025 /* Record SRC as being saved in DEST. DEST may be null to delete an
|
|
|
1026 existing entry. SRC may be a register or PC_RTX. */
|
|
|
1027
|
|
|
1028 static void
|
|
|
1029 record_reg_saved_in_reg (rtx dest, rtx src)
|
|
|
1030 {
|
|
|
1031 reg_saved_in_data *elt;
|
|
|
1032 size_t i;
|
|
|
1033
|
|
|
1034 FOR_EACH_VEC_ELT (cur_trace->regs_saved_in_regs, i, elt)
|
|
|
1035 if (compare_reg_or_pc (elt->orig_reg, src))
|
|
|
1036 {
|
|
|
1037 if (dest == NULL)
|
|
|
1038 cur_trace->regs_saved_in_regs.unordered_remove (i);
|
|
|
1039 else
|
|
|
1040 elt->saved_in_reg = dest;
|
|
|
1041 return;
|
|
|
1042 }
|
|
|
1043
|
|
|
1044 if (dest == NULL)
|
|
|
1045 return;
|
|
|
1046
|
|
|
1047 reg_saved_in_data e = {src, dest};
|
|
|
1048 cur_trace->regs_saved_in_regs.safe_push (e);
|
|
|
1049 }
|
|
|
1050
|
|
|
1051 /* Add an entry to QUEUED_REG_SAVES saying that REG is now saved at
|
|
|
1052 SREG, or if SREG is NULL then it is saved at OFFSET to the CFA. */
|
|
|
1053
|
|
|
1054 static void
|
|
131
|
1055 queue_reg_save (rtx reg, rtx sreg, poly_int64 offset)
|
|
111
|
1056 {
|
|
|
1057 queued_reg_save *q;
|
|
|
1058 queued_reg_save e = {reg, sreg, offset};
|
|
|
1059 size_t i;
|
|
|
1060
|
|
|
1061 /* Duplicates waste space, but it's also necessary to remove them
|
|
|
1062 for correctness, since the queue gets output in reverse order. */
|
|
|
1063 FOR_EACH_VEC_ELT (queued_reg_saves, i, q)
|
|
|
1064 if (compare_reg_or_pc (q->reg, reg))
|
|
|
1065 {
|
|
|
1066 *q = e;
|
|
|
1067 return;
|
|
|
1068 }
|
|
|
1069
|
|
|
1070 queued_reg_saves.safe_push (e);
|
|
|
1071 }
|
|
|
1072
|
|
|
1073 /* Output all the entries in QUEUED_REG_SAVES. */
|
|
|
1074
|
|
|
1075 static void
|
|
|
1076 dwarf2out_flush_queued_reg_saves (void)
|
|
|
1077 {
|
|
|
1078 queued_reg_save *q;
|
|
|
1079 size_t i;
|
|
|
1080
|
|
|
1081 FOR_EACH_VEC_ELT (queued_reg_saves, i, q)
|
|
|
1082 {
|
|
|
1083 unsigned int reg, sreg;
|
|
|
1084
|
|
|
1085 record_reg_saved_in_reg (q->saved_reg, q->reg);
|
|
|
1086
|
|
|
1087 if (q->reg == pc_rtx)
|
|
|
1088 reg = DWARF_FRAME_RETURN_COLUMN;
|
|
|
1089 else
|
|
|
1090 reg = dwf_regno (q->reg);
|
|
|
1091 if (q->saved_reg)
|
|
|
1092 sreg = dwf_regno (q->saved_reg);
|
|
|
1093 else
|
|
|
1094 sreg = INVALID_REGNUM;
|
|
|
1095 reg_save (reg, sreg, q->cfa_offset);
|
|
|
1096 }
|
|
|
1097
|
|
|
1098 queued_reg_saves.truncate (0);
|
|
|
1099 }
|
|
|
1100
|
|
|
1101 /* Does INSN clobber any register which QUEUED_REG_SAVES lists a saved
|
|
|
1102 location for? Or, does it clobber a register which we've previously
|
|
|
1103 said that some other register is saved in, and for which we now
|
|
|
1104 have a new location for? */
|
|
|
1105
|
|
|
1106 static bool
|
|
|
1107 clobbers_queued_reg_save (const_rtx insn)
|
|
|
1108 {
|
|
|
1109 queued_reg_save *q;
|
|
|
1110 size_t iq;
|
|
|
1111
|
|
|
1112 FOR_EACH_VEC_ELT (queued_reg_saves, iq, q)
|
|
|
1113 {
|
|
|
1114 size_t ir;
|
|
|
1115 reg_saved_in_data *rir;
|
|
|
1116
|
|
|
1117 if (modified_in_p (q->reg, insn))
|
|
|
1118 return true;
|
|
|
1119
|
|
|
1120 FOR_EACH_VEC_ELT (cur_trace->regs_saved_in_regs, ir, rir)
|
|
|
1121 if (compare_reg_or_pc (q->reg, rir->orig_reg)
|
|
|
1122 && modified_in_p (rir->saved_in_reg, insn))
|
|
|
1123 return true;
|
|
|
1124 }
|
|
|
1125
|
|
|
1126 return false;
|
|
|
1127 }
|
|
|
1128
|
|
|
1129 /* What register, if any, is currently saved in REG? */
|
|
|
1130
|
|
|
1131 static rtx
|
|
|
1132 reg_saved_in (rtx reg)
|
|
|
1133 {
|
|
|
1134 unsigned int regn = REGNO (reg);
|
|
|
1135 queued_reg_save *q;
|
|
|
1136 reg_saved_in_data *rir;
|
|
|
1137 size_t i;
|
|
|
1138
|
|
|
1139 FOR_EACH_VEC_ELT (queued_reg_saves, i, q)
|
|
|
1140 if (q->saved_reg && regn == REGNO (q->saved_reg))
|
|
|
1141 return q->reg;
|
|
|
1142
|
|
|
1143 FOR_EACH_VEC_ELT (cur_trace->regs_saved_in_regs, i, rir)
|
|
|
1144 if (regn == REGNO (rir->saved_in_reg))
|
|
|
1145 return rir->orig_reg;
|
|
|
1146
|
|
|
1147 return NULL_RTX;
|
|
|
1148 }
|
|
|
1149
|
|
|
1150 /* A subroutine of dwarf2out_frame_debug, process a REG_DEF_CFA note. */
|
|
|
1151
|
|
|
1152 static void
|
|
|
1153 dwarf2out_frame_debug_def_cfa (rtx pat)
|
|
|
1154 {
|
|
|
1155 memset (cur_cfa, 0, sizeof (*cur_cfa));
|
|
|
1156
|
|
131
|
1157 pat = strip_offset (pat, &cur_cfa->offset);
|
|
111
|
1158 if (MEM_P (pat))
|
|
|
1159 {
|
|
|
1160 cur_cfa->indirect = 1;
|
|
131
|
1161 pat = strip_offset (XEXP (pat, 0), &cur_cfa->base_offset);
|
|
111
|
1162 }
|
|
|
1163 /* ??? If this fails, we could be calling into the _loc functions to
|
|
|
1164 define a full expression. So far no port does that. */
|
|
|
1165 gcc_assert (REG_P (pat));
|
|
|
1166 cur_cfa->reg = dwf_regno (pat);
|
|
|
1167 }
|
|
|
1168
|
|
|
1169 /* A subroutine of dwarf2out_frame_debug, process a REG_ADJUST_CFA note. */
|
|
|
1170
|
|
|
1171 static void
|
|
|
1172 dwarf2out_frame_debug_adjust_cfa (rtx pat)
|
|
|
1173 {
|
|
|
1174 rtx src, dest;
|
|
|
1175
|
|
|
1176 gcc_assert (GET_CODE (pat) == SET);
|
|
|
1177 dest = XEXP (pat, 0);
|
|
|
1178 src = XEXP (pat, 1);
|
|
|
1179
|
|
|
1180 switch (GET_CODE (src))
|
|
|
1181 {
|
|
|
1182 case PLUS:
|
|
|
1183 gcc_assert (dwf_regno (XEXP (src, 0)) == cur_cfa->reg);
|
|
131
|
1184 cur_cfa->offset -= rtx_to_poly_int64 (XEXP (src, 1));
|
|
111
|
1185 break;
|
|
|
1186
|
|
|
1187 case REG:
|
|
|
1188 break;
|
|
|
1189
|
|
|
1190 default:
|
|
|
1191 gcc_unreachable ();
|
|
|
1192 }
|
|
|
1193
|
|
|
1194 cur_cfa->reg = dwf_regno (dest);
|
|
|
1195 gcc_assert (cur_cfa->indirect == 0);
|
|
|
1196 }
|
|
|
1197
|
|
|
1198 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_OFFSET note. */
|
|
|
1199
|
|
|
1200 static void
|
|
|
1201 dwarf2out_frame_debug_cfa_offset (rtx set)
|
|
|
1202 {
|
|
131
|
1203 poly_int64 offset;
|
|
111
|
1204 rtx src, addr, span;
|
|
|
1205 unsigned int sregno;
|
|
|
1206
|
|
|
1207 src = XEXP (set, 1);
|
|
|
1208 addr = XEXP (set, 0);
|
|
|
1209 gcc_assert (MEM_P (addr));
|
|
|
1210 addr = XEXP (addr, 0);
|
|
|
1211
|
|
|
1212 /* As documented, only consider extremely simple addresses. */
|
|
|
1213 switch (GET_CODE (addr))
|
|
|
1214 {
|
|
|
1215 case REG:
|
|
|
1216 gcc_assert (dwf_regno (addr) == cur_cfa->reg);
|
|
|
1217 offset = -cur_cfa->offset;
|
|
|
1218 break;
|
|
|
1219 case PLUS:
|
|
|
1220 gcc_assert (dwf_regno (XEXP (addr, 0)) == cur_cfa->reg);
|
|
131
|
1221 offset = rtx_to_poly_int64 (XEXP (addr, 1)) - cur_cfa->offset;
|
|
111
|
1222 break;
|
|
|
1223 default:
|
|
|
1224 gcc_unreachable ();
|
|
|
1225 }
|
|
|
1226
|
|
|
1227 if (src == pc_rtx)
|
|
|
1228 {
|
|
|
1229 span = NULL;
|
|
|
1230 sregno = DWARF_FRAME_RETURN_COLUMN;
|
|
|
1231 }
|
|
|
1232 else
|
|
|
1233 {
|
|
|
1234 span = targetm.dwarf_register_span (src);
|
|
|
1235 sregno = dwf_regno (src);
|
|
|
1236 }
|
|
|
1237
|
|
|
1238 /* ??? We'd like to use queue_reg_save, but we need to come up with
|
|
|
1239 a different flushing heuristic for epilogues. */
|
|
|
1240 if (!span)
|
|
|
1241 reg_save (sregno, INVALID_REGNUM, offset);
|
|
|
1242 else
|
|
|
1243 {
|
|
|
1244 /* We have a PARALLEL describing where the contents of SRC live.
|
|
|
1245 Adjust the offset for each piece of the PARALLEL. */
|
|
131
|
1246 poly_int64 span_offset = offset;
|
|
111
|
1247
|
|
|
1248 gcc_assert (GET_CODE (span) == PARALLEL);
|
|
|
1249
|
|
|
1250 const int par_len = XVECLEN (span, 0);
|
|
|
1251 for (int par_index = 0; par_index < par_len; par_index++)
|
|
|
1252 {
|
|
|
1253 rtx elem = XVECEXP (span, 0, par_index);
|
|
|
1254 sregno = dwf_regno (src);
|
|
|
1255 reg_save (sregno, INVALID_REGNUM, span_offset);
|
|
|
1256 span_offset += GET_MODE_SIZE (GET_MODE (elem));
|
|
|
1257 }
|
|
|
1258 }
|
|
|
1259 }
|
|
|
1260
|
|
|
1261 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_REGISTER note. */
|
|
|
1262
|
|
|
1263 static void
|
|
|
1264 dwarf2out_frame_debug_cfa_register (rtx set)
|
|
|
1265 {
|
|
|
1266 rtx src, dest;
|
|
|
1267 unsigned sregno, dregno;
|
|
|
1268
|
|
|
1269 src = XEXP (set, 1);
|
|
|
1270 dest = XEXP (set, 0);
|
|
|
1271
|
|
|
1272 record_reg_saved_in_reg (dest, src);
|
|
|
1273 if (src == pc_rtx)
|
|
|
1274 sregno = DWARF_FRAME_RETURN_COLUMN;
|
|
|
1275 else
|
|
|
1276 sregno = dwf_regno (src);
|
|
|
1277
|
|
|
1278 dregno = dwf_regno (dest);
|
|
|
1279
|
|
|
1280 /* ??? We'd like to use queue_reg_save, but we need to come up with
|
|
|
1281 a different flushing heuristic for epilogues. */
|
|
|
1282 reg_save (sregno, dregno, 0);
|
|
|
1283 }
|
|
|
1284
|
|
|
1285 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_EXPRESSION note. */
|
|
|
1286
|
|
|
1287 static void
|
|
|
1288 dwarf2out_frame_debug_cfa_expression (rtx set)
|
|
|
1289 {
|
|
|
1290 rtx src, dest, span;
|
|
|
1291 dw_cfi_ref cfi = new_cfi ();
|
|
|
1292 unsigned regno;
|
|
|
1293
|
|
|
1294 dest = SET_DEST (set);
|
|
|
1295 src = SET_SRC (set);
|
|
|
1296
|
|
|
1297 gcc_assert (REG_P (src));
|
|
|
1298 gcc_assert (MEM_P (dest));
|
|
|
1299
|
|
|
1300 span = targetm.dwarf_register_span (src);
|
|
|
1301 gcc_assert (!span);
|
|
|
1302
|
|
|
1303 regno = dwf_regno (src);
|
|
|
1304
|
|
|
1305 cfi->dw_cfi_opc = DW_CFA_expression;
|
|
|
1306 cfi->dw_cfi_oprnd1.dw_cfi_reg_num = regno;
|
|
|
1307 cfi->dw_cfi_oprnd2.dw_cfi_loc
|
|
|
1308 = mem_loc_descriptor (XEXP (dest, 0), get_address_mode (dest),
|
|
|
1309 GET_MODE (dest), VAR_INIT_STATUS_INITIALIZED);
|
|
|
1310
|
|
|
1311 /* ??? We'd like to use queue_reg_save, were the interface different,
|
|
|
1312 and, as above, we could manage flushing for epilogues. */
|
|
|
1313 add_cfi (cfi);
|
|
|
1314 update_row_reg_save (cur_row, regno, cfi);
|
|
|
1315 }
|
|
|
1316
|
|
|
1317 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_VAL_EXPRESSION
|
|
|
1318 note. */
|
|
|
1319
|
|
|
1320 static void
|
|
|
1321 dwarf2out_frame_debug_cfa_val_expression (rtx set)
|
|
|
1322 {
|
|
|
1323 rtx dest = SET_DEST (set);
|
|
|
1324 gcc_assert (REG_P (dest));
|
|
|
1325
|
|
|
1326 rtx span = targetm.dwarf_register_span (dest);
|
|
|
1327 gcc_assert (!span);
|
|
|
1328
|
|
|
1329 rtx src = SET_SRC (set);
|
|
|
1330 dw_cfi_ref cfi = new_cfi ();
|
|
|
1331 cfi->dw_cfi_opc = DW_CFA_val_expression;
|
|
|
1332 cfi->dw_cfi_oprnd1.dw_cfi_reg_num = dwf_regno (dest);
|
|
|
1333 cfi->dw_cfi_oprnd2.dw_cfi_loc
|
|
|
1334 = mem_loc_descriptor (src, GET_MODE (src),
|
|
|
1335 GET_MODE (dest), VAR_INIT_STATUS_INITIALIZED);
|
|
|
1336 add_cfi (cfi);
|
|
|
1337 update_row_reg_save (cur_row, dwf_regno (dest), cfi);
|
|
|
1338 }
|
|
|
1339
|
|
|
1340 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_RESTORE note. */
|
|
|
1341
|
|
|
1342 static void
|
|
|
1343 dwarf2out_frame_debug_cfa_restore (rtx reg)
|
|
|
1344 {
|
|
|
1345 gcc_assert (REG_P (reg));
|
|
|
1346
|
|
|
1347 rtx span = targetm.dwarf_register_span (reg);
|
|
|
1348 if (!span)
|
|
|
1349 {
|
|
|
1350 unsigned int regno = dwf_regno (reg);
|
|
|
1351 add_cfi_restore (regno);
|
|
|
1352 update_row_reg_save (cur_row, regno, NULL);
|
|
|
1353 }
|
|
|
1354 else
|
|
|
1355 {
|
|
|
1356 /* We have a PARALLEL describing where the contents of REG live.
|
|
|
1357 Restore the register for each piece of the PARALLEL. */
|
|
|
1358 gcc_assert (GET_CODE (span) == PARALLEL);
|
|
|
1359
|
|
|
1360 const int par_len = XVECLEN (span, 0);
|
|
|
1361 for (int par_index = 0; par_index < par_len; par_index++)
|
|
|
1362 {
|
|
|
1363 reg = XVECEXP (span, 0, par_index);
|
|
|
1364 gcc_assert (REG_P (reg));
|
|
|
1365 unsigned int regno = dwf_regno (reg);
|
|
|
1366 add_cfi_restore (regno);
|
|
|
1367 update_row_reg_save (cur_row, regno, NULL);
|
|
|
1368 }
|
|
|
1369 }
|
|
|
1370 }
|
|
|
1371
|
|
|
1372 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_WINDOW_SAVE.
|
|
145
|
1373 FAKE is true if this is not really a window save but something else.
|
|
|
1374
|
|
|
1375 ??? Perhaps we should note in the CIE where windows are saved (instead
|
|
|
1376 of assuming 0(cfa)) and what registers are in the window. */
|
|
111
|
1377
|
|
|
1378 static void
|
|
145
|
1379 dwarf2out_frame_debug_cfa_window_save (bool fake)
|
|
111
|
1380 {
|
|
|
1381 dw_cfi_ref cfi = new_cfi ();
|
|
|
1382
|
|
|
1383 cfi->dw_cfi_opc = DW_CFA_GNU_window_save;
|
|
|
1384 add_cfi (cfi);
|
|
145
|
1385 if (!fake)
|
|
|
1386 cur_row->window_save = true;
|
|
111
|
1387 }
|
|
|
1388
|
|
|
1389 /* Record call frame debugging information for an expression EXPR,
|
|
|
1390 which either sets SP or FP (adjusting how we calculate the frame
|
|
|
1391 address) or saves a register to the stack or another register.
|
|
|
1392 LABEL indicates the address of EXPR.
|
|
|
1393
|
|
|
1394 This function encodes a state machine mapping rtxes to actions on
|
|
|
1395 cfa, cfa_store, and cfa_temp.reg. We describe these rules so
|
|
|
1396 users need not read the source code.
|
|
|
1397
|
|
|
1398 The High-Level Picture
|
|
|
1399
|
|
|
1400 Changes in the register we use to calculate the CFA: Currently we
|
|
|
1401 assume that if you copy the CFA register into another register, we
|
|
|
1402 should take the other one as the new CFA register; this seems to
|
|
|
1403 work pretty well. If it's wrong for some target, it's simple
|
|
|
1404 enough not to set RTX_FRAME_RELATED_P on the insn in question.
|
|
|
1405
|
|
|
1406 Changes in the register we use for saving registers to the stack:
|
|
|
1407 This is usually SP, but not always. Again, we deduce that if you
|
|
|
1408 copy SP into another register (and SP is not the CFA register),
|
|
|
1409 then the new register is the one we will be using for register
|
|
|
1410 saves. This also seems to work.
|
|
|
1411
|
|
|
1412 Register saves: There's not much guesswork about this one; if
|
|
|
1413 RTX_FRAME_RELATED_P is set on an insn which modifies memory, it's a
|
|
|
1414 register save, and the register used to calculate the destination
|
|
|
1415 had better be the one we think we're using for this purpose.
|
|
|
1416 It's also assumed that a copy from a call-saved register to another
|
|
|
1417 register is saving that register if RTX_FRAME_RELATED_P is set on
|
|
|
1418 that instruction. If the copy is from a call-saved register to
|
|
|
1419 the *same* register, that means that the register is now the same
|
|
|
1420 value as in the caller.
|
|
|
1421
|
|
|
1422 Except: If the register being saved is the CFA register, and the
|
|
|
1423 offset is nonzero, we are saving the CFA, so we assume we have to
|
|
|
1424 use DW_CFA_def_cfa_expression. If the offset is 0, we assume that
|
|
|
1425 the intent is to save the value of SP from the previous frame.
|
|
|
1426
|
|
|
1427 In addition, if a register has previously been saved to a different
|
|
|
1428 register,
|
|
|
1429
|
|
|
1430 Invariants / Summaries of Rules
|
|
|
1431
|
|
|
1432 cfa current rule for calculating the CFA. It usually
|
|
|
1433 consists of a register and an offset. This is
|
|
|
1434 actually stored in *cur_cfa, but abbreviated
|
|
|
1435 for the purposes of this documentation.
|
|
|
1436 cfa_store register used by prologue code to save things to the stack
|
|
|
1437 cfa_store.offset is the offset from the value of
|
|
|
1438 cfa_store.reg to the actual CFA
|
|
|
1439 cfa_temp register holding an integral value. cfa_temp.offset
|
|
|
1440 stores the value, which will be used to adjust the
|
|
|
1441 stack pointer. cfa_temp is also used like cfa_store,
|
|
|
1442 to track stores to the stack via fp or a temp reg.
|
|
|
1443
|
|
|
1444 Rules 1- 4: Setting a register's value to cfa.reg or an expression
|
|
|
1445 with cfa.reg as the first operand changes the cfa.reg and its
|
|
|
1446 cfa.offset. Rule 1 and 4 also set cfa_temp.reg and
|
|
|
1447 cfa_temp.offset.
|
|
|
1448
|
|
|
1449 Rules 6- 9: Set a non-cfa.reg register value to a constant or an
|
|
|
1450 expression yielding a constant. This sets cfa_temp.reg
|
|
|
1451 and cfa_temp.offset.
|
|
|
1452
|
|
|
1453 Rule 5: Create a new register cfa_store used to save items to the
|
|
|
1454 stack.
|
|
|
1455
|
|
|
1456 Rules 10-14: Save a register to the stack. Define offset as the
|
|
|
1457 difference of the original location and cfa_store's
|
|
|
1458 location (or cfa_temp's location if cfa_temp is used).
|
|
|
1459
|
|
|
1460 Rules 16-20: If AND operation happens on sp in prologue, we assume
|
|
|
1461 stack is realigned. We will use a group of DW_OP_XXX
|
|
|
1462 expressions to represent the location of the stored
|
|
|
1463 register instead of CFA+offset.
|
|
|
1464
|
|
|
1465 The Rules
|
|
|
1466
|
|
|
1467 "{a,b}" indicates a choice of a xor b.
|
|
|
1468 "<reg>:cfa.reg" indicates that <reg> must equal cfa.reg.
|
|
|
1469
|
|
|
1470 Rule 1:
|
|
|
1471 (set <reg1> <reg2>:cfa.reg)
|
|
|
1472 effects: cfa.reg = <reg1>
|
|
|
1473 cfa.offset unchanged
|
|
|
1474 cfa_temp.reg = <reg1>
|
|
|
1475 cfa_temp.offset = cfa.offset
|
|
|
1476
|
|
|
1477 Rule 2:
|
|
|
1478 (set sp ({minus,plus,losum} {sp,fp}:cfa.reg
|
|
|
1479 {<const_int>,<reg>:cfa_temp.reg}))
|
|
|
1480 effects: cfa.reg = sp if fp used
|
|
|
1481 cfa.offset += {+/- <const_int>, cfa_temp.offset} if cfa.reg==sp
|
|
|
1482 cfa_store.offset += {+/- <const_int>, cfa_temp.offset}
|
|
|
1483 if cfa_store.reg==sp
|
|
|
1484
|
|
|
1485 Rule 3:
|
|
|
1486 (set fp ({minus,plus,losum} <reg>:cfa.reg <const_int>))
|
|
|
1487 effects: cfa.reg = fp
|
|
|
1488 cfa_offset += +/- <const_int>
|
|
|
1489
|
|
|
1490 Rule 4:
|
|
|
1491 (set <reg1> ({plus,losum} <reg2>:cfa.reg <const_int>))
|
|
|
1492 constraints: <reg1> != fp
|
|
|
1493 <reg1> != sp
|
|
|
1494 effects: cfa.reg = <reg1>
|
|
|
1495 cfa_temp.reg = <reg1>
|
|
|
1496 cfa_temp.offset = cfa.offset
|
|
|
1497
|
|
|
1498 Rule 5:
|
|
|
1499 (set <reg1> (plus <reg2>:cfa_temp.reg sp:cfa.reg))
|
|
|
1500 constraints: <reg1> != fp
|
|
|
1501 <reg1> != sp
|
|
|
1502 effects: cfa_store.reg = <reg1>
|
|
|
1503 cfa_store.offset = cfa.offset - cfa_temp.offset
|
|
|
1504
|
|
|
1505 Rule 6:
|
|
|
1506 (set <reg> <const_int>)
|
|
|
1507 effects: cfa_temp.reg = <reg>
|
|
|
1508 cfa_temp.offset = <const_int>
|
|
|
1509
|
|
|
1510 Rule 7:
|
|
|
1511 (set <reg1>:cfa_temp.reg (ior <reg2>:cfa_temp.reg <const_int>))
|
|
|
1512 effects: cfa_temp.reg = <reg1>
|
|
|
1513 cfa_temp.offset |= <const_int>
|
|
|
1514
|
|
|
1515 Rule 8:
|
|
|
1516 (set <reg> (high <exp>))
|
|
|
1517 effects: none
|
|
|
1518
|
|
|
1519 Rule 9:
|
|
|
1520 (set <reg> (lo_sum <exp> <const_int>))
|
|
|
1521 effects: cfa_temp.reg = <reg>
|
|
|
1522 cfa_temp.offset = <const_int>
|
|
|
1523
|
|
|
1524 Rule 10:
|
|
|
1525 (set (mem ({pre,post}_modify sp:cfa_store (???? <reg1> <const_int>))) <reg2>)
|
|
|
1526 effects: cfa_store.offset -= <const_int>
|
|
|
1527 cfa.offset = cfa_store.offset if cfa.reg == sp
|
|
|
1528 cfa.reg = sp
|
|
|
1529 cfa.base_offset = -cfa_store.offset
|
|
|
1530
|
|
|
1531 Rule 11:
|
|
|
1532 (set (mem ({pre_inc,pre_dec,post_dec} sp:cfa_store.reg)) <reg>)
|
|
|
1533 effects: cfa_store.offset += -/+ mode_size(mem)
|
|
|
1534 cfa.offset = cfa_store.offset if cfa.reg == sp
|
|
|
1535 cfa.reg = sp
|
|
|
1536 cfa.base_offset = -cfa_store.offset
|
|
|
1537
|
|
|
1538 Rule 12:
|
|
|
1539 (set (mem ({minus,plus,losum} <reg1>:{cfa_store,cfa_temp} <const_int>))
|
|
|
1540
|
|
|
1541 <reg2>)
|
|
|
1542 effects: cfa.reg = <reg1>
|
|
|
1543 cfa.base_offset = -/+ <const_int> - {cfa_store,cfa_temp}.offset
|
|
|
1544
|
|
|
1545 Rule 13:
|
|
|
1546 (set (mem <reg1>:{cfa_store,cfa_temp}) <reg2>)
|
|
|
1547 effects: cfa.reg = <reg1>
|
|
|
1548 cfa.base_offset = -{cfa_store,cfa_temp}.offset
|
|
|
1549
|
|
|
1550 Rule 14:
|
|
|
1551 (set (mem (post_inc <reg1>:cfa_temp <const_int>)) <reg2>)
|
|
|
1552 effects: cfa.reg = <reg1>
|
|
|
1553 cfa.base_offset = -cfa_temp.offset
|
|
|
1554 cfa_temp.offset -= mode_size(mem)
|
|
|
1555
|
|
|
1556 Rule 15:
|
|
|
1557 (set <reg> {unspec, unspec_volatile})
|
|
|
1558 effects: target-dependent
|
|
|
1559
|
|
|
1560 Rule 16:
|
|
|
1561 (set sp (and: sp <const_int>))
|
|
|
1562 constraints: cfa_store.reg == sp
|
|
|
1563 effects: cfun->fde.stack_realign = 1
|
|
|
1564 cfa_store.offset = 0
|
|
|
1565 fde->drap_reg = cfa.reg if cfa.reg != sp and cfa.reg != fp
|
|
|
1566
|
|
|
1567 Rule 17:
|
|
|
1568 (set (mem ({pre_inc, pre_dec} sp)) (mem (plus (cfa.reg) (const_int))))
|
|
|
1569 effects: cfa_store.offset += -/+ mode_size(mem)
|
|
|
1570
|
|
|
1571 Rule 18:
|
|
|
1572 (set (mem ({pre_inc, pre_dec} sp)) fp)
|
|
|
1573 constraints: fde->stack_realign == 1
|
|
|
1574 effects: cfa_store.offset = 0
|
|
|
1575 cfa.reg != HARD_FRAME_POINTER_REGNUM
|
|
|
1576
|
|
|
1577 Rule 19:
|
|
|
1578 (set (mem ({pre_inc, pre_dec} sp)) cfa.reg)
|
|
|
1579 constraints: fde->stack_realign == 1
|
|
|
1580 && cfa.offset == 0
|
|
|
1581 && cfa.indirect == 0
|
|
|
1582 && cfa.reg != HARD_FRAME_POINTER_REGNUM
|
|
|
1583 effects: Use DW_CFA_def_cfa_expression to define cfa
|
|
|
1584 cfa.reg == fde->drap_reg */
|
|
|
1585
|
|
|
1586 static void
|
|
|
1587 dwarf2out_frame_debug_expr (rtx expr)
|
|
|
1588 {
|
|
|
1589 rtx src, dest, span;
|
|
131
|
1590 poly_int64 offset;
|
|
111
|
1591 dw_fde_ref fde;
|
|
|
1592
|
|
|
1593 /* If RTX_FRAME_RELATED_P is set on a PARALLEL, process each member of
|
|
|
1594 the PARALLEL independently. The first element is always processed if
|
|
|
1595 it is a SET. This is for backward compatibility. Other elements
|
|
|
1596 are processed only if they are SETs and the RTX_FRAME_RELATED_P
|
|
|
1597 flag is set in them. */
|
|
|
1598 if (GET_CODE (expr) == PARALLEL || GET_CODE (expr) == SEQUENCE)
|
|
|
1599 {
|
|
|
1600 int par_index;
|
|
|
1601 int limit = XVECLEN (expr, 0);
|
|
|
1602 rtx elem;
|
|
|
1603
|
|
|
1604 /* PARALLELs have strict read-modify-write semantics, so we
|
|
|
1605 ought to evaluate every rvalue before changing any lvalue.
|
|
|
1606 It's cumbersome to do that in general, but there's an
|
|
|
1607 easy approximation that is enough for all current users:
|
|
|
1608 handle register saves before register assignments. */
|
|
|
1609 if (GET_CODE (expr) == PARALLEL)
|
|
|
1610 for (par_index = 0; par_index < limit; par_index++)
|
|
|
1611 {
|
|
|
1612 elem = XVECEXP (expr, 0, par_index);
|
|
|
1613 if (GET_CODE (elem) == SET
|
|
|
1614 && MEM_P (SET_DEST (elem))
|
|
|
1615 && (RTX_FRAME_RELATED_P (elem) || par_index == 0))
|
|
|
1616 dwarf2out_frame_debug_expr (elem);
|
|
|
1617 }
|
|
|
1618
|
|
|
1619 for (par_index = 0; par_index < limit; par_index++)
|
|
|
1620 {
|
|
|
1621 elem = XVECEXP (expr, 0, par_index);
|
|
|
1622 if (GET_CODE (elem) == SET
|
|
|
1623 && (!MEM_P (SET_DEST (elem)) || GET_CODE (expr) == SEQUENCE)
|
|
|
1624 && (RTX_FRAME_RELATED_P (elem) || par_index == 0))
|
|
|
1625 dwarf2out_frame_debug_expr (elem);
|
|
|
1626 }
|
|
|
1627 return;
|
|
|
1628 }
|
|
|
1629
|
|
|
1630 gcc_assert (GET_CODE (expr) == SET);
|
|
|
1631
|
|
|
1632 src = SET_SRC (expr);
|
|
|
1633 dest = SET_DEST (expr);
|
|
|
1634
|
|
|
1635 if (REG_P (src))
|
|
|
1636 {
|
|
|
1637 rtx rsi = reg_saved_in (src);
|
|
|
1638 if (rsi)
|
|
|
1639 src = rsi;
|
|
|
1640 }
|
|
|
1641
|
|
|
1642 fde = cfun->fde;
|
|
|
1643
|
|
|
1644 switch (GET_CODE (dest))
|
|
|
1645 {
|
|
|
1646 case REG:
|
|
|
1647 switch (GET_CODE (src))
|
|
|
1648 {
|
|
|
1649 /* Setting FP from SP. */
|
|
|
1650 case REG:
|
|
|
1651 if (cur_cfa->reg == dwf_regno (src))
|
|
|
1652 {
|
|
|
1653 /* Rule 1 */
|
|
|
1654 /* Update the CFA rule wrt SP or FP. Make sure src is
|
|
|
1655 relative to the current CFA register.
|
|
|
1656
|
|
|
1657 We used to require that dest be either SP or FP, but the
|
|
|
1658 ARM copies SP to a temporary register, and from there to
|
|
|
1659 FP. So we just rely on the backends to only set
|
|
|
1660 RTX_FRAME_RELATED_P on appropriate insns. */
|
|
|
1661 cur_cfa->reg = dwf_regno (dest);
|
|
|
1662 cur_trace->cfa_temp.reg = cur_cfa->reg;
|
|
|
1663 cur_trace->cfa_temp.offset = cur_cfa->offset;
|
|
|
1664 }
|
|
|
1665 else
|
|
|
1666 {
|
|
|
1667 /* Saving a register in a register. */
|
|
|
1668 gcc_assert (!fixed_regs [REGNO (dest)]
|
|
|
1669 /* For the SPARC and its register window. */
|
|
|
1670 || (dwf_regno (src) == DWARF_FRAME_RETURN_COLUMN));
|
|
|
1671
|
|
|
1672 /* After stack is aligned, we can only save SP in FP
|
|
|
1673 if drap register is used. In this case, we have
|
|
|
1674 to restore stack pointer with the CFA value and we
|
|
|
1675 don't generate this DWARF information. */
|
|
|
1676 if (fde
|
|
|
1677 && fde->stack_realign
|
|
|
1678 && REGNO (src) == STACK_POINTER_REGNUM)
|
|
|
1679 gcc_assert (REGNO (dest) == HARD_FRAME_POINTER_REGNUM
|
|
|
1680 && fde->drap_reg != INVALID_REGNUM
|
|
|
1681 && cur_cfa->reg != dwf_regno (src));
|
|
|
1682 else
|
|
|
1683 queue_reg_save (src, dest, 0);
|
|
|
1684 }
|
|
|
1685 break;
|
|
|
1686
|
|
|
1687 case PLUS:
|
|
|
1688 case MINUS:
|
|
|
1689 case LO_SUM:
|
|
|
1690 if (dest == stack_pointer_rtx)
|
|
|
1691 {
|
|
|
1692 /* Rule 2 */
|
|
|
1693 /* Adjusting SP. */
|
|
131
|
1694 if (REG_P (XEXP (src, 1)))
|
|
111
|
1695 {
|
|
|
1696 gcc_assert (dwf_regno (XEXP (src, 1))
|
|
|
1697 == cur_trace->cfa_temp.reg);
|
|
|
1698 offset = cur_trace->cfa_temp.offset;
|
|
|
1699 }
|
|
131
|
1700 else if (!poly_int_rtx_p (XEXP (src, 1), &offset))
|
|
|
1701 gcc_unreachable ();
|
|
111
|
1702
|
|
|
1703 if (XEXP (src, 0) == hard_frame_pointer_rtx)
|
|
|
1704 {
|
|
|
1705 /* Restoring SP from FP in the epilogue. */
|
|
|
1706 gcc_assert (cur_cfa->reg == dw_frame_pointer_regnum);
|
|
|
1707 cur_cfa->reg = dw_stack_pointer_regnum;
|
|
|
1708 }
|
|
|
1709 else if (GET_CODE (src) == LO_SUM)
|
|
|
1710 /* Assume we've set the source reg of the LO_SUM from sp. */
|
|
|
1711 ;
|
|
|
1712 else
|
|
|
1713 gcc_assert (XEXP (src, 0) == stack_pointer_rtx);
|
|
|
1714
|
|
|
1715 if (GET_CODE (src) != MINUS)
|
|
|
1716 offset = -offset;
|
|
|
1717 if (cur_cfa->reg == dw_stack_pointer_regnum)
|
|
|
1718 cur_cfa->offset += offset;
|
|
|
1719 if (cur_trace->cfa_store.reg == dw_stack_pointer_regnum)
|
|
|
1720 cur_trace->cfa_store.offset += offset;
|
|
|
1721 }
|
|
|
1722 else if (dest == hard_frame_pointer_rtx)
|
|
|
1723 {
|
|
|
1724 /* Rule 3 */
|
|
|
1725 /* Either setting the FP from an offset of the SP,
|
|
|
1726 or adjusting the FP */
|
|
|
1727 gcc_assert (frame_pointer_needed);
|
|
|
1728
|
|
|
1729 gcc_assert (REG_P (XEXP (src, 0))
|
|
131
|
1730 && dwf_regno (XEXP (src, 0)) == cur_cfa->reg);
|
|
|
1731 offset = rtx_to_poly_int64 (XEXP (src, 1));
|
|
111
|
1732 if (GET_CODE (src) != MINUS)
|
|
|
1733 offset = -offset;
|
|
|
1734 cur_cfa->offset += offset;
|
|
|
1735 cur_cfa->reg = dw_frame_pointer_regnum;
|
|
|
1736 }
|
|
|
1737 else
|
|
|
1738 {
|
|
|
1739 gcc_assert (GET_CODE (src) != MINUS);
|
|
|
1740
|
|
|
1741 /* Rule 4 */
|
|
|
1742 if (REG_P (XEXP (src, 0))
|
|
|
1743 && dwf_regno (XEXP (src, 0)) == cur_cfa->reg
|
|
131
|
1744 && poly_int_rtx_p (XEXP (src, 1), &offset))
|
|
111
|
1745 {
|
|
|
1746 /* Setting a temporary CFA register that will be copied
|
|
|
1747 into the FP later on. */
|
|
131
|
1748 offset = -offset;
|
|
111
|
1749 cur_cfa->offset += offset;
|
|
|
1750 cur_cfa->reg = dwf_regno (dest);
|
|
|
1751 /* Or used to save regs to the stack. */
|
|
|
1752 cur_trace->cfa_temp.reg = cur_cfa->reg;
|
|
|
1753 cur_trace->cfa_temp.offset = cur_cfa->offset;
|
|
|
1754 }
|
|
|
1755
|
|
|
1756 /* Rule 5 */
|
|
|
1757 else if (REG_P (XEXP (src, 0))
|
|
|
1758 && dwf_regno (XEXP (src, 0)) == cur_trace->cfa_temp.reg
|
|
|
1759 && XEXP (src, 1) == stack_pointer_rtx)
|
|
|
1760 {
|
|
|
1761 /* Setting a scratch register that we will use instead
|
|
|
1762 of SP for saving registers to the stack. */
|
|
|
1763 gcc_assert (cur_cfa->reg == dw_stack_pointer_regnum);
|
|
|
1764 cur_trace->cfa_store.reg = dwf_regno (dest);
|
|
|
1765 cur_trace->cfa_store.offset
|
|
|
1766 = cur_cfa->offset - cur_trace->cfa_temp.offset;
|
|
|
1767 }
|
|
|
1768
|
|
|
1769 /* Rule 9 */
|
|
|
1770 else if (GET_CODE (src) == LO_SUM
|
|
131
|
1771 && poly_int_rtx_p (XEXP (src, 1),
|
|
|
1772 &cur_trace->cfa_temp.offset))
|
|
|
1773 cur_trace->cfa_temp.reg = dwf_regno (dest);
|
|
111
|
1774 else
|
|
|
1775 gcc_unreachable ();
|
|
|
1776 }
|
|
|
1777 break;
|
|
|
1778
|
|
|
1779 /* Rule 6 */
|
|
|
1780 case CONST_INT:
|
|
145
|
1781 case CONST_POLY_INT:
|
|
111
|
1782 cur_trace->cfa_temp.reg = dwf_regno (dest);
|
|
131
|
1783 cur_trace->cfa_temp.offset = rtx_to_poly_int64 (src);
|
|
111
|
1784 break;
|
|
|
1785
|
|
|
1786 /* Rule 7 */
|
|
|
1787 case IOR:
|
|
|
1788 gcc_assert (REG_P (XEXP (src, 0))
|
|
|
1789 && dwf_regno (XEXP (src, 0)) == cur_trace->cfa_temp.reg
|
|
|
1790 && CONST_INT_P (XEXP (src, 1)));
|
|
|
1791
|
|
|
1792 cur_trace->cfa_temp.reg = dwf_regno (dest);
|
|
131
|
1793 if (!can_ior_p (cur_trace->cfa_temp.offset, INTVAL (XEXP (src, 1)),
|
|
|
1794 &cur_trace->cfa_temp.offset))
|
|
|
1795 /* The target shouldn't generate this kind of CFI note if we
|
|
|
1796 can't represent it. */
|
|
|
1797 gcc_unreachable ();
|
|
111
|
1798 break;
|
|
|
1799
|
|
|
1800 /* Skip over HIGH, assuming it will be followed by a LO_SUM,
|
|
|
1801 which will fill in all of the bits. */
|
|
|
1802 /* Rule 8 */
|
|
|
1803 case HIGH:
|
|
|
1804 break;
|
|
|
1805
|
|
|
1806 /* Rule 15 */
|
|
|
1807 case UNSPEC:
|
|
|
1808 case UNSPEC_VOLATILE:
|
|
|
1809 /* All unspecs should be represented by REG_CFA_* notes. */
|
|
|
1810 gcc_unreachable ();
|
|
|
1811 return;
|
|
|
1812
|
|
|
1813 /* Rule 16 */
|
|
|
1814 case AND:
|
|
|
1815 /* If this AND operation happens on stack pointer in prologue,
|
|
|
1816 we assume the stack is realigned and we extract the
|
|
|
1817 alignment. */
|
|
|
1818 if (fde && XEXP (src, 0) == stack_pointer_rtx)
|
|
|
1819 {
|
|
|
1820 /* We interpret reg_save differently with stack_realign set.
|
|
|
1821 Thus we must flush whatever we have queued first. */
|
|
|
1822 dwarf2out_flush_queued_reg_saves ();
|
|
|
1823
|
|
|
1824 gcc_assert (cur_trace->cfa_store.reg
|
|
|
1825 == dwf_regno (XEXP (src, 0)));
|
|
|
1826 fde->stack_realign = 1;
|
|
|
1827 fde->stack_realignment = INTVAL (XEXP (src, 1));
|
|
|
1828 cur_trace->cfa_store.offset = 0;
|
|
|
1829
|
|
|
1830 if (cur_cfa->reg != dw_stack_pointer_regnum
|
|
|
1831 && cur_cfa->reg != dw_frame_pointer_regnum)
|
|
|
1832 fde->drap_reg = cur_cfa->reg;
|
|
|
1833 }
|
|
|
1834 return;
|
|
|
1835
|
|
|
1836 default:
|
|
|
1837 gcc_unreachable ();
|
|
|
1838 }
|
|
|
1839 break;
|
|
|
1840
|
|
|
1841 case MEM:
|
|
|
1842
|
|
|
1843 /* Saving a register to the stack. Make sure dest is relative to the
|
|
|
1844 CFA register. */
|
|
|
1845 switch (GET_CODE (XEXP (dest, 0)))
|
|
|
1846 {
|
|
|
1847 /* Rule 10 */
|
|
|
1848 /* With a push. */
|
|
|
1849 case PRE_MODIFY:
|
|
|
1850 case POST_MODIFY:
|
|
|
1851 /* We can't handle variable size modifications. */
|
|
131
|
1852 offset = -rtx_to_poly_int64 (XEXP (XEXP (XEXP (dest, 0), 1), 1));
|
|
111
|
1853
|
|
|
1854 gcc_assert (REGNO (XEXP (XEXP (dest, 0), 0)) == STACK_POINTER_REGNUM
|
|
|
1855 && cur_trace->cfa_store.reg == dw_stack_pointer_regnum);
|
|
|
1856
|
|
|
1857 cur_trace->cfa_store.offset += offset;
|
|
|
1858 if (cur_cfa->reg == dw_stack_pointer_regnum)
|
|
|
1859 cur_cfa->offset = cur_trace->cfa_store.offset;
|
|
|
1860
|
|
|
1861 if (GET_CODE (XEXP (dest, 0)) == POST_MODIFY)
|
|
|
1862 offset -= cur_trace->cfa_store.offset;
|
|
|
1863 else
|
|
|
1864 offset = -cur_trace->cfa_store.offset;
|
|
|
1865 break;
|
|
|
1866
|
|
|
1867 /* Rule 11 */
|
|
|
1868 case PRE_INC:
|
|
|
1869 case PRE_DEC:
|
|
|
1870 case POST_DEC:
|
|
|
1871 offset = GET_MODE_SIZE (GET_MODE (dest));
|
|
|
1872 if (GET_CODE (XEXP (dest, 0)) == PRE_INC)
|
|
|
1873 offset = -offset;
|
|
|
1874
|
|
|
1875 gcc_assert ((REGNO (XEXP (XEXP (dest, 0), 0))
|
|
|
1876 == STACK_POINTER_REGNUM)
|
|
|
1877 && cur_trace->cfa_store.reg == dw_stack_pointer_regnum);
|
|
|
1878
|
|
|
1879 cur_trace->cfa_store.offset += offset;
|
|
|
1880
|
|
|
1881 /* Rule 18: If stack is aligned, we will use FP as a
|
|
|
1882 reference to represent the address of the stored
|
|
|
1883 regiser. */
|
|
|
1884 if (fde
|
|
|
1885 && fde->stack_realign
|
|
|
1886 && REG_P (src)
|
|
|
1887 && REGNO (src) == HARD_FRAME_POINTER_REGNUM)
|
|
|
1888 {
|
|
|
1889 gcc_assert (cur_cfa->reg != dw_frame_pointer_regnum);
|
|
|
1890 cur_trace->cfa_store.offset = 0;
|
|
|
1891 }
|
|
|
1892
|
|
|
1893 if (cur_cfa->reg == dw_stack_pointer_regnum)
|
|
|
1894 cur_cfa->offset = cur_trace->cfa_store.offset;
|
|
|
1895
|
|
|
1896 if (GET_CODE (XEXP (dest, 0)) == POST_DEC)
|
|
|
1897 offset += -cur_trace->cfa_store.offset;
|
|
|
1898 else
|
|
|
1899 offset = -cur_trace->cfa_store.offset;
|
|
|
1900 break;
|
|
|
1901
|
|
|
1902 /* Rule 12 */
|
|
|
1903 /* With an offset. */
|
|
|
1904 case PLUS:
|
|
|
1905 case MINUS:
|
|
|
1906 case LO_SUM:
|
|
|
1907 {
|
|
|
1908 unsigned int regno;
|
|
|
1909
|
|
131
|
1910 gcc_assert (REG_P (XEXP (XEXP (dest, 0), 0)));
|
|
|
1911 offset = rtx_to_poly_int64 (XEXP (XEXP (dest, 0), 1));
|
|
111
|
1912 if (GET_CODE (XEXP (dest, 0)) == MINUS)
|
|
|
1913 offset = -offset;
|
|
|
1914
|
|
|
1915 regno = dwf_regno (XEXP (XEXP (dest, 0), 0));
|
|
|
1916
|
|
|
1917 if (cur_cfa->reg == regno)
|
|
|
1918 offset -= cur_cfa->offset;
|
|
|
1919 else if (cur_trace->cfa_store.reg == regno)
|
|
|
1920 offset -= cur_trace->cfa_store.offset;
|
|
|
1921 else
|
|
|
1922 {
|
|
|
1923 gcc_assert (cur_trace->cfa_temp.reg == regno);
|
|
|
1924 offset -= cur_trace->cfa_temp.offset;
|
|
|
1925 }
|
|
|
1926 }
|
|
|
1927 break;
|
|
|
1928
|
|
|
1929 /* Rule 13 */
|
|
|
1930 /* Without an offset. */
|
|
|
1931 case REG:
|
|
|
1932 {
|
|
|
1933 unsigned int regno = dwf_regno (XEXP (dest, 0));
|
|
|
1934
|
|
|
1935 if (cur_cfa->reg == regno)
|
|
|
1936 offset = -cur_cfa->offset;
|
|
|
1937 else if (cur_trace->cfa_store.reg == regno)
|
|
|
1938 offset = -cur_trace->cfa_store.offset;
|
|
|
1939 else
|
|
|
1940 {
|
|
|
1941 gcc_assert (cur_trace->cfa_temp.reg == regno);
|
|
|
1942 offset = -cur_trace->cfa_temp.offset;
|
|
|
1943 }
|
|
|
1944 }
|
|
|
1945 break;
|
|
|
1946
|
|
|
1947 /* Rule 14 */
|
|
|
1948 case POST_INC:
|
|
|
1949 gcc_assert (cur_trace->cfa_temp.reg
|
|
|
1950 == dwf_regno (XEXP (XEXP (dest, 0), 0)));
|
|
|
1951 offset = -cur_trace->cfa_temp.offset;
|
|
|
1952 cur_trace->cfa_temp.offset -= GET_MODE_SIZE (GET_MODE (dest));
|
|
|
1953 break;
|
|
|
1954
|
|
|
1955 default:
|
|
|
1956 gcc_unreachable ();
|
|
|
1957 }
|
|
|
1958
|
|
|
1959 /* Rule 17 */
|
|
|
1960 /* If the source operand of this MEM operation is a memory,
|
|
|
1961 we only care how much stack grew. */
|
|
|
1962 if (MEM_P (src))
|
|
|
1963 break;
|
|
|
1964
|
|
|
1965 if (REG_P (src)
|
|
|
1966 && REGNO (src) != STACK_POINTER_REGNUM
|
|
|
1967 && REGNO (src) != HARD_FRAME_POINTER_REGNUM
|
|
|
1968 && dwf_regno (src) == cur_cfa->reg)
|
|
|
1969 {
|
|
|
1970 /* We're storing the current CFA reg into the stack. */
|
|
|
1971
|
|
131
|
1972 if (known_eq (cur_cfa->offset, 0))
|
|
111
|
1973 {
|
|
|
1974 /* Rule 19 */
|
|
|
1975 /* If stack is aligned, putting CFA reg into stack means
|
|
|
1976 we can no longer use reg + offset to represent CFA.
|
|
|
1977 Here we use DW_CFA_def_cfa_expression instead. The
|
|
|
1978 result of this expression equals to the original CFA
|
|
|
1979 value. */
|
|
|
1980 if (fde
|
|
|
1981 && fde->stack_realign
|
|
|
1982 && cur_cfa->indirect == 0
|
|
|
1983 && cur_cfa->reg != dw_frame_pointer_regnum)
|
|
|
1984 {
|
|
|
1985 gcc_assert (fde->drap_reg == cur_cfa->reg);
|
|
|
1986
|
|
|
1987 cur_cfa->indirect = 1;
|
|
|
1988 cur_cfa->reg = dw_frame_pointer_regnum;
|
|
|
1989 cur_cfa->base_offset = offset;
|
|
|
1990 cur_cfa->offset = 0;
|
|
|
1991
|
|
|
1992 fde->drap_reg_saved = 1;
|
|
|
1993 break;
|
|
|
1994 }
|
|
|
1995
|
|
|
1996 /* If the source register is exactly the CFA, assume
|
|
|
1997 we're saving SP like any other register; this happens
|
|
|
1998 on the ARM. */
|
|
|
1999 queue_reg_save (stack_pointer_rtx, NULL_RTX, offset);
|
|
|
2000 break;
|
|
|
2001 }
|
|
|
2002 else
|
|
|
2003 {
|
|
|
2004 /* Otherwise, we'll need to look in the stack to
|
|
|
2005 calculate the CFA. */
|
|
|
2006 rtx x = XEXP (dest, 0);
|
|
|
2007
|
|
|
2008 if (!REG_P (x))
|
|
|
2009 x = XEXP (x, 0);
|
|
|
2010 gcc_assert (REG_P (x));
|
|
|
2011
|
|
|
2012 cur_cfa->reg = dwf_regno (x);
|
|
|
2013 cur_cfa->base_offset = offset;
|
|
|
2014 cur_cfa->indirect = 1;
|
|
|
2015 break;
|
|
|
2016 }
|
|
|
2017 }
|
|
|
2018
|
|
|
2019 if (REG_P (src))
|
|
|
2020 span = targetm.dwarf_register_span (src);
|
|
|
2021 else
|
|
|
2022 span = NULL;
|
|
|
2023
|
|
|
2024 if (!span)
|
|
|
2025 queue_reg_save (src, NULL_RTX, offset);
|
|
|
2026 else
|
|
|
2027 {
|
|
|
2028 /* We have a PARALLEL describing where the contents of SRC live.
|
|
|
2029 Queue register saves for each piece of the PARALLEL. */
|
|
131
|
2030 poly_int64 span_offset = offset;
|
|
111
|
2031
|
|
|
2032 gcc_assert (GET_CODE (span) == PARALLEL);
|
|
|
2033
|
|
|
2034 const int par_len = XVECLEN (span, 0);
|
|
|
2035 for (int par_index = 0; par_index < par_len; par_index++)
|
|
|
2036 {
|
|
|
2037 rtx elem = XVECEXP (span, 0, par_index);
|
|
|
2038 queue_reg_save (elem, NULL_RTX, span_offset);
|
|
|
2039 span_offset += GET_MODE_SIZE (GET_MODE (elem));
|
|
|
2040 }
|
|
|
2041 }
|
|
|
2042 break;
|
|
|
2043
|
|
|
2044 default:
|
|
|
2045 gcc_unreachable ();
|
|
|
2046 }
|
|
|
2047 }
|
|
|
2048
|
|
|
2049 /* Record call frame debugging information for INSN, which either sets
|
|
|
2050 SP or FP (adjusting how we calculate the frame address) or saves a
|
|
|
2051 register to the stack. */
|
|
|
2052
|
|
|
2053 static void
|
|
|
2054 dwarf2out_frame_debug (rtx_insn *insn)
|
|
|
2055 {
|
|
|
2056 rtx note, n, pat;
|
|
|
2057 bool handled_one = false;
|
|
|
2058
|
|
|
2059 for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
|
|
|
2060 switch (REG_NOTE_KIND (note))
|
|
|
2061 {
|
|
|
2062 case REG_FRAME_RELATED_EXPR:
|
|
|
2063 pat = XEXP (note, 0);
|
|
|
2064 goto do_frame_expr;
|
|
|
2065
|
|
|
2066 case REG_CFA_DEF_CFA:
|
|
|
2067 dwarf2out_frame_debug_def_cfa (XEXP (note, 0));
|
|
|
2068 handled_one = true;
|
|
|
2069 break;
|
|
|
2070
|
|
|
2071 case REG_CFA_ADJUST_CFA:
|
|
|
2072 n = XEXP (note, 0);
|
|
|
2073 if (n == NULL)
|
|
|
2074 {
|
|
|
2075 n = PATTERN (insn);
|
|
|
2076 if (GET_CODE (n) == PARALLEL)
|
|
|
2077 n = XVECEXP (n, 0, 0);
|
|
|
2078 }
|
|
|
2079 dwarf2out_frame_debug_adjust_cfa (n);
|
|
|
2080 handled_one = true;
|
|
|
2081 break;
|
|
|
2082
|
|
|
2083 case REG_CFA_OFFSET:
|
|
|
2084 n = XEXP (note, 0);
|
|
|
2085 if (n == NULL)
|
|
|
2086 n = single_set (insn);
|
|
|
2087 dwarf2out_frame_debug_cfa_offset (n);
|
|
|
2088 handled_one = true;
|
|
|
2089 break;
|
|
|
2090
|
|
|
2091 case REG_CFA_REGISTER:
|
|
|
2092 n = XEXP (note, 0);
|
|
|
2093 if (n == NULL)
|
|
|
2094 {
|
|
|
2095 n = PATTERN (insn);
|
|
|
2096 if (GET_CODE (n) == PARALLEL)
|
|
|
2097 n = XVECEXP (n, 0, 0);
|
|
|
2098 }
|
|
|
2099 dwarf2out_frame_debug_cfa_register (n);
|
|
|
2100 handled_one = true;
|
|
|
2101 break;
|
|
|
2102
|
|
|
2103 case REG_CFA_EXPRESSION:
|
|
|
2104 case REG_CFA_VAL_EXPRESSION:
|
|
|
2105 n = XEXP (note, 0);
|
|
|
2106 if (n == NULL)
|
|
|
2107 n = single_set (insn);
|
|
|
2108
|
|
|
2109 if (REG_NOTE_KIND (note) == REG_CFA_EXPRESSION)
|
|
|
2110 dwarf2out_frame_debug_cfa_expression (n);
|
|
|
2111 else
|
|
|
2112 dwarf2out_frame_debug_cfa_val_expression (n);
|
|
|
2113
|
|
|
2114 handled_one = true;
|
|
|
2115 break;
|
|
|
2116
|
|
|
2117 case REG_CFA_RESTORE:
|
|
|
2118 n = XEXP (note, 0);
|
|
|
2119 if (n == NULL)
|
|
|
2120 {
|
|
|
2121 n = PATTERN (insn);
|
|
|
2122 if (GET_CODE (n) == PARALLEL)
|
|
|
2123 n = XVECEXP (n, 0, 0);
|
|
|
2124 n = XEXP (n, 0);
|
|
|
2125 }
|
|
|
2126 dwarf2out_frame_debug_cfa_restore (n);
|
|
|
2127 handled_one = true;
|
|
|
2128 break;
|
|
|
2129
|
|
|
2130 case REG_CFA_SET_VDRAP:
|
|
|
2131 n = XEXP (note, 0);
|
|
|
2132 if (REG_P (n))
|
|
|
2133 {
|
|
|
2134 dw_fde_ref fde = cfun->fde;
|
|
|
2135 if (fde)
|
|
|
2136 {
|
|
|
2137 gcc_assert (fde->vdrap_reg == INVALID_REGNUM);
|
|
|
2138 if (REG_P (n))
|
|
|
2139 fde->vdrap_reg = dwf_regno (n);
|
|
|
2140 }
|
|
|
2141 }
|
|
|
2142 handled_one = true;
|
|
|
2143 break;
|
|
|
2144
|
|
|
2145 case REG_CFA_TOGGLE_RA_MANGLE:
|
|
145
|
2146 /* This uses the same DWARF opcode as the next operation. */
|
|
|
2147 dwarf2out_frame_debug_cfa_window_save (true);
|
|
|
2148 handled_one = true;
|
|
|
2149 break;
|
|
|
2150
|
|
111
|
2151 case REG_CFA_WINDOW_SAVE:
|
|
145
|
2152 dwarf2out_frame_debug_cfa_window_save (false);
|
|
111
|
2153 handled_one = true;
|
|
|
2154 break;
|
|
|
2155
|
|
|
2156 case REG_CFA_FLUSH_QUEUE:
|
|
|
2157 /* The actual flush happens elsewhere. */
|
|
|
2158 handled_one = true;
|
|
|
2159 break;
|
|
|
2160
|
|
|
2161 default:
|
|
|
2162 break;
|
|
|
2163 }
|
|
|
2164
|
|
|
2165 if (!handled_one)
|
|
|
2166 {
|
|
|
2167 pat = PATTERN (insn);
|
|
|
2168 do_frame_expr:
|
|
|
2169 dwarf2out_frame_debug_expr (pat);
|
|
|
2170
|
|
|
2171 /* Check again. A parallel can save and update the same register.
|
|
|
2172 We could probably check just once, here, but this is safer than
|
|
|
2173 removing the check at the start of the function. */
|
|
|
2174 if (clobbers_queued_reg_save (pat))
|
|
|
2175 dwarf2out_flush_queued_reg_saves ();
|
|
|
2176 }
|
|
|
2177 }
|
|
|
2178
|
|
|
2179 /* Emit CFI info to change the state from OLD_ROW to NEW_ROW. */
|
|
|
2180
|
|
|
2181 static void
|
|
|
2182 change_cfi_row (dw_cfi_row *old_row, dw_cfi_row *new_row)
|
|
|
2183 {
|
|
|
2184 size_t i, n_old, n_new, n_max;
|
|
|
2185 dw_cfi_ref cfi;
|
|
|
2186
|
|
|
2187 if (new_row->cfa_cfi && !cfi_equal_p (old_row->cfa_cfi, new_row->cfa_cfi))
|
|
|
2188 add_cfi (new_row->cfa_cfi);
|
|
|
2189 else
|
|
|
2190 {
|
|
|
2191 cfi = def_cfa_0 (&old_row->cfa, &new_row->cfa);
|
|
|
2192 if (cfi)
|
|
|
2193 add_cfi (cfi);
|
|
|
2194 }
|
|
|
2195
|
|
|
2196 n_old = vec_safe_length (old_row->reg_save);
|
|
|
2197 n_new = vec_safe_length (new_row->reg_save);
|
|
|
2198 n_max = MAX (n_old, n_new);
|
|
|
2199
|
|
|
2200 for (i = 0; i < n_max; ++i)
|
|
|
2201 {
|
|
|
2202 dw_cfi_ref r_old = NULL, r_new = NULL;
|
|
|
2203
|
|
|
2204 if (i < n_old)
|
|
|
2205 r_old = (*old_row->reg_save)[i];
|
|
|
2206 if (i < n_new)
|
|
|
2207 r_new = (*new_row->reg_save)[i];
|
|
|
2208
|
|
|
2209 if (r_old == r_new)
|
|
|
2210 ;
|
|
|
2211 else if (r_new == NULL)
|
|
|
2212 add_cfi_restore (i);
|
|
|
2213 else if (!cfi_equal_p (r_old, r_new))
|
|
|
2214 add_cfi (r_new);
|
|
|
2215 }
|
|
145
|
2216
|
|
|
2217 if (!old_row->window_save && new_row->window_save)
|
|
|
2218 {
|
|
|
2219 dw_cfi_ref cfi = new_cfi ();
|
|
|
2220
|
|
|
2221 cfi->dw_cfi_opc = DW_CFA_GNU_window_save;
|
|
|
2222 add_cfi (cfi);
|
|
|
2223 }
|
|
111
|
2224 }
|
|
|
2225
|
|
|
2226 /* Examine CFI and return true if a cfi label and set_loc is needed
|
|
|
2227 beforehand. Even when generating CFI assembler instructions, we
|
|
|
2228 still have to add the cfi to the list so that lookup_cfa_1 works
|
|
|
2229 later on. When -g2 and above we even need to force emitting of
|
|
|
2230 CFI labels and add to list a DW_CFA_set_loc for convert_cfa_to_fb_loc_list
|
|
|
2231 purposes. If we're generating DWARF3 output we use DW_OP_call_frame_cfa
|
|
|
2232 and so don't use convert_cfa_to_fb_loc_list. */
|
|
|
2233
|
|
|
2234 static bool
|
|
|
2235 cfi_label_required_p (dw_cfi_ref cfi)
|
|
|
2236 {
|
|
|
2237 if (!dwarf2out_do_cfi_asm ())
|
|
|
2238 return true;
|
|
|
2239
|
|
|
2240 if (dwarf_version == 2
|
|
|
2241 && debug_info_level > DINFO_LEVEL_TERSE
|
|
|
2242 && (write_symbols == DWARF2_DEBUG
|
|
|
2243 || write_symbols == VMS_AND_DWARF2_DEBUG))
|
|
|
2244 {
|
|
|
2245 switch (cfi->dw_cfi_opc)
|
|
|
2246 {
|
|
|
2247 case DW_CFA_def_cfa_offset:
|
|
|
2248 case DW_CFA_def_cfa_offset_sf:
|
|
|
2249 case DW_CFA_def_cfa_register:
|
|
|
2250 case DW_CFA_def_cfa:
|
|
|
2251 case DW_CFA_def_cfa_sf:
|
|
|
2252 case DW_CFA_def_cfa_expression:
|
|
|
2253 case DW_CFA_restore_state:
|
|
|
2254 return true;
|
|
|
2255 default:
|
|
|
2256 return false;
|
|
|
2257 }
|
|
|
2258 }
|
|
|
2259 return false;
|
|
|
2260 }
|
|
|
2261
|
|
|
2262 /* Walk the function, looking for NOTE_INSN_CFI notes. Add the CFIs to the
|
|
|
2263 function's FDE, adding CFI labels and set_loc/advance_loc opcodes as
|
|
|
2264 necessary. */
|
|
|
2265 static void
|
|
|
2266 add_cfis_to_fde (void)
|
|
|
2267 {
|
|
|
2268 dw_fde_ref fde = cfun->fde;
|
|
|
2269 rtx_insn *insn, *next;
|
|
|
2270
|
|
|
2271 for (insn = get_insns (); insn; insn = next)
|
|
|
2272 {
|
|
|
2273 next = NEXT_INSN (insn);
|
|
|
2274
|
|
|
2275 if (NOTE_P (insn) && NOTE_KIND (insn) == NOTE_INSN_SWITCH_TEXT_SECTIONS)
|
|
|
2276 fde->dw_fde_switch_cfi_index = vec_safe_length (fde->dw_fde_cfi);
|
|
|
2277
|
|
|
2278 if (NOTE_P (insn) && NOTE_KIND (insn) == NOTE_INSN_CFI)
|
|
|
2279 {
|
|
|
2280 bool required = cfi_label_required_p (NOTE_CFI (insn));
|
|
|
2281 while (next)
|
|
|
2282 if (NOTE_P (next) && NOTE_KIND (next) == NOTE_INSN_CFI)
|
|
|
2283 {
|
|
|
2284 required |= cfi_label_required_p (NOTE_CFI (next));
|
|
|
2285 next = NEXT_INSN (next);
|
|
|
2286 }
|
|
|
2287 else if (active_insn_p (next)
|
|
|
2288 || (NOTE_P (next) && (NOTE_KIND (next)
|
|
|
2289 == NOTE_INSN_SWITCH_TEXT_SECTIONS)))
|
|
|
2290 break;
|
|
|
2291 else
|
|
|
2292 next = NEXT_INSN (next);
|
|
|
2293 if (required)
|
|
|
2294 {
|
|
|
2295 int num = dwarf2out_cfi_label_num;
|
|
|
2296 const char *label = dwarf2out_cfi_label ();
|
|
|
2297 dw_cfi_ref xcfi;
|
|
|
2298
|
|
|
2299 /* Set the location counter to the new label. */
|
|
|
2300 xcfi = new_cfi ();
|
|
|
2301 xcfi->dw_cfi_opc = DW_CFA_advance_loc4;
|
|
|
2302 xcfi->dw_cfi_oprnd1.dw_cfi_addr = label;
|
|
|
2303 vec_safe_push (fde->dw_fde_cfi, xcfi);
|
|
|
2304
|
|
|
2305 rtx_note *tmp = emit_note_before (NOTE_INSN_CFI_LABEL, insn);
|
|
|
2306 NOTE_LABEL_NUMBER (tmp) = num;
|
|
|
2307 }
|
|
|
2308
|
|
|
2309 do
|
|
|
2310 {
|
|
|
2311 if (NOTE_P (insn) && NOTE_KIND (insn) == NOTE_INSN_CFI)
|
|
|
2312 vec_safe_push (fde->dw_fde_cfi, NOTE_CFI (insn));
|
|
|
2313 insn = NEXT_INSN (insn);
|
|
|
2314 }
|
|
|
2315 while (insn != next);
|
|
|
2316 }
|
|
|
2317 }
|
|
|
2318 }
|
|
|
2319
|
|
|
2320 static void dump_cfi_row (FILE *f, dw_cfi_row *row);
|
|
|
2321
|
|
|
2322 /* If LABEL is the start of a trace, then initialize the state of that
|
|
|
2323 trace from CUR_TRACE and CUR_ROW. */
|
|
|
2324
|
|
|
2325 static void
|
|
|
2326 maybe_record_trace_start (rtx_insn *start, rtx_insn *origin)
|
|
|
2327 {
|
|
|
2328 dw_trace_info *ti;
|
|
|
2329
|
|
|
2330 ti = get_trace_info (start);
|
|
|
2331 gcc_assert (ti != NULL);
|
|
|
2332
|
|
|
2333 if (dump_file)
|
|
|
2334 {
|
|
|
2335 fprintf (dump_file, " saw edge from trace %u to %u (via %s %d)\n",
|
|
|
2336 cur_trace->id, ti->id,
|
|
|
2337 (origin ? rtx_name[(int) GET_CODE (origin)] : "fallthru"),
|
|
|
2338 (origin ? INSN_UID (origin) : 0));
|
|
|
2339 }
|
|
|
2340
|
|
131
|
2341 poly_int64 args_size = cur_trace->end_true_args_size;
|
|
111
|
2342 if (ti->beg_row == NULL)
|
|
|
2343 {
|
|
|
2344 /* This is the first time we've encountered this trace. Propagate
|
|
|
2345 state across the edge and push the trace onto the work list. */
|
|
|
2346 ti->beg_row = copy_cfi_row (cur_row);
|
|
|
2347 ti->beg_true_args_size = args_size;
|
|
|
2348
|
|
|
2349 ti->cfa_store = cur_trace->cfa_store;
|
|
|
2350 ti->cfa_temp = cur_trace->cfa_temp;
|
|
|
2351 ti->regs_saved_in_regs = cur_trace->regs_saved_in_regs.copy ();
|
|
|
2352
|
|
|
2353 trace_work_list.safe_push (ti);
|
|
|
2354
|
|
|
2355 if (dump_file)
|
|
|
2356 fprintf (dump_file, "\tpush trace %u to worklist\n", ti->id);
|
|
|
2357 }
|
|
|
2358 else
|
|
|
2359 {
|
|
|
2360
|
|
|
2361 /* We ought to have the same state incoming to a given trace no
|
|
|
2362 matter how we arrive at the trace. Anything else means we've
|
|
|
2363 got some kind of optimization error. */
|
|
|
2364 #if CHECKING_P
|
|
|
2365 if (!cfi_row_equal_p (cur_row, ti->beg_row))
|
|
|
2366 {
|
|
|
2367 if (dump_file)
|
|
|
2368 {
|
|
|
2369 fprintf (dump_file, "Inconsistent CFI state!\n");
|
|
|
2370 fprintf (dump_file, "SHOULD have:\n");
|
|
|
2371 dump_cfi_row (dump_file, ti->beg_row);
|
|
|
2372 fprintf (dump_file, "DO have:\n");
|
|
|
2373 dump_cfi_row (dump_file, cur_row);
|
|
|
2374 }
|
|
|
2375
|
|
|
2376 gcc_unreachable ();
|
|
|
2377 }
|
|
|
2378 #endif
|
|
|
2379
|
|
|
2380 /* The args_size is allowed to conflict if it isn't actually used. */
|
|
131
|
2381 if (maybe_ne (ti->beg_true_args_size, args_size))
|
|
111
|
2382 ti->args_size_undefined = true;
|
|
|
2383 }
|
|
|
2384 }
|
|
|
2385
|
|
|
2386 /* Similarly, but handle the args_size and CFA reset across EH
|
|
|
2387 and non-local goto edges. */
|
|
|
2388
|
|
|
2389 static void
|
|
|
2390 maybe_record_trace_start_abnormal (rtx_insn *start, rtx_insn *origin)
|
|
|
2391 {
|
|
131
|
2392 poly_int64 save_args_size, delta;
|
|
111
|
2393 dw_cfa_location save_cfa;
|
|
|
2394
|
|
|
2395 save_args_size = cur_trace->end_true_args_size;
|
|
131
|
2396 if (known_eq (save_args_size, 0))
|
|
111
|
2397 {
|
|
|
2398 maybe_record_trace_start (start, origin);
|
|
|
2399 return;
|
|
|
2400 }
|
|
|
2401
|
|
|
2402 delta = -save_args_size;
|
|
|
2403 cur_trace->end_true_args_size = 0;
|
|
|
2404
|
|
|
2405 save_cfa = cur_row->cfa;
|
|
|
2406 if (cur_row->cfa.reg == dw_stack_pointer_regnum)
|
|
|
2407 {
|
|
|
2408 /* Convert a change in args_size (always a positive in the
|
|
|
2409 direction of stack growth) to a change in stack pointer. */
|
|
|
2410 if (!STACK_GROWS_DOWNWARD)
|
|
|
2411 delta = -delta;
|
|
|
2412
|
|
|
2413 cur_row->cfa.offset += delta;
|
|
|
2414 }
|
|
|
2415
|
|
|
2416 maybe_record_trace_start (start, origin);
|
|
|
2417
|
|
|
2418 cur_trace->end_true_args_size = save_args_size;
|
|
|
2419 cur_row->cfa = save_cfa;
|
|
|
2420 }
|
|
|
2421
|
|
|
2422 /* Propagate CUR_TRACE state to the destinations implied by INSN. */
|
|
|
2423 /* ??? Sadly, this is in large part a duplicate of make_edges. */
|
|
|
2424
|
|
|
2425 static void
|
|
|
2426 create_trace_edges (rtx_insn *insn)
|
|
|
2427 {
|
|
|
2428 rtx tmp;
|
|
|
2429 int i, n;
|
|
|
2430
|
|
|
2431 if (JUMP_P (insn))
|
|
|
2432 {
|
|
|
2433 rtx_jump_table_data *table;
|
|
|
2434
|
|
|
2435 if (find_reg_note (insn, REG_NON_LOCAL_GOTO, NULL_RTX))
|
|
|
2436 return;
|
|
|
2437
|
|
|
2438 if (tablejump_p (insn, NULL, &table))
|
|
|
2439 {
|
|
|
2440 rtvec vec = table->get_labels ();
|
|
|
2441
|
|
|
2442 n = GET_NUM_ELEM (vec);
|
|
|
2443 for (i = 0; i < n; ++i)
|
|
|
2444 {
|
|
|
2445 rtx_insn *lab = as_a <rtx_insn *> (XEXP (RTVEC_ELT (vec, i), 0));
|
|
|
2446 maybe_record_trace_start (lab, insn);
|
|
|
2447 }
|
|
145
|
2448
|
|
|
2449 /* Handle casesi dispatch insns. */
|
|
|
2450 if ((tmp = tablejump_casesi_pattern (insn)) != NULL_RTX)
|
|
|
2451 {
|
|
|
2452 rtx_insn * lab = label_ref_label (XEXP (SET_SRC (tmp), 2));
|
|
|
2453 maybe_record_trace_start (lab, insn);
|
|
|
2454 }
|
|
111
|
2455 }
|
|
|
2456 else if (computed_jump_p (insn))
|
|
|
2457 {
|
|
|
2458 rtx_insn *temp;
|
|
|
2459 unsigned int i;
|
|
|
2460 FOR_EACH_VEC_SAFE_ELT (forced_labels, i, temp)
|
|
|
2461 maybe_record_trace_start (temp, insn);
|
|
|
2462 }
|
|
|
2463 else if (returnjump_p (insn))
|
|
|
2464 ;
|
|
|
2465 else if ((tmp = extract_asm_operands (PATTERN (insn))) != NULL)
|
|
|
2466 {
|
|
|
2467 n = ASM_OPERANDS_LABEL_LENGTH (tmp);
|
|
|
2468 for (i = 0; i < n; ++i)
|
|
|
2469 {
|
|
|
2470 rtx_insn *lab =
|
|
|
2471 as_a <rtx_insn *> (XEXP (ASM_OPERANDS_LABEL (tmp, i), 0));
|
|
|
2472 maybe_record_trace_start (lab, insn);
|
|
|
2473 }
|
|
|
2474 }
|
|
|
2475 else
|
|
|
2476 {
|
|
|
2477 rtx_insn *lab = JUMP_LABEL_AS_INSN (insn);
|
|
|
2478 gcc_assert (lab != NULL);
|
|
|
2479 maybe_record_trace_start (lab, insn);
|
|
|
2480 }
|
|
|
2481 }
|
|
|
2482 else if (CALL_P (insn))
|
|
|
2483 {
|
|
|
2484 /* Sibling calls don't have edges inside this function. */
|
|
|
2485 if (SIBLING_CALL_P (insn))
|
|
|
2486 return;
|
|
|
2487
|
|
|
2488 /* Process non-local goto edges. */
|
|
|
2489 if (can_nonlocal_goto (insn))
|
|
|
2490 for (rtx_insn_list *lab = nonlocal_goto_handler_labels;
|
|
|
2491 lab;
|
|
|
2492 lab = lab->next ())
|
|
|
2493 maybe_record_trace_start_abnormal (lab->insn (), insn);
|
|
|
2494 }
|
|
|
2495 else if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (PATTERN (insn)))
|
|
|
2496 {
|
|
|
2497 int i, n = seq->len ();
|
|
|
2498 for (i = 0; i < n; ++i)
|
|
|
2499 create_trace_edges (seq->insn (i));
|
|
|
2500 return;
|
|
|
2501 }
|
|
|
2502
|
|
|
2503 /* Process EH edges. */
|
|
|
2504 if (CALL_P (insn) || cfun->can_throw_non_call_exceptions)
|
|
|
2505 {
|
|
|
2506 eh_landing_pad lp = get_eh_landing_pad_from_rtx (insn);
|
|
|
2507 if (lp)
|
|
|
2508 maybe_record_trace_start_abnormal (lp->landing_pad, insn);
|
|
|
2509 }
|
|
|
2510 }
|
|
|
2511
|
|
|
2512 /* A subroutine of scan_trace. Do what needs to be done "after" INSN. */
|
|
|
2513
|
|
|
2514 static void
|
|
|
2515 scan_insn_after (rtx_insn *insn)
|
|
|
2516 {
|
|
|
2517 if (RTX_FRAME_RELATED_P (insn))
|
|
|
2518 dwarf2out_frame_debug (insn);
|
|
|
2519 notice_args_size (insn);
|
|
|
2520 }
|
|
|
2521
|
|
|
2522 /* Scan the trace beginning at INSN and create the CFI notes for the
|
|
|
2523 instructions therein. */
|
|
|
2524
|
|
|
2525 static void
|
|
131
|
2526 scan_trace (dw_trace_info *trace, bool entry)
|
|
111
|
2527 {
|
|
|
2528 rtx_insn *prev, *insn = trace->head;
|
|
|
2529 dw_cfa_location this_cfa;
|
|
|
2530
|
|
|
2531 if (dump_file)
|
|
|
2532 fprintf (dump_file, "Processing trace %u : start at %s %d\n",
|
|
|
2533 trace->id, rtx_name[(int) GET_CODE (insn)],
|
|
|
2534 INSN_UID (insn));
|
|
|
2535
|
|
|
2536 trace->end_row = copy_cfi_row (trace->beg_row);
|
|
|
2537 trace->end_true_args_size = trace->beg_true_args_size;
|
|
|
2538
|
|
|
2539 cur_trace = trace;
|
|
|
2540 cur_row = trace->end_row;
|
|
|
2541
|
|
|
2542 this_cfa = cur_row->cfa;
|
|
|
2543 cur_cfa = &this_cfa;
|
|
|
2544
|
|
131
|
2545 /* If the current function starts with a non-standard incoming frame
|
|
|
2546 sp offset, emit a note before the first instruction. */
|
|
|
2547 if (entry
|
|
|
2548 && DEFAULT_INCOMING_FRAME_SP_OFFSET != INCOMING_FRAME_SP_OFFSET)
|
|
|
2549 {
|
|
|
2550 add_cfi_insn = insn;
|
|
|
2551 gcc_assert (NOTE_P (insn) && NOTE_KIND (insn) == NOTE_INSN_DELETED);
|
|
|
2552 this_cfa.offset = INCOMING_FRAME_SP_OFFSET;
|
|
|
2553 def_cfa_1 (&this_cfa);
|
|
|
2554 }
|
|
|
2555
|
|
111
|
2556 for (prev = insn, insn = NEXT_INSN (insn);
|
|
|
2557 insn;
|
|
|
2558 prev = insn, insn = NEXT_INSN (insn))
|
|
|
2559 {
|
|
|
2560 rtx_insn *control;
|
|
|
2561
|
|
|
2562 /* Do everything that happens "before" the insn. */
|
|
|
2563 add_cfi_insn = prev;
|
|
|
2564
|
|
|
2565 /* Notice the end of a trace. */
|
|
|
2566 if (BARRIER_P (insn))
|
|
|
2567 {
|
|
|
2568 /* Don't bother saving the unneeded queued registers at all. */
|
|
|
2569 queued_reg_saves.truncate (0);
|
|
|
2570 break;
|
|
|
2571 }
|
|
|
2572 if (save_point_p (insn))
|
|
|
2573 {
|
|
|
2574 /* Propagate across fallthru edges. */
|
|
|
2575 dwarf2out_flush_queued_reg_saves ();
|
|
|
2576 maybe_record_trace_start (insn, NULL);
|
|
|
2577 break;
|
|
|
2578 }
|
|
|
2579
|
|
|
2580 if (DEBUG_INSN_P (insn) || !inside_basic_block_p (insn))
|
|
|
2581 continue;
|
|
|
2582
|
|
|
2583 /* Handle all changes to the row state. Sequences require special
|
|
|
2584 handling for the positioning of the notes. */
|
|
|
2585 if (rtx_sequence *pat = dyn_cast <rtx_sequence *> (PATTERN (insn)))
|
|
|
2586 {
|
|
|
2587 rtx_insn *elt;
|
|
|
2588 int i, n = pat->len ();
|
|
|
2589
|
|
|
2590 control = pat->insn (0);
|
|
|
2591 if (can_throw_internal (control))
|
|
|
2592 notice_eh_throw (control);
|
|
|
2593 dwarf2out_flush_queued_reg_saves ();
|
|
|
2594
|
|
|
2595 if (JUMP_P (control) && INSN_ANNULLED_BRANCH_P (control))
|
|
|
2596 {
|
|
|
2597 /* ??? Hopefully multiple delay slots are not annulled. */
|
|
|
2598 gcc_assert (n == 2);
|
|
|
2599 gcc_assert (!RTX_FRAME_RELATED_P (control));
|
|
|
2600 gcc_assert (!find_reg_note (control, REG_ARGS_SIZE, NULL));
|
|
|
2601
|
|
|
2602 elt = pat->insn (1);
|
|
|
2603
|
|
|
2604 if (INSN_FROM_TARGET_P (elt))
|
|
|
2605 {
|
|
|
2606 cfi_vec save_row_reg_save;
|
|
|
2607
|
|
|
2608 /* If ELT is an instruction from target of an annulled
|
|
|
2609 branch, the effects are for the target only and so
|
|
|
2610 the args_size and CFA along the current path
|
|
|
2611 shouldn't change. */
|
|
|
2612 add_cfi_insn = NULL;
|
|
131
|
2613 poly_int64 restore_args_size = cur_trace->end_true_args_size;
|
|
111
|
2614 cur_cfa = &cur_row->cfa;
|
|
|
2615 save_row_reg_save = vec_safe_copy (cur_row->reg_save);
|
|
|
2616
|
|
|
2617 scan_insn_after (elt);
|
|
|
2618
|
|
|
2619 /* ??? Should we instead save the entire row state? */
|
|
|
2620 gcc_assert (!queued_reg_saves.length ());
|
|
|
2621
|
|
|
2622 create_trace_edges (control);
|
|
|
2623
|
|
|
2624 cur_trace->end_true_args_size = restore_args_size;
|
|
|
2625 cur_row->cfa = this_cfa;
|
|
|
2626 cur_row->reg_save = save_row_reg_save;
|
|
|
2627 cur_cfa = &this_cfa;
|
|
|
2628 }
|
|
|
2629 else
|
|
|
2630 {
|
|
|
2631 /* If ELT is a annulled branch-taken instruction (i.e.
|
|
|
2632 executed only when branch is not taken), the args_size
|
|
|
2633 and CFA should not change through the jump. */
|
|
|
2634 create_trace_edges (control);
|
|
|
2635
|
|
|
2636 /* Update and continue with the trace. */
|
|
|
2637 add_cfi_insn = insn;
|
|
|
2638 scan_insn_after (elt);
|
|
|
2639 def_cfa_1 (&this_cfa);
|
|
|
2640 }
|
|
|
2641 continue;
|
|
|
2642 }
|
|
|
2643
|
|
|
2644 /* The insns in the delay slot should all be considered to happen
|
|
|
2645 "before" a call insn. Consider a call with a stack pointer
|
|
|
2646 adjustment in the delay slot. The backtrace from the callee
|
|
|
2647 should include the sp adjustment. Unfortunately, that leaves
|
|
|
2648 us with an unavoidable unwinding error exactly at the call insn
|
|
|
2649 itself. For jump insns we'd prefer to avoid this error by
|
|
|
2650 placing the notes after the sequence. */
|
|
|
2651 if (JUMP_P (control))
|
|
|
2652 add_cfi_insn = insn;
|
|
|
2653
|
|
|
2654 for (i = 1; i < n; ++i)
|
|
|
2655 {
|
|
|
2656 elt = pat->insn (i);
|
|
|
2657 scan_insn_after (elt);
|
|
|
2658 }
|
|
|
2659
|
|
|
2660 /* Make sure any register saves are visible at the jump target. */
|
|
|
2661 dwarf2out_flush_queued_reg_saves ();
|
|
|
2662 any_cfis_emitted = false;
|
|
|
2663
|
|
|
2664 /* However, if there is some adjustment on the call itself, e.g.
|
|
|
2665 a call_pop, that action should be considered to happen after
|
|
|
2666 the call returns. */
|
|
|
2667 add_cfi_insn = insn;
|
|
|
2668 scan_insn_after (control);
|
|
|
2669 }
|
|
|
2670 else
|
|
|
2671 {
|
|
|
2672 /* Flush data before calls and jumps, and of course if necessary. */
|
|
|
2673 if (can_throw_internal (insn))
|
|
|
2674 {
|
|
|
2675 notice_eh_throw (insn);
|
|
|
2676 dwarf2out_flush_queued_reg_saves ();
|
|
|
2677 }
|
|
|
2678 else if (!NONJUMP_INSN_P (insn)
|
|
|
2679 || clobbers_queued_reg_save (insn)
|
|
|
2680 || find_reg_note (insn, REG_CFA_FLUSH_QUEUE, NULL))
|
|
|
2681 dwarf2out_flush_queued_reg_saves ();
|
|
|
2682 any_cfis_emitted = false;
|
|
|
2683
|
|
|
2684 add_cfi_insn = insn;
|
|
|
2685 scan_insn_after (insn);
|
|
|
2686 control = insn;
|
|
|
2687 }
|
|
|
2688
|
|
|
2689 /* Between frame-related-p and args_size we might have otherwise
|
|
|
2690 emitted two cfa adjustments. Do it now. */
|
|
|
2691 def_cfa_1 (&this_cfa);
|
|
|
2692
|
|
|
2693 /* Minimize the number of advances by emitting the entire queue
|
|
|
2694 once anything is emitted. */
|
|
|
2695 if (any_cfis_emitted
|
|
|
2696 || find_reg_note (insn, REG_CFA_FLUSH_QUEUE, NULL))
|
|
|
2697 dwarf2out_flush_queued_reg_saves ();
|
|
|
2698
|
|
|
2699 /* Note that a test for control_flow_insn_p does exactly the
|
|
|
2700 same tests as are done to actually create the edges. So
|
|
|
2701 always call the routine and let it not create edges for
|
|
|
2702 non-control-flow insns. */
|
|
|
2703 create_trace_edges (control);
|
|
|
2704 }
|
|
|
2705
|
|
|
2706 add_cfi_insn = NULL;
|
|
|
2707 cur_row = NULL;
|
|
|
2708 cur_trace = NULL;
|
|
|
2709 cur_cfa = NULL;
|
|
|
2710 }
|
|
|
2711
|
|
|
2712 /* Scan the function and create the initial set of CFI notes. */
|
|
|
2713
|
|
|
2714 static void
|
|
|
2715 create_cfi_notes (void)
|
|
|
2716 {
|
|
|
2717 dw_trace_info *ti;
|
|
|
2718
|
|
|
2719 gcc_checking_assert (!queued_reg_saves.exists ());
|
|
|
2720 gcc_checking_assert (!trace_work_list.exists ());
|
|
|
2721
|
|
|
2722 /* Always begin at the entry trace. */
|
|
|
2723 ti = &trace_info[0];
|
|
131
|
2724 scan_trace (ti, true);
|
|
111
|
2725
|
|
|
2726 while (!trace_work_list.is_empty ())
|
|
|
2727 {
|
|
|
2728 ti = trace_work_list.pop ();
|
|
131
|
2729 scan_trace (ti, false);
|
|
111
|
2730 }
|
|
|
2731
|
|
|
2732 queued_reg_saves.release ();
|
|
|
2733 trace_work_list.release ();
|
|
|
2734 }
|
|
|
2735
|
|
|
2736 /* Return the insn before the first NOTE_INSN_CFI after START. */
|
|
|
2737
|
|
|
2738 static rtx_insn *
|
|
|
2739 before_next_cfi_note (rtx_insn *start)
|
|
|
2740 {
|
|
|
2741 rtx_insn *prev = start;
|
|
|
2742 while (start)
|
|
|
2743 {
|
|
|
2744 if (NOTE_P (start) && NOTE_KIND (start) == NOTE_INSN_CFI)
|
|
|
2745 return prev;
|
|
|
2746 prev = start;
|
|
|
2747 start = NEXT_INSN (start);
|
|
|
2748 }
|
|
|
2749 gcc_unreachable ();
|
|
|
2750 }
|
|
|
2751
|
|
|
2752 /* Insert CFI notes between traces to properly change state between them. */
|
|
|
2753
|
|
|
2754 static void
|
|
|
2755 connect_traces (void)
|
|
|
2756 {
|
|
131
|
2757 unsigned i, n;
|
|
111
|
2758 dw_trace_info *prev_ti, *ti;
|
|
|
2759
|
|
|
2760 /* ??? Ideally, we should have both queued and processed every trace.
|
|
|
2761 However the current representation of constant pools on various targets
|
|
|
2762 is indistinguishable from unreachable code. Assume for the moment that
|
|
|
2763 we can simply skip over such traces. */
|
|
|
2764 /* ??? Consider creating a DATA_INSN rtx code to indicate that
|
|
|
2765 these are not "real" instructions, and should not be considered.
|
|
|
2766 This could be generically useful for tablejump data as well. */
|
|
|
2767 /* Remove all unprocessed traces from the list. */
|
|
131
|
2768 unsigned ix, ix2;
|
|
|
2769 VEC_ORDERED_REMOVE_IF_FROM_TO (trace_info, ix, ix2, ti, 1,
|
|
|
2770 trace_info.length (), ti->beg_row == NULL);
|
|
|
2771 FOR_EACH_VEC_ELT (trace_info, ix, ti)
|
|
|
2772 gcc_assert (ti->end_row != NULL);
|
|
111
|
2773
|
|
|
2774 /* Work from the end back to the beginning. This lets us easily insert
|
|
|
2775 remember/restore_state notes in the correct order wrt other notes. */
|
|
131
|
2776 n = trace_info.length ();
|
|
111
|
2777 prev_ti = &trace_info[n - 1];
|
|
|
2778 for (i = n - 1; i > 0; --i)
|
|
|
2779 {
|
|
|
2780 dw_cfi_row *old_row;
|
|
|
2781
|
|
|
2782 ti = prev_ti;
|
|
|
2783 prev_ti = &trace_info[i - 1];
|
|
|
2784
|
|
|
2785 add_cfi_insn = ti->head;
|
|
|
2786
|
|
|
2787 /* In dwarf2out_switch_text_section, we'll begin a new FDE
|
|
|
2788 for the portion of the function in the alternate text
|
|
|
2789 section. The row state at the very beginning of that
|
|
|
2790 new FDE will be exactly the row state from the CIE. */
|
|
|
2791 if (ti->switch_sections)
|
|
|
2792 old_row = cie_cfi_row;
|
|
|
2793 else
|
|
|
2794 {
|
|
|
2795 old_row = prev_ti->end_row;
|
|
|
2796 /* If there's no change from the previous end state, fine. */
|
|
|
2797 if (cfi_row_equal_p (old_row, ti->beg_row))
|
|
|
2798 ;
|
|
|
2799 /* Otherwise check for the common case of sharing state with
|
|
|
2800 the beginning of an epilogue, but not the end. Insert
|
|
|
2801 remember/restore opcodes in that case. */
|
|
|
2802 else if (cfi_row_equal_p (prev_ti->beg_row, ti->beg_row))
|
|
|
2803 {
|
|
|
2804 dw_cfi_ref cfi;
|
|
|
2805
|
|
|
2806 /* Note that if we blindly insert the remember at the
|
|
|
2807 start of the trace, we can wind up increasing the
|
|
|
2808 size of the unwind info due to extra advance opcodes.
|
|
|
2809 Instead, put the remember immediately before the next
|
|
|
2810 state change. We know there must be one, because the
|
|
|
2811 state at the beginning and head of the trace differ. */
|
|
|
2812 add_cfi_insn = before_next_cfi_note (prev_ti->head);
|
|
|
2813 cfi = new_cfi ();
|
|
|
2814 cfi->dw_cfi_opc = DW_CFA_remember_state;
|
|
|
2815 add_cfi (cfi);
|
|
|
2816
|
|
|
2817 add_cfi_insn = ti->head;
|
|
|
2818 cfi = new_cfi ();
|
|
|
2819 cfi->dw_cfi_opc = DW_CFA_restore_state;
|
|
|
2820 add_cfi (cfi);
|
|
|
2821
|
|
|
2822 old_row = prev_ti->beg_row;
|
|
|
2823 }
|
|
|
2824 /* Otherwise, we'll simply change state from the previous end. */
|
|
|
2825 }
|
|
|
2826
|
|
|
2827 change_cfi_row (old_row, ti->beg_row);
|
|
|
2828
|
|
|
2829 if (dump_file && add_cfi_insn != ti->head)
|
|
|
2830 {
|
|
|
2831 rtx_insn *note;
|
|
|
2832
|
|
|
2833 fprintf (dump_file, "Fixup between trace %u and %u:\n",
|
|
|
2834 prev_ti->id, ti->id);
|
|
|
2835
|
|
|
2836 note = ti->head;
|
|
|
2837 do
|
|
|
2838 {
|
|
|
2839 note = NEXT_INSN (note);
|
|
|
2840 gcc_assert (NOTE_P (note) && NOTE_KIND (note) == NOTE_INSN_CFI);
|
|
|
2841 output_cfi_directive (dump_file, NOTE_CFI (note));
|
|
|
2842 }
|
|
|
2843 while (note != add_cfi_insn);
|
|
|
2844 }
|
|
|
2845 }
|
|
|
2846
|
|
|
2847 /* Connect args_size between traces that have can_throw_internal insns. */
|
|
|
2848 if (cfun->eh->lp_array)
|
|
|
2849 {
|
|
131
|
2850 poly_int64 prev_args_size = 0;
|
|
111
|
2851
|
|
|
2852 for (i = 0; i < n; ++i)
|
|
|
2853 {
|
|
|
2854 ti = &trace_info[i];
|
|
|
2855
|
|
|
2856 if (ti->switch_sections)
|
|
|
2857 prev_args_size = 0;
|
|
131
|
2858
|
|
111
|
2859 if (ti->eh_head == NULL)
|
|
|
2860 continue;
|
|
131
|
2861
|
|
|
2862 /* We require either the incoming args_size values to match or the
|
|
|
2863 presence of an insn setting it before the first EH insn. */
|
|
|
2864 gcc_assert (!ti->args_size_undefined || ti->args_size_defined_for_eh);
|
|
|
2865
|
|
|
2866 /* In the latter case, we force the creation of a CFI note. */
|
|
|
2867 if (ti->args_size_undefined
|
|
|
2868 || maybe_ne (ti->beg_delay_args_size, prev_args_size))
|
|
111
|
2869 {
|
|
|
2870 /* ??? Search back to previous CFI note. */
|
|
|
2871 add_cfi_insn = PREV_INSN (ti->eh_head);
|
|
|
2872 add_cfi_args_size (ti->beg_delay_args_size);
|
|
|
2873 }
|
|
|
2874
|
|
|
2875 prev_args_size = ti->end_delay_args_size;
|
|
|
2876 }
|
|
|
2877 }
|
|
|
2878 }
|
|
|
2879
|
|
|
2880 /* Set up the pseudo-cfg of instruction traces, as described at the
|
|
|
2881 block comment at the top of the file. */
|
|
|
2882
|
|
|
2883 static void
|
|
|
2884 create_pseudo_cfg (void)
|
|
|
2885 {
|
|
|
2886 bool saw_barrier, switch_sections;
|
|
|
2887 dw_trace_info ti;
|
|
|
2888 rtx_insn *insn;
|
|
|
2889 unsigned i;
|
|
|
2890
|
|
|
2891 /* The first trace begins at the start of the function,
|
|
|
2892 and begins with the CIE row state. */
|
|
|
2893 trace_info.create (16);
|
|
|
2894 memset (&ti, 0, sizeof (ti));
|
|
|
2895 ti.head = get_insns ();
|
|
|
2896 ti.beg_row = cie_cfi_row;
|
|
|
2897 ti.cfa_store = cie_cfi_row->cfa;
|
|
|
2898 ti.cfa_temp.reg = INVALID_REGNUM;
|
|
|
2899 trace_info.quick_push (ti);
|
|
|
2900
|
|
|
2901 if (cie_return_save)
|
|
|
2902 ti.regs_saved_in_regs.safe_push (*cie_return_save);
|
|
|
2903
|
|
|
2904 /* Walk all the insns, collecting start of trace locations. */
|
|
|
2905 saw_barrier = false;
|
|
|
2906 switch_sections = false;
|
|
|
2907 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
|
|
|
2908 {
|
|
|
2909 if (BARRIER_P (insn))
|
|
|
2910 saw_barrier = true;
|
|
|
2911 else if (NOTE_P (insn)
|
|
|
2912 && NOTE_KIND (insn) == NOTE_INSN_SWITCH_TEXT_SECTIONS)
|
|
|
2913 {
|
|
|
2914 /* We should have just seen a barrier. */
|
|
|
2915 gcc_assert (saw_barrier);
|
|
|
2916 switch_sections = true;
|
|
|
2917 }
|
|
|
2918 /* Watch out for save_point notes between basic blocks.
|
|
|
2919 In particular, a note after a barrier. Do not record these,
|
|
|
2920 delaying trace creation until the label. */
|
|
|
2921 else if (save_point_p (insn)
|
|
|
2922 && (LABEL_P (insn) || !saw_barrier))
|
|
|
2923 {
|
|
|
2924 memset (&ti, 0, sizeof (ti));
|
|
|
2925 ti.head = insn;
|
|
|
2926 ti.switch_sections = switch_sections;
|
|
|
2927 ti.id = trace_info.length ();
|
|
|
2928 trace_info.safe_push (ti);
|
|
|
2929
|
|
|
2930 saw_barrier = false;
|
|
|
2931 switch_sections = false;
|
|
|
2932 }
|
|
|
2933 }
|
|
|
2934
|
|
|
2935 /* Create the trace index after we've finished building trace_info,
|
|
|
2936 avoiding stale pointer problems due to reallocation. */
|
|
|
2937 trace_index
|
|
|
2938 = new hash_table<trace_info_hasher> (trace_info.length ());
|
|
|
2939 dw_trace_info *tp;
|
|
|
2940 FOR_EACH_VEC_ELT (trace_info, i, tp)
|
|
|
2941 {
|
|
|
2942 dw_trace_info **slot;
|
|
|
2943
|
|
|
2944 if (dump_file)
|
|
|
2945 fprintf (dump_file, "Creating trace %u : start at %s %d%s\n", tp->id,
|
|
|
2946 rtx_name[(int) GET_CODE (tp->head)], INSN_UID (tp->head),
|
|
|
2947 tp->switch_sections ? " (section switch)" : "");
|
|
|
2948
|
|
|
2949 slot = trace_index->find_slot_with_hash (tp, INSN_UID (tp->head), INSERT);
|
|
|
2950 gcc_assert (*slot == NULL);
|
|
|
2951 *slot = tp;
|
|
|
2952 }
|
|
|
2953 }
|
|
|
2954
|
|
|
2955 /* Record the initial position of the return address. RTL is
|
|
|
2956 INCOMING_RETURN_ADDR_RTX. */
|
|
|
2957
|
|
|
2958 static void
|
|
|
2959 initial_return_save (rtx rtl)
|
|
|
2960 {
|
|
|
2961 unsigned int reg = INVALID_REGNUM;
|
|
131
|
2962 poly_int64 offset = 0;
|
|
111
|
2963
|
|
|
2964 switch (GET_CODE (rtl))
|
|
|
2965 {
|
|
|
2966 case REG:
|
|
|
2967 /* RA is in a register. */
|
|
|
2968 reg = dwf_regno (rtl);
|
|
|
2969 break;
|
|
|
2970
|
|
|
2971 case MEM:
|
|
|
2972 /* RA is on the stack. */
|
|
|
2973 rtl = XEXP (rtl, 0);
|
|
|
2974 switch (GET_CODE (rtl))
|
|
|
2975 {
|
|
|
2976 case REG:
|
|
|
2977 gcc_assert (REGNO (rtl) == STACK_POINTER_REGNUM);
|
|
|
2978 offset = 0;
|
|
|
2979 break;
|
|
|
2980
|
|
|
2981 case PLUS:
|
|
|
2982 gcc_assert (REGNO (XEXP (rtl, 0)) == STACK_POINTER_REGNUM);
|
|
131
|
2983 offset = rtx_to_poly_int64 (XEXP (rtl, 1));
|
|
111
|
2984 break;
|
|
|
2985
|
|
|
2986 case MINUS:
|
|
|
2987 gcc_assert (REGNO (XEXP (rtl, 0)) == STACK_POINTER_REGNUM);
|
|
131
|
2988 offset = -rtx_to_poly_int64 (XEXP (rtl, 1));
|
|
111
|
2989 break;
|
|
|
2990
|
|
|
2991 default:
|
|
|
2992 gcc_unreachable ();
|
|
|
2993 }
|
|
|
2994
|
|
|
2995 break;
|
|
|
2996
|
|
|
2997 case PLUS:
|
|
|
2998 /* The return address is at some offset from any value we can
|
|
|
2999 actually load. For instance, on the SPARC it is in %i7+8. Just
|
|
|
3000 ignore the offset for now; it doesn't matter for unwinding frames. */
|
|
|
3001 gcc_assert (CONST_INT_P (XEXP (rtl, 1)));
|
|
|
3002 initial_return_save (XEXP (rtl, 0));
|
|
|
3003 return;
|
|
|
3004
|
|
|
3005 default:
|
|
|
3006 gcc_unreachable ();
|
|
|
3007 }
|
|
|
3008
|
|
|
3009 if (reg != DWARF_FRAME_RETURN_COLUMN)
|
|
|
3010 {
|
|
|
3011 if (reg != INVALID_REGNUM)
|
|
|
3012 record_reg_saved_in_reg (rtl, pc_rtx);
|
|
|
3013 reg_save (DWARF_FRAME_RETURN_COLUMN, reg, offset - cur_row->cfa.offset);
|
|
|
3014 }
|
|
|
3015 }
|
|
|
3016
|
|
|
3017 static void
|
|
|
3018 create_cie_data (void)
|
|
|
3019 {
|
|
|
3020 dw_cfa_location loc;
|
|
|
3021 dw_trace_info cie_trace;
|
|
|
3022
|
|
|
3023 dw_stack_pointer_regnum = DWARF_FRAME_REGNUM (STACK_POINTER_REGNUM);
|
|
|
3024
|
|
|
3025 memset (&cie_trace, 0, sizeof (cie_trace));
|
|
|
3026 cur_trace = &cie_trace;
|
|
|
3027
|
|
|
3028 add_cfi_vec = &cie_cfi_vec;
|
|
|
3029 cie_cfi_row = cur_row = new_cfi_row ();
|
|
|
3030
|
|
|
3031 /* On entry, the Canonical Frame Address is at SP. */
|
|
|
3032 memset (&loc, 0, sizeof (loc));
|
|
|
3033 loc.reg = dw_stack_pointer_regnum;
|
|
131
|
3034 /* create_cie_data is called just once per TU, and when using .cfi_startproc
|
|
|
3035 is even done by the assembler rather than the compiler. If the target
|
|
|
3036 has different incoming frame sp offsets depending on what kind of
|
|
|
3037 function it is, use a single constant offset for the target and
|
|
|
3038 if needed, adjust before the first instruction in insn stream. */
|
|
|
3039 loc.offset = DEFAULT_INCOMING_FRAME_SP_OFFSET;
|
|
111
|
3040 def_cfa_1 (&loc);
|
|
|
3041
|
|
|
3042 if (targetm.debug_unwind_info () == UI_DWARF2
|
|
|
3043 || targetm_common.except_unwind_info (&global_options) == UI_DWARF2)
|
|
|
3044 {
|
|
|
3045 initial_return_save (INCOMING_RETURN_ADDR_RTX);
|
|
|
3046
|
|
|
3047 /* For a few targets, we have the return address incoming into a
|
|
|
3048 register, but choose a different return column. This will result
|
|
|
3049 in a DW_CFA_register for the return, and an entry in
|
|
|
3050 regs_saved_in_regs to match. If the target later stores that
|
|
|
3051 return address register to the stack, we want to be able to emit
|
|
|
3052 the DW_CFA_offset against the return column, not the intermediate
|
|
|
3053 save register. Save the contents of regs_saved_in_regs so that
|
|
|
3054 we can re-initialize it at the start of each function. */
|
|
|
3055 switch (cie_trace.regs_saved_in_regs.length ())
|
|
|
3056 {
|
|
|
3057 case 0:
|
|
|
3058 break;
|
|
|
3059 case 1:
|
|
|
3060 cie_return_save = ggc_alloc<reg_saved_in_data> ();
|
|
|
3061 *cie_return_save = cie_trace.regs_saved_in_regs[0];
|
|
|
3062 cie_trace.regs_saved_in_regs.release ();
|
|
|
3063 break;
|
|
|
3064 default:
|
|
|
3065 gcc_unreachable ();
|
|
|
3066 }
|
|
|
3067 }
|
|
|
3068
|
|
|
3069 add_cfi_vec = NULL;
|
|
|
3070 cur_row = NULL;
|
|
|
3071 cur_trace = NULL;
|
|
|
3072 }
|
|
|
3073
|
|
|
3074 /* Annotate the function with NOTE_INSN_CFI notes to record the CFI
|
|
|
3075 state at each location within the function. These notes will be
|
|
|
3076 emitted during pass_final. */
|
|
|
3077
|
|
|
3078 static unsigned int
|
|
|
3079 execute_dwarf2_frame (void)
|
|
|
3080 {
|
|
|
3081 /* Different HARD_FRAME_POINTER_REGNUM might coexist in the same file. */
|
|
|
3082 dw_frame_pointer_regnum = DWARF_FRAME_REGNUM (HARD_FRAME_POINTER_REGNUM);
|
|
|
3083
|
|
|
3084 /* The first time we're called, compute the incoming frame state. */
|
|
|
3085 if (cie_cfi_vec == NULL)
|
|
|
3086 create_cie_data ();
|
|
|
3087
|
|
|
3088 dwarf2out_alloc_current_fde ();
|
|
|
3089
|
|
|
3090 create_pseudo_cfg ();
|
|
|
3091
|
|
|
3092 /* Do the work. */
|
|
|
3093 create_cfi_notes ();
|
|
|
3094 connect_traces ();
|
|
|
3095 add_cfis_to_fde ();
|
|
|
3096
|
|
|
3097 /* Free all the data we allocated. */
|
|
|
3098 {
|
|
|
3099 size_t i;
|
|
|
3100 dw_trace_info *ti;
|
|
|
3101
|
|
|
3102 FOR_EACH_VEC_ELT (trace_info, i, ti)
|
|
|
3103 ti->regs_saved_in_regs.release ();
|
|
|
3104 }
|
|
|
3105 trace_info.release ();
|
|
|
3106
|
|
|
3107 delete trace_index;
|
|
|
3108 trace_index = NULL;
|
|
|
3109
|
|
|
3110 return 0;
|
|
|
3111 }
|
|
|
3112
|
|
|
3113 /* Convert a DWARF call frame info. operation to its string name */
|
|
|
3114
|
|
|
3115 static const char *
|
|
|
3116 dwarf_cfi_name (unsigned int cfi_opc)
|
|
|
3117 {
|
|
|
3118 const char *name = get_DW_CFA_name (cfi_opc);
|
|
|
3119
|
|
|
3120 if (name != NULL)
|
|
|
3121 return name;
|
|
|
3122
|
|
|
3123 return "DW_CFA_<unknown>";
|
|
|
3124 }
|
|
|
3125
|
|
|
3126 /* This routine will generate the correct assembly data for a location
|
|
|
3127 description based on a cfi entry with a complex address. */
|
|
|
3128
|
|
|
3129 static void
|
|
|
3130 output_cfa_loc (dw_cfi_ref cfi, int for_eh)
|
|
|
3131 {
|
|
|
3132 dw_loc_descr_ref loc;
|
|
|
3133 unsigned long size;
|
|
|
3134
|
|
|
3135 if (cfi->dw_cfi_opc == DW_CFA_expression
|
|
|
3136 || cfi->dw_cfi_opc == DW_CFA_val_expression)
|
|
|
3137 {
|
|
|
3138 unsigned r =
|
|
|
3139 DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh);
|
|
|
3140 dw2_asm_output_data (1, r, NULL);
|
|
|
3141 loc = cfi->dw_cfi_oprnd2.dw_cfi_loc;
|
|
|
3142 }
|
|
|
3143 else
|
|
|
3144 loc = cfi->dw_cfi_oprnd1.dw_cfi_loc;
|
|
|
3145
|
|
|
3146 /* Output the size of the block. */
|
|
|
3147 size = size_of_locs (loc);
|
|
|
3148 dw2_asm_output_data_uleb128 (size, NULL);
|
|
|
3149
|
|
|
3150 /* Now output the operations themselves. */
|
|
|
3151 output_loc_sequence (loc, for_eh);
|
|
|
3152 }
|
|
|
3153
|
|
|
3154 /* Similar, but used for .cfi_escape. */
|
|
|
3155
|
|
|
3156 static void
|
|
|
3157 output_cfa_loc_raw (dw_cfi_ref cfi)
|
|
|
3158 {
|
|
|
3159 dw_loc_descr_ref loc;
|
|
|
3160 unsigned long size;
|
|
|
3161
|
|
|
3162 if (cfi->dw_cfi_opc == DW_CFA_expression
|
|
|
3163 || cfi->dw_cfi_opc == DW_CFA_val_expression)
|
|
|
3164 {
|
|
|
3165 unsigned r =
|
|
|
3166 DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1);
|
|
|
3167 fprintf (asm_out_file, "%#x,", r);
|
|
|
3168 loc = cfi->dw_cfi_oprnd2.dw_cfi_loc;
|
|
|
3169 }
|
|
|
3170 else
|
|
|
3171 loc = cfi->dw_cfi_oprnd1.dw_cfi_loc;
|
|
|
3172
|
|
|
3173 /* Output the size of the block. */
|
|
|
3174 size = size_of_locs (loc);
|
|
|
3175 dw2_asm_output_data_uleb128_raw (size);
|
|
|
3176 fputc (',', asm_out_file);
|
|
|
3177
|
|
|
3178 /* Now output the operations themselves. */
|
|
|
3179 output_loc_sequence_raw (loc);
|
|
|
3180 }
|
|
|
3181
|
|
|
3182 /* Output a Call Frame Information opcode and its operand(s). */
|
|
|
3183
|
|
|
3184 void
|
|
|
3185 output_cfi (dw_cfi_ref cfi, dw_fde_ref fde, int for_eh)
|
|
|
3186 {
|
|
|
3187 unsigned long r;
|
|
|
3188 HOST_WIDE_INT off;
|
|
|
3189
|
|
|
3190 if (cfi->dw_cfi_opc == DW_CFA_advance_loc)
|
|
|
3191 dw2_asm_output_data (1, (cfi->dw_cfi_opc
|
|
|
3192 | (cfi->dw_cfi_oprnd1.dw_cfi_offset & 0x3f)),
|
|
|
3193 "DW_CFA_advance_loc " HOST_WIDE_INT_PRINT_HEX,
|
|
|
3194 ((unsigned HOST_WIDE_INT)
|
|
|
3195 cfi->dw_cfi_oprnd1.dw_cfi_offset));
|
|
|
3196 else if (cfi->dw_cfi_opc == DW_CFA_offset)
|
|
|
3197 {
|
|
|
3198 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh);
|
|
|
3199 dw2_asm_output_data (1, (cfi->dw_cfi_opc | (r & 0x3f)),
|
|
|
3200 "DW_CFA_offset, column %#lx", r);
|
|
|
3201 off = div_data_align (cfi->dw_cfi_oprnd2.dw_cfi_offset);
|
|
|
3202 dw2_asm_output_data_uleb128 (off, NULL);
|
|
|
3203 }
|
|
|
3204 else if (cfi->dw_cfi_opc == DW_CFA_restore)
|
|
|
3205 {
|
|
|
3206 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh);
|
|
|
3207 dw2_asm_output_data (1, (cfi->dw_cfi_opc | (r & 0x3f)),
|
|
|
3208 "DW_CFA_restore, column %#lx", r);
|
|
|
3209 }
|
|
|
3210 else
|
|
|
3211 {
|
|
|
3212 dw2_asm_output_data (1, cfi->dw_cfi_opc,
|
|
|
3213 "%s", dwarf_cfi_name (cfi->dw_cfi_opc));
|
|
|
3214
|
|
|
3215 switch (cfi->dw_cfi_opc)
|
|
|
3216 {
|
|
|
3217 case DW_CFA_set_loc:
|
|
|
3218 if (for_eh)
|
|
|
3219 dw2_asm_output_encoded_addr_rtx (
|
|
|
3220 ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/1, /*global=*/0),
|
|
|
3221 gen_rtx_SYMBOL_REF (Pmode, cfi->dw_cfi_oprnd1.dw_cfi_addr),
|
|
|
3222 false, NULL);
|
|
|
3223 else
|
|
|
3224 dw2_asm_output_addr (DWARF2_ADDR_SIZE,
|
|
|
3225 cfi->dw_cfi_oprnd1.dw_cfi_addr, NULL);
|
|
|
3226 fde->dw_fde_current_label = cfi->dw_cfi_oprnd1.dw_cfi_addr;
|
|
|
3227 break;
|
|
|
3228
|
|
|
3229 case DW_CFA_advance_loc1:
|
|
|
3230 dw2_asm_output_delta (1, cfi->dw_cfi_oprnd1.dw_cfi_addr,
|
|
|
3231 fde->dw_fde_current_label, NULL);
|
|
|
3232 fde->dw_fde_current_label = cfi->dw_cfi_oprnd1.dw_cfi_addr;
|
|
|
3233 break;
|
|
|
3234
|
|
|
3235 case DW_CFA_advance_loc2:
|
|
|
3236 dw2_asm_output_delta (2, cfi->dw_cfi_oprnd1.dw_cfi_addr,
|
|
|
3237 fde->dw_fde_current_label, NULL);
|
|
|
3238 fde->dw_fde_current_label = cfi->dw_cfi_oprnd1.dw_cfi_addr;
|
|
|
3239 break;
|
|
|
3240
|
|
|
3241 case DW_CFA_advance_loc4:
|
|
|
3242 dw2_asm_output_delta (4, cfi->dw_cfi_oprnd1.dw_cfi_addr,
|
|
|
3243 fde->dw_fde_current_label, NULL);
|
|
|
3244 fde->dw_fde_current_label = cfi->dw_cfi_oprnd1.dw_cfi_addr;
|
|
|
3245 break;
|
|
|
3246
|
|
|
3247 case DW_CFA_MIPS_advance_loc8:
|
|
|
3248 dw2_asm_output_delta (8, cfi->dw_cfi_oprnd1.dw_cfi_addr,
|
|
|
3249 fde->dw_fde_current_label, NULL);
|
|
|
3250 fde->dw_fde_current_label = cfi->dw_cfi_oprnd1.dw_cfi_addr;
|
|
|
3251 break;
|
|
|
3252
|
|
|
3253 case DW_CFA_offset_extended:
|
|
|
3254 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh);
|
|
|
3255 dw2_asm_output_data_uleb128 (r, NULL);
|
|
|
3256 off = div_data_align (cfi->dw_cfi_oprnd2.dw_cfi_offset);
|
|
|
3257 dw2_asm_output_data_uleb128 (off, NULL);
|
|
|
3258 break;
|
|
|
3259
|
|
|
3260 case DW_CFA_def_cfa:
|
|
|
3261 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh);
|
|
|
3262 dw2_asm_output_data_uleb128 (r, NULL);
|
|
|
3263 dw2_asm_output_data_uleb128 (cfi->dw_cfi_oprnd2.dw_cfi_offset, NULL);
|
|
|
3264 break;
|
|
|
3265
|
|
|
3266 case DW_CFA_offset_extended_sf:
|
|
|
3267 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh);
|
|
|
3268 dw2_asm_output_data_uleb128 (r, NULL);
|
|
|
3269 off = div_data_align (cfi->dw_cfi_oprnd2.dw_cfi_offset);
|
|
|
3270 dw2_asm_output_data_sleb128 (off, NULL);
|
|
|
3271 break;
|
|
|
3272
|
|
|
3273 case DW_CFA_def_cfa_sf:
|
|
|
3274 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh);
|
|
|
3275 dw2_asm_output_data_uleb128 (r, NULL);
|
|
|
3276 off = div_data_align (cfi->dw_cfi_oprnd2.dw_cfi_offset);
|
|
|
3277 dw2_asm_output_data_sleb128 (off, NULL);
|
|
|
3278 break;
|
|
|
3279
|
|
|
3280 case DW_CFA_restore_extended:
|
|
|
3281 case DW_CFA_undefined:
|
|
|
3282 case DW_CFA_same_value:
|
|
|
3283 case DW_CFA_def_cfa_register:
|
|
|
3284 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh);
|
|
|
3285 dw2_asm_output_data_uleb128 (r, NULL);
|
|
|
3286 break;
|
|
|
3287
|
|
|
3288 case DW_CFA_register:
|
|
|
3289 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, for_eh);
|
|
|
3290 dw2_asm_output_data_uleb128 (r, NULL);
|
|
|
3291 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd2.dw_cfi_reg_num, for_eh);
|
|
|
3292 dw2_asm_output_data_uleb128 (r, NULL);
|
|
|
3293 break;
|
|
|
3294
|
|
|
3295 case DW_CFA_def_cfa_offset:
|
|
|
3296 case DW_CFA_GNU_args_size:
|
|
|
3297 dw2_asm_output_data_uleb128 (cfi->dw_cfi_oprnd1.dw_cfi_offset, NULL);
|
|
|
3298 break;
|
|
|
3299
|
|
|
3300 case DW_CFA_def_cfa_offset_sf:
|
|
|
3301 off = div_data_align (cfi->dw_cfi_oprnd1.dw_cfi_offset);
|
|
|
3302 dw2_asm_output_data_sleb128 (off, NULL);
|
|
|
3303 break;
|
|
|
3304
|
|
|
3305 case DW_CFA_GNU_window_save:
|
|
|
3306 break;
|
|
|
3307
|
|
|
3308 case DW_CFA_def_cfa_expression:
|
|
|
3309 case DW_CFA_expression:
|
|
|
3310 case DW_CFA_val_expression:
|
|
|
3311 output_cfa_loc (cfi, for_eh);
|
|
|
3312 break;
|
|
|
3313
|
|
|
3314 case DW_CFA_GNU_negative_offset_extended:
|
|
|
3315 /* Obsoleted by DW_CFA_offset_extended_sf. */
|
|
|
3316 gcc_unreachable ();
|
|
|
3317
|
|
|
3318 default:
|
|
|
3319 break;
|
|
|
3320 }
|
|
|
3321 }
|
|
|
3322 }
|
|
|
3323
|
|
|
3324 /* Similar, but do it via assembler directives instead. */
|
|
|
3325
|
|
|
3326 void
|
|
|
3327 output_cfi_directive (FILE *f, dw_cfi_ref cfi)
|
|
|
3328 {
|
|
|
3329 unsigned long r, r2;
|
|
|
3330
|
|
|
3331 switch (cfi->dw_cfi_opc)
|
|
|
3332 {
|
|
|
3333 case DW_CFA_advance_loc:
|
|
|
3334 case DW_CFA_advance_loc1:
|
|
|
3335 case DW_CFA_advance_loc2:
|
|
|
3336 case DW_CFA_advance_loc4:
|
|
|
3337 case DW_CFA_MIPS_advance_loc8:
|
|
|
3338 case DW_CFA_set_loc:
|
|
|
3339 /* Should only be created in a code path not followed when emitting
|
|
|
3340 via directives. The assembler is going to take care of this for
|
|
|
3341 us. But this routines is also used for debugging dumps, so
|
|
|
3342 print something. */
|
|
|
3343 gcc_assert (f != asm_out_file);
|
|
|
3344 fprintf (f, "\t.cfi_advance_loc\n");
|
|
|
3345 break;
|
|
|
3346
|
|
|
3347 case DW_CFA_offset:
|
|
|
3348 case DW_CFA_offset_extended:
|
|
|
3349 case DW_CFA_offset_extended_sf:
|
|
|
3350 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1);
|
|
|
3351 fprintf (f, "\t.cfi_offset %lu, " HOST_WIDE_INT_PRINT_DEC"\n",
|
|
|
3352 r, cfi->dw_cfi_oprnd2.dw_cfi_offset);
|
|
|
3353 break;
|
|
|
3354
|
|
|
3355 case DW_CFA_restore:
|
|
|
3356 case DW_CFA_restore_extended:
|
|
|
3357 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1);
|
|
|
3358 fprintf (f, "\t.cfi_restore %lu\n", r);
|
|
|
3359 break;
|
|
|
3360
|
|
|
3361 case DW_CFA_undefined:
|
|
|
3362 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1);
|
|
|
3363 fprintf (f, "\t.cfi_undefined %lu\n", r);
|
|
|
3364 break;
|
|
|
3365
|
|
|
3366 case DW_CFA_same_value:
|
|
|
3367 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1);
|
|
|
3368 fprintf (f, "\t.cfi_same_value %lu\n", r);
|
|
|
3369 break;
|
|
|
3370
|
|
|
3371 case DW_CFA_def_cfa:
|
|
|
3372 case DW_CFA_def_cfa_sf:
|
|
|
3373 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1);
|
|
|
3374 fprintf (f, "\t.cfi_def_cfa %lu, " HOST_WIDE_INT_PRINT_DEC"\n",
|
|
|
3375 r, cfi->dw_cfi_oprnd2.dw_cfi_offset);
|
|
|
3376 break;
|
|
|
3377
|
|
|
3378 case DW_CFA_def_cfa_register:
|
|
|
3379 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1);
|
|
|
3380 fprintf (f, "\t.cfi_def_cfa_register %lu\n", r);
|
|
|
3381 break;
|
|
|
3382
|
|
|
3383 case DW_CFA_register:
|
|
|
3384 r = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd1.dw_cfi_reg_num, 1);
|
|
|
3385 r2 = DWARF2_FRAME_REG_OUT (cfi->dw_cfi_oprnd2.dw_cfi_reg_num, 1);
|
|
|
3386 fprintf (f, "\t.cfi_register %lu, %lu\n", r, r2);
|
|
|
3387 break;
|
|
|
3388
|
|
|
3389 case DW_CFA_def_cfa_offset:
|
|
|
3390 case DW_CFA_def_cfa_offset_sf:
|
|
|
3391 fprintf (f, "\t.cfi_def_cfa_offset "
|
|
|
3392 HOST_WIDE_INT_PRINT_DEC"\n",
|
|
|
3393 cfi->dw_cfi_oprnd1.dw_cfi_offset);
|
|
|
3394 break;
|
|
|
3395
|
|
|
3396 case DW_CFA_remember_state:
|
|
|
3397 fprintf (f, "\t.cfi_remember_state\n");
|
|
|
3398 break;
|
|
|
3399 case DW_CFA_restore_state:
|
|
|
3400 fprintf (f, "\t.cfi_restore_state\n");
|
|
|
3401 break;
|
|
|
3402
|
|
|
3403 case DW_CFA_GNU_args_size:
|
|
|
3404 if (f == asm_out_file)
|
|
|
3405 {
|
|
|
3406 fprintf (f, "\t.cfi_escape %#x,", DW_CFA_GNU_args_size);
|
|
|
3407 dw2_asm_output_data_uleb128_raw (cfi->dw_cfi_oprnd1.dw_cfi_offset);
|
|
|
3408 if (flag_debug_asm)
|
|
|
3409 fprintf (f, "\t%s args_size " HOST_WIDE_INT_PRINT_DEC,
|
|
|
3410 ASM_COMMENT_START, cfi->dw_cfi_oprnd1.dw_cfi_offset);
|
|
|
3411 fputc ('\n', f);
|
|
|
3412 }
|
|
|
3413 else
|
|
|
3414 {
|
|
|
3415 fprintf (f, "\t.cfi_GNU_args_size " HOST_WIDE_INT_PRINT_DEC "\n",
|
|
|
3416 cfi->dw_cfi_oprnd1.dw_cfi_offset);
|
|
|
3417 }
|
|
|
3418 break;
|
|
|
3419
|
|
|
3420 case DW_CFA_GNU_window_save:
|
|
|
3421 fprintf (f, "\t.cfi_window_save\n");
|
|
|
3422 break;
|
|
|
3423
|
|
|
3424 case DW_CFA_def_cfa_expression:
|
|
|
3425 case DW_CFA_expression:
|
|
|
3426 case DW_CFA_val_expression:
|
|
|
3427 if (f != asm_out_file)
|
|
|
3428 {
|
|
|
3429 fprintf (f, "\t.cfi_%scfa_%sexpression ...\n",
|
|
|
3430 cfi->dw_cfi_opc == DW_CFA_def_cfa_expression ? "def_" : "",
|
|
|
3431 cfi->dw_cfi_opc == DW_CFA_val_expression ? "val_" : "");
|
|
|
3432 break;
|
|
|
3433 }
|
|
|
3434 fprintf (f, "\t.cfi_escape %#x,", cfi->dw_cfi_opc);
|
|
|
3435 output_cfa_loc_raw (cfi);
|
|
|
3436 fputc ('\n', f);
|
|
|
3437 break;
|
|
|
3438
|
|
|
3439 default:
|
|
|
3440 gcc_unreachable ();
|
|
|
3441 }
|
|
|
3442 }
|
|
|
3443
|
|
|
3444 void
|
|
|
3445 dwarf2out_emit_cfi (dw_cfi_ref cfi)
|
|
|
3446 {
|
|
|
3447 if (dwarf2out_do_cfi_asm ())
|
|
|
3448 output_cfi_directive (asm_out_file, cfi);
|
|
|
3449 }
|
|
|
3450
|
|
|
3451 static void
|
|
|
3452 dump_cfi_row (FILE *f, dw_cfi_row *row)
|
|
|
3453 {
|
|
|
3454 dw_cfi_ref cfi;
|
|
|
3455 unsigned i;
|
|
|
3456
|
|
|
3457 cfi = row->cfa_cfi;
|
|
|
3458 if (!cfi)
|
|
|
3459 {
|
|
|
3460 dw_cfa_location dummy;
|
|
|
3461 memset (&dummy, 0, sizeof (dummy));
|
|
|
3462 dummy.reg = INVALID_REGNUM;
|
|
|
3463 cfi = def_cfa_0 (&dummy, &row->cfa);
|
|
|
3464 }
|
|
|
3465 output_cfi_directive (f, cfi);
|
|
|
3466
|
|
|
3467 FOR_EACH_VEC_SAFE_ELT (row->reg_save, i, cfi)
|
|
|
3468 if (cfi)
|
|
|
3469 output_cfi_directive (f, cfi);
|
|
|
3470 }
|
|
|
3471
|
|
|
3472 void debug_cfi_row (dw_cfi_row *row);
|
|
|
3473
|
|
|
3474 void
|
|
|
3475 debug_cfi_row (dw_cfi_row *row)
|
|
|
3476 {
|
|
|
3477 dump_cfi_row (stderr, row);
|
|
|
3478 }
|
|
|
3479
|
|
|
3480
|
|
|
3481 /* Save the result of dwarf2out_do_frame across PCH.
|
|
|
3482 This variable is tri-state, with 0 unset, >0 true, <0 false. */
|
|
|
3483 static GTY(()) signed char saved_do_cfi_asm = 0;
|
|
|
3484
|
|
131
|
3485 /* Decide whether to emit EH frame unwind information for the current
|
|
|
3486 translation unit. */
|
|
|
3487
|
|
|
3488 bool
|
|
|
3489 dwarf2out_do_eh_frame (void)
|
|
|
3490 {
|
|
|
3491 return
|
|
|
3492 (flag_unwind_tables || flag_exceptions)
|
|
|
3493 && targetm_common.except_unwind_info (&global_options) == UI_DWARF2;
|
|
|
3494 }
|
|
|
3495
|
|
111
|
3496 /* Decide whether we want to emit frame unwind information for the current
|
|
|
3497 translation unit. */
|
|
|
3498
|
|
|
3499 bool
|
|
|
3500 dwarf2out_do_frame (void)
|
|
|
3501 {
|
|
|
3502 /* We want to emit correct CFA location expressions or lists, so we
|
|
|
3503 have to return true if we're going to output debug info, even if
|
|
|
3504 we're not going to output frame or unwind info. */
|
|
|
3505 if (write_symbols == DWARF2_DEBUG || write_symbols == VMS_AND_DWARF2_DEBUG)
|
|
|
3506 return true;
|
|
|
3507
|
|
|
3508 if (saved_do_cfi_asm > 0)
|
|
|
3509 return true;
|
|
|
3510
|
|
|
3511 if (targetm.debug_unwind_info () == UI_DWARF2)
|
|
|
3512 return true;
|
|
|
3513
|
|
131
|
3514 if (dwarf2out_do_eh_frame ())
|
|
111
|
3515 return true;
|
|
|
3516
|
|
|
3517 return false;
|
|
|
3518 }
|
|
|
3519
|
|
|
3520 /* Decide whether to emit frame unwind via assembler directives. */
|
|
|
3521
|
|
|
3522 bool
|
|
|
3523 dwarf2out_do_cfi_asm (void)
|
|
|
3524 {
|
|
|
3525 int enc;
|
|
|
3526
|
|
|
3527 if (saved_do_cfi_asm != 0)
|
|
|
3528 return saved_do_cfi_asm > 0;
|
|
|
3529
|
|
|
3530 /* Assume failure for a moment. */
|
|
|
3531 saved_do_cfi_asm = -1;
|
|
|
3532
|
|
|
3533 if (!flag_dwarf2_cfi_asm || !dwarf2out_do_frame ())
|
|
|
3534 return false;
|
|
|
3535 if (!HAVE_GAS_CFI_PERSONALITY_DIRECTIVE)
|
|
|
3536 return false;
|
|
|
3537
|
|
|
3538 /* Make sure the personality encoding is one the assembler can support.
|
|
|
3539 In particular, aligned addresses can't be handled. */
|
|
|
3540 enc = ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/2,/*global=*/1);
|
|
|
3541 if ((enc & 0x70) != 0 && (enc & 0x70) != DW_EH_PE_pcrel)
|
|
|
3542 return false;
|
|
|
3543 enc = ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/0,/*global=*/0);
|
|
|
3544 if ((enc & 0x70) != 0 && (enc & 0x70) != DW_EH_PE_pcrel)
|
|
|
3545 return false;
|
|
|
3546
|
|
|
3547 /* If we can't get the assembler to emit only .debug_frame, and we don't need
|
|
|
3548 dwarf2 unwind info for exceptions, then emit .debug_frame by hand. */
|
|
131
|
3549 if (!HAVE_GAS_CFI_SECTIONS_DIRECTIVE && !dwarf2out_do_eh_frame ())
|
|
111
|
3550 return false;
|
|
|
3551
|
|
|
3552 /* Success! */
|
|
|
3553 saved_do_cfi_asm = 1;
|
|
|
3554 return true;
|
|
|
3555 }
|
|
|
3556
|
|
|
3557 namespace {
|
|
|
3558
|
|
|
3559 const pass_data pass_data_dwarf2_frame =
|
|
|
3560 {
|
|
|
3561 RTL_PASS, /* type */
|
|
|
3562 "dwarf2", /* name */
|
|
|
3563 OPTGROUP_NONE, /* optinfo_flags */
|
|
|
3564 TV_FINAL, /* tv_id */
|
|
|
3565 0, /* properties_required */
|
|
|
3566 0, /* properties_provided */
|
|
|
3567 0, /* properties_destroyed */
|
|
|
3568 0, /* todo_flags_start */
|
|
|
3569 0, /* todo_flags_finish */
|
|
|
3570 };
|
|
|
3571
|
|
|
3572 class pass_dwarf2_frame : public rtl_opt_pass
|
|
|
3573 {
|
|
|
3574 public:
|
|
|
3575 pass_dwarf2_frame (gcc::context *ctxt)
|
|
|
3576 : rtl_opt_pass (pass_data_dwarf2_frame, ctxt)
|
|
|
3577 {}
|
|
|
3578
|
|
|
3579 /* opt_pass methods: */
|
|
|
3580 virtual bool gate (function *);
|
|
|
3581 virtual unsigned int execute (function *) { return execute_dwarf2_frame (); }
|
|
|
3582
|
|
|
3583 }; // class pass_dwarf2_frame
|
|
|
3584
|
|
|
3585 bool
|
|
|
3586 pass_dwarf2_frame::gate (function *)
|
|
|
3587 {
|
|
|
3588 /* Targets which still implement the prologue in assembler text
|
|
|
3589 cannot use the generic dwarf2 unwinding. */
|
|
|
3590 if (!targetm.have_prologue ())
|
|
|
3591 return false;
|
|
|
3592
|
|
|
3593 /* ??? What to do for UI_TARGET unwinding? They might be able to benefit
|
|
|
3594 from the optimized shrink-wrapping annotations that we will compute.
|
|
|
3595 For now, only produce the CFI notes for dwarf2. */
|
|
|
3596 return dwarf2out_do_frame ();
|
|
|
3597 }
|
|
|
3598
|
|
|
3599 } // anon namespace
|
|
|
3600
|
|
|
3601 rtl_opt_pass *
|
|
|
3602 make_pass_dwarf2_frame (gcc::context *ctxt)
|
|
|
3603 {
|
|
|
3604 return new pass_dwarf2_frame (ctxt);
|
|
|
3605 }
|
|
|
3606
|
|
|
3607 #include "gt-dwarf2cfi.h"
|
