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111
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1 /* Code to analyze doloop loops in order for targets to perform late
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2 optimizations converting doloops to other forms of hardware loops.
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145
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3 Copyright (C) 2011-2020 Free Software Foundation, Inc.
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111
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4
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5 This file is part of GCC.
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6
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7 GCC is free software; you can redistribute it and/or modify it under
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8 the terms of the GNU General Public License as published by the Free
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9 Software Foundation; either version 3, or (at your option) any later
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10 version.
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11
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12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
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13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
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14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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15 for more details.
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16
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17 You should have received a copy of the GNU General Public License
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18 along with GCC; see the file COPYING3. If not see
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19 <http://www.gnu.org/licenses/>. */
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20
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21 #ifndef GCC_HW_DOLOOP_H
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22 #define GCC_HW_DOLOOP_H
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23
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24 /* We need to keep a vector of loops */
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25 typedef struct hwloop_info_d *hwloop_info;
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26
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27 /* Information about a loop we have found (or are in the process of
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28 finding). */
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29 struct GTY (()) hwloop_info_d
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30 {
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31 /* loop number, for dumps */
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32 int loop_no;
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33
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34 /* Next loop in the graph. */
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35 hwloop_info next;
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36
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37 /* Vector of blocks only within the loop, including those within
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38 inner loops. */
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39 vec<basic_block> blocks;
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40
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41 /* Same information in a bitmap. */
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42 bitmap block_bitmap;
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43
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44 /* Vector of inner loops within this loop. Includes loops of every
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45 nesting level. */
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46 vec<hwloop_info> loops;
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47
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48 /* All edges that jump into the loop. */
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49 vec<edge, va_gc> *incoming;
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50
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51 /* The ports currently using this infrastructure can typically
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52 handle two cases: all incoming edges have the same destination
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53 block, or all incoming edges have the same source block. These
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54 two members are set to the common source or destination we found,
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55 or NULL if different blocks were found. If both are NULL the
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56 loop can't be optimized. */
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57 basic_block incoming_src;
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58 basic_block incoming_dest;
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59
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60 /* First block in the loop. This is the one branched to by the loop_end
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61 insn. */
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62 basic_block head;
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63
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64 /* Last block in the loop (the one with the loop_end insn). */
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65 basic_block tail;
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66
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67 /* The successor block of the loop. This is the one the loop_end insn
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68 falls into. */
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69 basic_block successor;
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70
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71 /* The last instruction in the tail. */
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72 rtx_insn *last_insn;
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73
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74 /* The loop_end insn. */
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75 rtx_insn *loop_end;
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76
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77 /* The iteration register. */
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78 rtx iter_reg;
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79
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80 /* The new label placed at the beginning of the loop. */
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81 rtx_insn *start_label;
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82
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83 /* The new label placed at the end of the loop. */
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84 rtx end_label;
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85
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86 /* The length of the loop. */
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87 int length;
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88
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89 /* The nesting depth of the loop. Innermost loops are given a depth
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90 of 1. Only successfully optimized doloops are counted; if an inner
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91 loop was marked as bad, it does not increase the depth of its parent
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92 loop.
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93 This value is valid when the target's optimize function is called. */
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94 int depth;
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95
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96 /* True if we can't optimize this loop. */
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97 bool bad;
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98
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99 /* True if we have visited this loop during the optimization phase. */
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100 bool visited;
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101
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102 /* The following values are collected before calling the target's optimize
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103 function and are not valid earlier. */
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104
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105 /* Record information about control flow: whether the loop has calls
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106 or asm statements, whether it has edges that jump out of the loop,
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107 or edges that jump within the loop. */
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108 bool has_call;
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109 bool has_asm;
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110 bool jumps_within;
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111 bool jumps_outof;
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112
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113 /* True if there is an instruction other than the doloop_end which uses the
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114 iteration register. */
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115 bool iter_reg_used;
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116 /* True if the iteration register lives past the doloop instruction. */
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117 bool iter_reg_used_outside;
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118
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119 /* Hard registers set at any point in the loop, except for the loop counter
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120 register's set in the doloop_end instruction. */
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121 HARD_REG_SET regs_set_in_loop;
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122 };
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123
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124 /* A set of hooks to be defined by a target that wants to use the reorg_loops
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125 functionality.
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126
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127 reorg_loops is intended to handle cases where special hardware loop
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128 setup instructions are required before the loop, for example to set
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129 up loop counter registers that are not exposed to the register
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130 allocator, or to inform the hardware about loop bounds.
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131
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132 reorg_loops performs analysis to discover loop_end patterns created
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133 by the earlier loop-doloop pass, and sets up a hwloop_info
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134 structure for each such insn it finds. It then tries to discover
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135 the basic blocks containing the loop by tracking the lifetime of
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136 the iteration register.
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137
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138 If a valid loop can't be found, the FAIL function is called;
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139 otherwise the OPT function is called for each loop, visiting
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140 innermost loops first and ascending. */
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141 struct hw_doloop_hooks
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142 {
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143 /* Examine INSN. If it is a suitable doloop_end pattern, return the
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144 iteration register, which should be a single hard register.
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145 Otherwise, return NULL_RTX. */
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146 rtx (*end_pattern_reg) (rtx_insn *insn);
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147 /* Optimize LOOP. The target should perform any additional analysis
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148 (e.g. checking that the loop isn't too long), and then perform
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149 its transformations. Return true if successful, false if the
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150 loop should be marked bad. If it returns false, the FAIL
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151 function is called. */
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152 bool (*opt) (hwloop_info loop);
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153 /* Handle a loop that was marked bad for any reason. This could be
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154 used to split the doloop_end pattern. */
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155 void (*fail) (hwloop_info loop);
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156 };
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157
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158 extern void reorg_loops (bool, struct hw_doloop_hooks *);
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159
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160 #endif /* GCC_HW_DOLOOP_H */
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