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111
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1 /* Code for RTL register eliminations.
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145
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2 Copyright (C) 2010-2020 Free Software Foundation, Inc.
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111
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3 Contributed by Vladimir Makarov <vmakarov@redhat.com>.
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4
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5 This file is part of GCC.
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6
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7 GCC is free software; you can redistribute it and/or modify it under
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8 the terms of the GNU General Public License as published by the Free
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9 Software Foundation; either version 3, or (at your option) any later
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10 version.
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11
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12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
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13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
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14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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15 for more details.
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16
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17 You should have received a copy of the GNU General Public License
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18 along with GCC; see the file COPYING3. If not see
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19 <http://www.gnu.org/licenses/>. */
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20
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21 /* Eliminable registers (like a soft argument or frame pointer) are
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22 widely used in RTL. These eliminable registers should be replaced
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23 by real hard registers (like the stack pointer or hard frame
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24 pointer) plus some offset. The offsets usually change whenever the
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25 stack is expanded. We know the final offsets only at the very end
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26 of LRA.
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27
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28 Within LRA, we usually keep the RTL in such a state that the
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29 eliminable registers can be replaced by just the corresponding hard
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30 register (without any offset). To achieve this we should add the
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31 initial elimination offset at the beginning of LRA and update the
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32 offsets whenever the stack is expanded. We need to do this before
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33 every constraint pass because the choice of offset often affects
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34 whether a particular address or memory constraint is satisfied.
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35
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36 We keep RTL code at most time in such state that the virtual
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37 registers can be changed by just the corresponding hard registers
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38 (with zero offsets) and we have the right RTL code. To achieve this
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39 we should add initial offset at the beginning of LRA work and update
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40 offsets after each stack expanding. But actually we update virtual
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41 registers to the same virtual registers + corresponding offsets
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42 before every constraint pass because it affects constraint
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43 satisfaction (e.g. an address displacement became too big for some
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44 target).
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45
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46 The final change of eliminable registers to the corresponding hard
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47 registers are done at the very end of LRA when there were no change
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48 in offsets anymore:
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49
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50 fp + 42 => sp + 42
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51
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52 */
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53
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54 #include "config.h"
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55 #include "system.h"
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56 #include "coretypes.h"
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57 #include "backend.h"
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58 #include "target.h"
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59 #include "rtl.h"
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60 #include "tree.h"
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61 #include "df.h"
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62 #include "memmodel.h"
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63 #include "tm_p.h"
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64 #include "optabs.h"
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65 #include "regs.h"
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66 #include "ira.h"
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67 #include "recog.h"
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68 #include "output.h"
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69 #include "rtl-error.h"
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70 #include "lra-int.h"
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71
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72 /* This structure is used to record information about hard register
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73 eliminations. */
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145
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74 class lra_elim_table
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111
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75 {
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145
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76 public:
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77 /* Hard register number to be eliminated. */
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78 int from;
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79 /* Hard register number used as replacement. */
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80 int to;
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81 /* Difference between values of the two hard registers above on
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82 previous iteration. */
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83 poly_int64 previous_offset;
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84 /* Difference between the values on the current iteration. */
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85 poly_int64 offset;
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86 /* Nonzero if this elimination can be done. */
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87 bool can_eliminate;
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88 /* CAN_ELIMINATE since the last check. */
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89 bool prev_can_eliminate;
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90 /* REG rtx for the register to be eliminated. We cannot simply
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91 compare the number since we might then spuriously replace a hard
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92 register corresponding to a pseudo assigned to the reg to be
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93 eliminated. */
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94 rtx from_rtx;
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95 /* REG rtx for the replacement. */
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96 rtx to_rtx;
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97 };
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98
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99 /* The elimination table. Each array entry describes one possible way
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100 of eliminating a register in favor of another. If there is more
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101 than one way of eliminating a particular register, the most
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102 preferred should be specified first. */
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103 static class lra_elim_table *reg_eliminate = 0;
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104
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105 /* This is an intermediate structure to initialize the table. It has
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106 exactly the members provided by ELIMINABLE_REGS. */
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107 static const struct elim_table_1
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108 {
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109 const int from;
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110 const int to;
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111 } reg_eliminate_1[] =
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112
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113 ELIMINABLE_REGS;
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114
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115 #define NUM_ELIMINABLE_REGS ARRAY_SIZE (reg_eliminate_1)
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116
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117 /* Print info about elimination table to file F. */
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118 static void
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119 print_elim_table (FILE *f)
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120 {
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121 class lra_elim_table *ep;
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122
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123 for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++)
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131
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124 {
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125 fprintf (f, "%s eliminate %d to %d (offset=",
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126 ep->can_eliminate ? "Can" : "Can't", ep->from, ep->to);
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127 print_dec (ep->offset, f);
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128 fprintf (f, ", prev_offset=");
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129 print_dec (ep->previous_offset, f);
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130 fprintf (f, ")\n");
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131 }
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111
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132 }
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133
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134 /* Print info about elimination table to stderr. */
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135 void
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136 lra_debug_elim_table (void)
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137 {
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138 print_elim_table (stderr);
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139 }
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140
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141 /* Setup possibility of elimination in elimination table element EP to
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142 VALUE. Setup FRAME_POINTER_NEEDED if elimination from frame
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143 pointer to stack pointer is not possible anymore. */
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144 static void
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145
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145 setup_can_eliminate (class lra_elim_table *ep, bool value)
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111
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146 {
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147 ep->can_eliminate = ep->prev_can_eliminate = value;
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148 if (! value
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149 && ep->from == FRAME_POINTER_REGNUM && ep->to == STACK_POINTER_REGNUM)
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150 frame_pointer_needed = 1;
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151 if (!frame_pointer_needed)
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152 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = 0;
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153 }
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154
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155 /* Map: eliminable "from" register -> its current elimination,
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156 or NULL if none. The elimination table may contain more than
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157 one elimination for the same hard register, but this map specifies
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158 the one that we are currently using. */
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159 static class lra_elim_table *elimination_map[FIRST_PSEUDO_REGISTER];
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160
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161 /* When an eliminable hard register becomes not eliminable, we use the
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162 following special structure to restore original offsets for the
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163 register. */
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164 static class lra_elim_table self_elim_table;
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165
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166 /* Offsets should be used to restore original offsets for eliminable
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167 hard register which just became not eliminable. Zero,
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168 otherwise. */
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131
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169 static poly_int64_pod self_elim_offsets[FIRST_PSEUDO_REGISTER];
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170
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171 /* Map: hard regno -> RTL presentation. RTL presentations of all
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172 potentially eliminable hard registers are stored in the map. */
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173 static rtx eliminable_reg_rtx[FIRST_PSEUDO_REGISTER];
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174
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175 /* Set up ELIMINATION_MAP of the currently used eliminations. */
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176 static void
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177 setup_elimination_map (void)
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178 {
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179 int i;
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180 class lra_elim_table *ep;
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181
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182 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
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183 elimination_map[i] = NULL;
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184 for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++)
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185 if (ep->can_eliminate && elimination_map[ep->from] == NULL)
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186 elimination_map[ep->from] = ep;
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187 }
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188
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189
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190
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191 /* Compute the sum of X and Y, making canonicalizations assumed in an
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192 address, namely: sum constant integers, surround the sum of two
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193 constants with a CONST, put the constant as the second operand, and
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194 group the constant on the outermost sum.
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195
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196 This routine assumes both inputs are already in canonical form. */
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197 static rtx
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198 form_sum (rtx x, rtx y)
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199 {
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200 machine_mode mode = GET_MODE (x);
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201 poly_int64 offset;
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202
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203 if (mode == VOIDmode)
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204 mode = GET_MODE (y);
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205
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206 if (mode == VOIDmode)
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207 mode = Pmode;
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208
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131
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209 if (poly_int_rtx_p (x, &offset))
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210 return plus_constant (mode, y, offset);
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211 else if (poly_int_rtx_p (y, &offset))
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212 return plus_constant (mode, x, offset);
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213 else if (CONSTANT_P (x))
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214 std::swap (x, y);
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215
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216 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
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217 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y));
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218
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219 /* Note that if the operands of Y are specified in the opposite
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220 order in the recursive calls below, infinite recursion will
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221 occur. */
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222 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
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223 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1));
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224
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225 /* If both constant, encapsulate sum. Otherwise, just form sum. A
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226 constant will have been placed second. */
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227 if (CONSTANT_P (x) && CONSTANT_P (y))
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228 {
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229 if (GET_CODE (x) == CONST)
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230 x = XEXP (x, 0);
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231 if (GET_CODE (y) == CONST)
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232 y = XEXP (y, 0);
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233
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234 return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y));
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235 }
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236
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237 return gen_rtx_PLUS (mode, x, y);
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238 }
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239
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240 /* Return the current substitution hard register of the elimination of
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241 HARD_REGNO. If HARD_REGNO is not eliminable, return itself. */
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242 int
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243 lra_get_elimination_hard_regno (int hard_regno)
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244 {
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245 class lra_elim_table *ep;
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111
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246
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247 if (hard_regno < 0 || hard_regno >= FIRST_PSEUDO_REGISTER)
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248 return hard_regno;
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249 if ((ep = elimination_map[hard_regno]) == NULL)
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250 return hard_regno;
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251 return ep->to;
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252 }
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253
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254 /* Return elimination which will be used for hard reg REG, NULL
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255 otherwise. */
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256 static class lra_elim_table *
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257 get_elimination (rtx reg)
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258 {
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259 int hard_regno;
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260 class lra_elim_table *ep;
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261
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262 lra_assert (REG_P (reg));
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263 if ((hard_regno = REGNO (reg)) < 0 || hard_regno >= FIRST_PSEUDO_REGISTER)
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264 return NULL;
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265 if ((ep = elimination_map[hard_regno]) != NULL)
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266 return ep->from_rtx != reg ? NULL : ep;
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131
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267 poly_int64 offset = self_elim_offsets[hard_regno];
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268 if (known_eq (offset, 0))
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111
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269 return NULL;
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270 /* This is an iteration to restore offsets just after HARD_REGNO
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271 stopped to be eliminable. */
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272 self_elim_table.from = self_elim_table.to = hard_regno;
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273 self_elim_table.from_rtx
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274 = self_elim_table.to_rtx
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275 = eliminable_reg_rtx[hard_regno];
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276 lra_assert (self_elim_table.from_rtx != NULL);
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277 self_elim_table.offset = offset;
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278 return &self_elim_table;
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279 }
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280
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281 /* Transform (subreg (plus reg const)) to (plus (subreg reg) const)
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282 when it is possible. Return X or the transformation result if the
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283 transformation is done. */
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284 static rtx
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285 move_plus_up (rtx x)
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286 {
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287 rtx subreg_reg;
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288 machine_mode x_mode, subreg_reg_mode;
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289
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290 if (GET_CODE (x) != SUBREG || !subreg_lowpart_p (x))
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291 return x;
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292 subreg_reg = SUBREG_REG (x);
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293 x_mode = GET_MODE (x);
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294 subreg_reg_mode = GET_MODE (subreg_reg);
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295 if (!paradoxical_subreg_p (x)
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296 && GET_CODE (subreg_reg) == PLUS
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297 && CONSTANT_P (XEXP (subreg_reg, 1))
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298 && GET_MODE_CLASS (x_mode) == MODE_INT
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299 && GET_MODE_CLASS (subreg_reg_mode) == MODE_INT)
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300 {
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301 rtx cst = simplify_subreg (x_mode, XEXP (subreg_reg, 1), subreg_reg_mode,
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302 subreg_lowpart_offset (x_mode,
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303 subreg_reg_mode));
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304 if (cst && CONSTANT_P (cst))
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305 return gen_rtx_PLUS (x_mode, lowpart_subreg (x_mode,
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306 XEXP (subreg_reg, 0),
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307 subreg_reg_mode), cst);
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308 }
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309 return x;
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310 }
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311
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312 /* Scan X and replace any eliminable registers (such as fp) with a
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313 replacement (such as sp) if SUBST_P, plus an offset. The offset is
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314 a change in the offset between the eliminable register and its
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315 substitution if UPDATE_P, or the full offset if FULL_P, or
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316 otherwise zero. If FULL_P, we also use the SP offsets for
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317 elimination to SP. If UPDATE_P, use UPDATE_SP_OFFSET for updating
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318 offsets of register elimnable to SP. If UPDATE_SP_OFFSET is
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319 non-zero, don't use difference of the offset and the previous
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320 offset.
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321
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322 MEM_MODE is the mode of an enclosing MEM. We need this to know how
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323 much to adjust a register for, e.g., PRE_DEC. Also, if we are
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324 inside a MEM, we are allowed to replace a sum of a hard register
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325 and the constant zero with the hard register, which we cannot do
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326 outside a MEM. In addition, we need to record the fact that a
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327 hard register is referenced outside a MEM.
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328
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329 If we make full substitution to SP for non-null INSN, add the insn
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330 sp offset. */
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331 rtx
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332 lra_eliminate_regs_1 (rtx_insn *insn, rtx x, machine_mode mem_mode,
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333 bool subst_p, bool update_p,
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131
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334 poly_int64 update_sp_offset, bool full_p)
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111
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335 {
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336 enum rtx_code code = GET_CODE (x);
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145
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337 class lra_elim_table *ep;
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111
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338 rtx new_rtx;
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339 int i, j;
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340 const char *fmt;
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341 int copied = 0;
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342
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343 lra_assert (!update_p || !full_p);
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131
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344 lra_assert (known_eq (update_sp_offset, 0)
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345 || (!subst_p && update_p && !full_p));
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111
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346 if (! current_function_decl)
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347 return x;
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348
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349 switch (code)
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350 {
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351 CASE_CONST_ANY:
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352 case CONST:
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353 case SYMBOL_REF:
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354 case CODE_LABEL:
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355 case PC:
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356 case CC0:
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357 case ASM_INPUT:
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358 case ADDR_VEC:
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359 case ADDR_DIFF_VEC:
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360 case RETURN:
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361 return x;
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362
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363 case REG:
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364 /* First handle the case where we encounter a bare hard register
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365 that is eliminable. Replace it with a PLUS. */
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366 if ((ep = get_elimination (x)) != NULL)
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367 {
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368 rtx to = subst_p ? ep->to_rtx : ep->from_rtx;
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369
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131
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370 if (maybe_ne (update_sp_offset, 0))
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111
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371 {
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372 if (ep->to_rtx == stack_pointer_rtx)
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373 return plus_constant (Pmode, to, update_sp_offset);
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374 return to;
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375 }
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376 else if (update_p)
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377 return plus_constant (Pmode, to, ep->offset - ep->previous_offset);
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378 else if (full_p)
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379 return plus_constant (Pmode, to,
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380 ep->offset
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381 - (insn != NULL_RTX
|
|
|
382 && ep->to_rtx == stack_pointer_rtx
|
|
|
383 ? lra_get_insn_recog_data (insn)->sp_offset
|
|
|
384 : 0));
|
|
|
385 else
|
|
|
386 return to;
|
|
|
387 }
|
|
|
388 return x;
|
|
|
389
|
|
|
390 case PLUS:
|
|
|
391 /* If this is the sum of an eliminable register and a constant, rework
|
|
|
392 the sum. */
|
|
|
393 if (REG_P (XEXP (x, 0)) && CONSTANT_P (XEXP (x, 1)))
|
|
|
394 {
|
|
|
395 if ((ep = get_elimination (XEXP (x, 0))) != NULL)
|
|
|
396 {
|
|
131
|
397 poly_int64 offset, curr_offset;
|
|
111
|
398 rtx to = subst_p ? ep->to_rtx : ep->from_rtx;
|
|
|
399
|
|
|
400 if (! update_p && ! full_p)
|
|
|
401 return gen_rtx_PLUS (Pmode, to, XEXP (x, 1));
|
|
|
402
|
|
131
|
403 if (maybe_ne (update_sp_offset, 0))
|
|
111
|
404 offset = ep->to_rtx == stack_pointer_rtx ? update_sp_offset : 0;
|
|
|
405 else
|
|
|
406 offset = (update_p
|
|
|
407 ? ep->offset - ep->previous_offset : ep->offset);
|
|
|
408 if (full_p && insn != NULL_RTX && ep->to_rtx == stack_pointer_rtx)
|
|
|
409 offset -= lra_get_insn_recog_data (insn)->sp_offset;
|
|
131
|
410 if (poly_int_rtx_p (XEXP (x, 1), &curr_offset)
|
|
|
411 && known_eq (curr_offset, -offset))
|
|
111
|
412 return to;
|
|
|
413 else
|
|
|
414 return gen_rtx_PLUS (Pmode, to,
|
|
|
415 plus_constant (Pmode,
|
|
|
416 XEXP (x, 1), offset));
|
|
|
417 }
|
|
|
418
|
|
|
419 /* If the hard register is not eliminable, we are done since
|
|
|
420 the other operand is a constant. */
|
|
|
421 return x;
|
|
|
422 }
|
|
|
423
|
|
|
424 /* If this is part of an address, we want to bring any constant
|
|
|
425 to the outermost PLUS. We will do this by doing hard
|
|
|
426 register replacement in our operands and seeing if a constant
|
|
|
427 shows up in one of them.
|
|
|
428
|
|
|
429 Note that there is no risk of modifying the structure of the
|
|
|
430 insn, since we only get called for its operands, thus we are
|
|
|
431 either modifying the address inside a MEM, or something like
|
|
|
432 an address operand of a load-address insn. */
|
|
|
433
|
|
|
434 {
|
|
|
435 rtx new0 = lra_eliminate_regs_1 (insn, XEXP (x, 0), mem_mode,
|
|
|
436 subst_p, update_p,
|
|
|
437 update_sp_offset, full_p);
|
|
|
438 rtx new1 = lra_eliminate_regs_1 (insn, XEXP (x, 1), mem_mode,
|
|
|
439 subst_p, update_p,
|
|
|
440 update_sp_offset, full_p);
|
|
|
441
|
|
|
442 new0 = move_plus_up (new0);
|
|
|
443 new1 = move_plus_up (new1);
|
|
|
444 if (new0 != XEXP (x, 0) || new1 != XEXP (x, 1))
|
|
|
445 return form_sum (new0, new1);
|
|
|
446 }
|
|
|
447 return x;
|
|
|
448
|
|
|
449 case MULT:
|
|
|
450 /* If this is the product of an eliminable hard register and a
|
|
|
451 constant, apply the distribute law and move the constant out
|
|
|
452 so that we have (plus (mult ..) ..). This is needed in order
|
|
|
453 to keep load-address insns valid. This case is pathological.
|
|
|
454 We ignore the possibility of overflow here. */
|
|
|
455 if (REG_P (XEXP (x, 0)) && CONST_INT_P (XEXP (x, 1))
|
|
|
456 && (ep = get_elimination (XEXP (x, 0))) != NULL)
|
|
|
457 {
|
|
|
458 rtx to = subst_p ? ep->to_rtx : ep->from_rtx;
|
|
|
459
|
|
131
|
460 if (maybe_ne (update_sp_offset, 0))
|
|
111
|
461 {
|
|
|
462 if (ep->to_rtx == stack_pointer_rtx)
|
|
|
463 return plus_constant (Pmode,
|
|
|
464 gen_rtx_MULT (Pmode, to, XEXP (x, 1)),
|
|
|
465 update_sp_offset * INTVAL (XEXP (x, 1)));
|
|
|
466 return gen_rtx_MULT (Pmode, to, XEXP (x, 1));
|
|
|
467 }
|
|
|
468 else if (update_p)
|
|
|
469 return plus_constant (Pmode,
|
|
|
470 gen_rtx_MULT (Pmode, to, XEXP (x, 1)),
|
|
|
471 (ep->offset - ep->previous_offset)
|
|
|
472 * INTVAL (XEXP (x, 1)));
|
|
|
473 else if (full_p)
|
|
|
474 {
|
|
131
|
475 poly_int64 offset = ep->offset;
|
|
111
|
476
|
|
|
477 if (insn != NULL_RTX && ep->to_rtx == stack_pointer_rtx)
|
|
|
478 offset -= lra_get_insn_recog_data (insn)->sp_offset;
|
|
|
479 return
|
|
|
480 plus_constant (Pmode,
|
|
|
481 gen_rtx_MULT (Pmode, to, XEXP (x, 1)),
|
|
|
482 offset * INTVAL (XEXP (x, 1)));
|
|
|
483 }
|
|
|
484 else
|
|
|
485 return gen_rtx_MULT (Pmode, to, XEXP (x, 1));
|
|
|
486 }
|
|
|
487
|
|
|
488 /* fall through */
|
|
|
489
|
|
|
490 case CALL:
|
|
|
491 case COMPARE:
|
|
|
492 /* See comments before PLUS about handling MINUS. */
|
|
|
493 case MINUS:
|
|
|
494 case DIV: case UDIV:
|
|
|
495 case MOD: case UMOD:
|
|
|
496 case AND: case IOR: case XOR:
|
|
|
497 case ROTATERT: case ROTATE:
|
|
|
498 case ASHIFTRT: case LSHIFTRT: case ASHIFT:
|
|
|
499 case NE: case EQ:
|
|
|
500 case GE: case GT: case GEU: case GTU:
|
|
|
501 case LE: case LT: case LEU: case LTU:
|
|
|
502 {
|
|
|
503 rtx new0 = lra_eliminate_regs_1 (insn, XEXP (x, 0), mem_mode,
|
|
|
504 subst_p, update_p,
|
|
|
505 update_sp_offset, full_p);
|
|
|
506 rtx new1 = XEXP (x, 1)
|
|
|
507 ? lra_eliminate_regs_1 (insn, XEXP (x, 1), mem_mode,
|
|
|
508 subst_p, update_p,
|
|
|
509 update_sp_offset, full_p) : 0;
|
|
|
510
|
|
|
511 if (new0 != XEXP (x, 0) || new1 != XEXP (x, 1))
|
|
|
512 return gen_rtx_fmt_ee (code, GET_MODE (x), new0, new1);
|
|
|
513 }
|
|
|
514 return x;
|
|
|
515
|
|
|
516 case EXPR_LIST:
|
|
|
517 /* If we have something in XEXP (x, 0), the usual case,
|
|
|
518 eliminate it. */
|
|
|
519 if (XEXP (x, 0))
|
|
|
520 {
|
|
|
521 new_rtx = lra_eliminate_regs_1 (insn, XEXP (x, 0), mem_mode,
|
|
|
522 subst_p, update_p,
|
|
|
523 update_sp_offset, full_p);
|
|
|
524 if (new_rtx != XEXP (x, 0))
|
|
|
525 {
|
|
|
526 /* If this is a REG_DEAD note, it is not valid anymore.
|
|
|
527 Using the eliminated version could result in creating a
|
|
|
528 REG_DEAD note for the stack or frame pointer. */
|
|
|
529 if (REG_NOTE_KIND (x) == REG_DEAD)
|
|
|
530 return (XEXP (x, 1)
|
|
|
531 ? lra_eliminate_regs_1 (insn, XEXP (x, 1), mem_mode,
|
|
|
532 subst_p, update_p,
|
|
|
533 update_sp_offset, full_p)
|
|
|
534 : NULL_RTX);
|
|
|
535
|
|
|
536 x = alloc_reg_note (REG_NOTE_KIND (x), new_rtx, XEXP (x, 1));
|
|
|
537 }
|
|
|
538 }
|
|
|
539
|
|
|
540 /* fall through */
|
|
|
541
|
|
|
542 case INSN_LIST:
|
|
|
543 case INT_LIST:
|
|
|
544 /* Now do eliminations in the rest of the chain. If this was
|
|
|
545 an EXPR_LIST, this might result in allocating more memory than is
|
|
|
546 strictly needed, but it simplifies the code. */
|
|
|
547 if (XEXP (x, 1))
|
|
|
548 {
|
|
|
549 new_rtx = lra_eliminate_regs_1 (insn, XEXP (x, 1), mem_mode,
|
|
|
550 subst_p, update_p,
|
|
|
551 update_sp_offset, full_p);
|
|
|
552 if (new_rtx != XEXP (x, 1))
|
|
|
553 return
|
|
|
554 gen_rtx_fmt_ee (GET_CODE (x), GET_MODE (x),
|
|
|
555 XEXP (x, 0), new_rtx);
|
|
|
556 }
|
|
|
557 return x;
|
|
|
558
|
|
|
559 case PRE_INC:
|
|
|
560 case POST_INC:
|
|
|
561 case PRE_DEC:
|
|
|
562 case POST_DEC:
|
|
|
563 /* We do not support elimination of a register that is modified.
|
|
|
564 elimination_effects has already make sure that this does not
|
|
|
565 happen. */
|
|
|
566 return x;
|
|
|
567
|
|
|
568 case PRE_MODIFY:
|
|
|
569 case POST_MODIFY:
|
|
|
570 /* We do not support elimination of a hard register that is
|
|
|
571 modified. LRA has already make sure that this does not
|
|
|
572 happen. The only remaining case we need to consider here is
|
|
|
573 that the increment value may be an eliminable register. */
|
|
|
574 if (GET_CODE (XEXP (x, 1)) == PLUS
|
|
|
575 && XEXP (XEXP (x, 1), 0) == XEXP (x, 0))
|
|
|
576 {
|
|
|
577 rtx new_rtx = lra_eliminate_regs_1 (insn, XEXP (XEXP (x, 1), 1),
|
|
|
578 mem_mode, subst_p, update_p,
|
|
|
579 update_sp_offset, full_p);
|
|
|
580
|
|
|
581 if (new_rtx != XEXP (XEXP (x, 1), 1))
|
|
|
582 return gen_rtx_fmt_ee (code, GET_MODE (x), XEXP (x, 0),
|
|
|
583 gen_rtx_PLUS (GET_MODE (x),
|
|
|
584 XEXP (x, 0), new_rtx));
|
|
|
585 }
|
|
|
586 return x;
|
|
|
587
|
|
|
588 case STRICT_LOW_PART:
|
|
|
589 case NEG: case NOT:
|
|
|
590 case SIGN_EXTEND: case ZERO_EXTEND:
|
|
|
591 case TRUNCATE: case FLOAT_EXTEND: case FLOAT_TRUNCATE:
|
|
|
592 case FLOAT: case FIX:
|
|
|
593 case UNSIGNED_FIX: case UNSIGNED_FLOAT:
|
|
|
594 case ABS:
|
|
|
595 case SQRT:
|
|
|
596 case FFS:
|
|
|
597 case CLZ:
|
|
|
598 case CTZ:
|
|
|
599 case POPCOUNT:
|
|
|
600 case PARITY:
|
|
|
601 case BSWAP:
|
|
|
602 new_rtx = lra_eliminate_regs_1 (insn, XEXP (x, 0), mem_mode,
|
|
|
603 subst_p, update_p,
|
|
|
604 update_sp_offset, full_p);
|
|
|
605 if (new_rtx != XEXP (x, 0))
|
|
|
606 return gen_rtx_fmt_e (code, GET_MODE (x), new_rtx);
|
|
|
607 return x;
|
|
|
608
|
|
|
609 case SUBREG:
|
|
|
610 new_rtx = lra_eliminate_regs_1 (insn, SUBREG_REG (x), mem_mode,
|
|
|
611 subst_p, update_p,
|
|
|
612 update_sp_offset, full_p);
|
|
|
613
|
|
|
614 if (new_rtx != SUBREG_REG (x))
|
|
|
615 {
|
|
|
616 if (MEM_P (new_rtx) && !paradoxical_subreg_p (x))
|
|
|
617 {
|
|
|
618 SUBREG_REG (x) = new_rtx;
|
|
|
619 alter_subreg (&x, false);
|
|
|
620 return x;
|
|
|
621 }
|
|
|
622 else if (! subst_p)
|
|
|
623 {
|
|
|
624 /* LRA can transform subregs itself. So don't call
|
|
|
625 simplify_gen_subreg until LRA transformations are
|
|
|
626 finished. Function simplify_gen_subreg can do
|
|
|
627 non-trivial transformations (like truncation) which
|
|
|
628 might make LRA work to fail. */
|
|
|
629 SUBREG_REG (x) = new_rtx;
|
|
|
630 return x;
|
|
|
631 }
|
|
|
632 else
|
|
|
633 return simplify_gen_subreg (GET_MODE (x), new_rtx,
|
|
|
634 GET_MODE (new_rtx), SUBREG_BYTE (x));
|
|
|
635 }
|
|
|
636
|
|
|
637 return x;
|
|
|
638
|
|
|
639 case MEM:
|
|
|
640 /* Our only special processing is to pass the mode of the MEM to our
|
|
|
641 recursive call and copy the flags. While we are here, handle this
|
|
|
642 case more efficiently. */
|
|
|
643 return
|
|
|
644 replace_equiv_address_nv
|
|
|
645 (x,
|
|
|
646 lra_eliminate_regs_1 (insn, XEXP (x, 0), GET_MODE (x),
|
|
|
647 subst_p, update_p, update_sp_offset, full_p));
|
|
|
648
|
|
|
649 case USE:
|
|
|
650 /* Handle insn_list USE that a call to a pure function may generate. */
|
|
|
651 new_rtx = lra_eliminate_regs_1 (insn, XEXP (x, 0), VOIDmode,
|
|
|
652 subst_p, update_p, update_sp_offset, full_p);
|
|
|
653 if (new_rtx != XEXP (x, 0))
|
|
|
654 return gen_rtx_USE (GET_MODE (x), new_rtx);
|
|
|
655 return x;
|
|
|
656
|
|
|
657 case CLOBBER:
|
|
|
658 case SET:
|
|
|
659 gcc_unreachable ();
|
|
|
660
|
|
|
661 default:
|
|
|
662 break;
|
|
|
663 }
|
|
|
664
|
|
|
665 /* Process each of our operands recursively. If any have changed, make a
|
|
|
666 copy of the rtx. */
|
|
|
667 fmt = GET_RTX_FORMAT (code);
|
|
|
668 for (i = 0; i < GET_RTX_LENGTH (code); i++, fmt++)
|
|
|
669 {
|
|
|
670 if (*fmt == 'e')
|
|
|
671 {
|
|
|
672 new_rtx = lra_eliminate_regs_1 (insn, XEXP (x, i), mem_mode,
|
|
|
673 subst_p, update_p,
|
|
|
674 update_sp_offset, full_p);
|
|
|
675 if (new_rtx != XEXP (x, i) && ! copied)
|
|
|
676 {
|
|
|
677 x = shallow_copy_rtx (x);
|
|
|
678 copied = 1;
|
|
|
679 }
|
|
|
680 XEXP (x, i) = new_rtx;
|
|
|
681 }
|
|
|
682 else if (*fmt == 'E')
|
|
|
683 {
|
|
|
684 int copied_vec = 0;
|
|
|
685 for (j = 0; j < XVECLEN (x, i); j++)
|
|
|
686 {
|
|
|
687 new_rtx = lra_eliminate_regs_1 (insn, XVECEXP (x, i, j), mem_mode,
|
|
|
688 subst_p, update_p,
|
|
|
689 update_sp_offset, full_p);
|
|
|
690 if (new_rtx != XVECEXP (x, i, j) && ! copied_vec)
|
|
|
691 {
|
|
|
692 rtvec new_v = gen_rtvec_v (XVECLEN (x, i),
|
|
|
693 XVEC (x, i)->elem);
|
|
|
694 if (! copied)
|
|
|
695 {
|
|
|
696 x = shallow_copy_rtx (x);
|
|
|
697 copied = 1;
|
|
|
698 }
|
|
|
699 XVEC (x, i) = new_v;
|
|
|
700 copied_vec = 1;
|
|
|
701 }
|
|
|
702 XVECEXP (x, i, j) = new_rtx;
|
|
|
703 }
|
|
|
704 }
|
|
|
705 }
|
|
|
706
|
|
|
707 return x;
|
|
|
708 }
|
|
|
709
|
|
|
710 /* This function is used externally in subsequent passes of GCC. It
|
|
|
711 always does a full elimination of X. */
|
|
|
712 rtx
|
|
|
713 lra_eliminate_regs (rtx x, machine_mode mem_mode,
|
|
|
714 rtx insn ATTRIBUTE_UNUSED)
|
|
|
715 {
|
|
|
716 return lra_eliminate_regs_1 (NULL, x, mem_mode, true, false, 0, true);
|
|
|
717 }
|
|
|
718
|
|
|
719 /* Stack pointer offset before the current insn relative to one at the
|
|
|
720 func start. RTL insns can change SP explicitly. We keep the
|
|
|
721 changes from one insn to another through this variable. */
|
|
131
|
722 static poly_int64 curr_sp_change;
|
|
111
|
723
|
|
|
724 /* Scan rtx X for references to elimination source or target registers
|
|
|
725 in contexts that would prevent the elimination from happening.
|
|
|
726 Update the table of eliminables to reflect the changed state.
|
|
|
727 MEM_MODE is the mode of an enclosing MEM rtx, or VOIDmode if not
|
|
|
728 within a MEM. */
|
|
|
729 static void
|
|
|
730 mark_not_eliminable (rtx x, machine_mode mem_mode)
|
|
|
731 {
|
|
|
732 enum rtx_code code = GET_CODE (x);
|
|
145
|
733 class lra_elim_table *ep;
|
|
111
|
734 int i, j;
|
|
|
735 const char *fmt;
|
|
131
|
736 poly_int64 offset = 0;
|
|
111
|
737
|
|
|
738 switch (code)
|
|
|
739 {
|
|
|
740 case PRE_INC:
|
|
|
741 case POST_INC:
|
|
|
742 case PRE_DEC:
|
|
|
743 case POST_DEC:
|
|
|
744 case POST_MODIFY:
|
|
|
745 case PRE_MODIFY:
|
|
|
746 if (XEXP (x, 0) == stack_pointer_rtx
|
|
|
747 && ((code != PRE_MODIFY && code != POST_MODIFY)
|
|
|
748 || (GET_CODE (XEXP (x, 1)) == PLUS
|
|
|
749 && XEXP (x, 0) == XEXP (XEXP (x, 1), 0)
|
|
131
|
750 && poly_int_rtx_p (XEXP (XEXP (x, 1), 1), &offset))))
|
|
111
|
751 {
|
|
131
|
752 poly_int64 size = GET_MODE_SIZE (mem_mode);
|
|
111
|
753
|
|
|
754 #ifdef PUSH_ROUNDING
|
|
|
755 /* If more bytes than MEM_MODE are pushed, account for
|
|
|
756 them. */
|
|
|
757 size = PUSH_ROUNDING (size);
|
|
|
758 #endif
|
|
|
759 if (code == PRE_DEC || code == POST_DEC)
|
|
|
760 curr_sp_change -= size;
|
|
|
761 else if (code == PRE_INC || code == POST_INC)
|
|
|
762 curr_sp_change += size;
|
|
|
763 else if (code == PRE_MODIFY || code == POST_MODIFY)
|
|
131
|
764 curr_sp_change += offset;
|
|
111
|
765 }
|
|
|
766 else if (REG_P (XEXP (x, 0))
|
|
|
767 && REGNO (XEXP (x, 0)) >= FIRST_PSEUDO_REGISTER)
|
|
|
768 {
|
|
|
769 /* If we modify the source of an elimination rule, disable
|
|
|
770 it. Do the same if it is the destination and not the
|
|
|
771 hard frame register. */
|
|
|
772 for (ep = reg_eliminate;
|
|
|
773 ep < ®_eliminate[NUM_ELIMINABLE_REGS];
|
|
|
774 ep++)
|
|
|
775 if (ep->from_rtx == XEXP (x, 0)
|
|
|
776 || (ep->to_rtx == XEXP (x, 0)
|
|
|
777 && ep->to_rtx != hard_frame_pointer_rtx))
|
|
|
778 setup_can_eliminate (ep, false);
|
|
|
779 }
|
|
|
780 return;
|
|
|
781
|
|
|
782 case USE:
|
|
|
783 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
|
|
|
784 /* If using a hard register that is the source of an eliminate
|
|
|
785 we still think can be performed, note it cannot be
|
|
|
786 performed since we don't know how this hard register is
|
|
|
787 used. */
|
|
|
788 for (ep = reg_eliminate;
|
|
|
789 ep < ®_eliminate[NUM_ELIMINABLE_REGS];
|
|
|
790 ep++)
|
|
|
791 if (ep->from_rtx == XEXP (x, 0)
|
|
|
792 && ep->to_rtx != hard_frame_pointer_rtx)
|
|
|
793 setup_can_eliminate (ep, false);
|
|
|
794 return;
|
|
|
795
|
|
|
796 case CLOBBER:
|
|
|
797 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
|
|
|
798 /* If clobbering a hard register that is the replacement
|
|
|
799 register for an elimination we still think can be
|
|
|
800 performed, note that it cannot be performed. Otherwise, we
|
|
|
801 need not be concerned about it. */
|
|
|
802 for (ep = reg_eliminate;
|
|
|
803 ep < ®_eliminate[NUM_ELIMINABLE_REGS];
|
|
|
804 ep++)
|
|
|
805 if (ep->to_rtx == XEXP (x, 0)
|
|
|
806 && ep->to_rtx != hard_frame_pointer_rtx)
|
|
|
807 setup_can_eliminate (ep, false);
|
|
|
808 return;
|
|
|
809
|
|
|
810 case SET:
|
|
|
811 if (SET_DEST (x) == stack_pointer_rtx
|
|
|
812 && GET_CODE (SET_SRC (x)) == PLUS
|
|
|
813 && XEXP (SET_SRC (x), 0) == SET_DEST (x)
|
|
131
|
814 && poly_int_rtx_p (XEXP (SET_SRC (x), 1), &offset))
|
|
111
|
815 {
|
|
131
|
816 curr_sp_change += offset;
|
|
111
|
817 return;
|
|
|
818 }
|
|
|
819 if (! REG_P (SET_DEST (x))
|
|
|
820 || REGNO (SET_DEST (x)) >= FIRST_PSEUDO_REGISTER)
|
|
|
821 mark_not_eliminable (SET_DEST (x), mem_mode);
|
|
|
822 else
|
|
|
823 {
|
|
|
824 /* See if this is setting the replacement hard register for
|
|
|
825 an elimination.
|
|
|
826
|
|
|
827 If DEST is the hard frame pointer, we do nothing because
|
|
|
828 we assume that all assignments to the frame pointer are
|
|
|
829 for non-local gotos and are being done at a time when
|
|
|
830 they are valid and do not disturb anything else. Some
|
|
|
831 machines want to eliminate a fake argument pointer (or
|
|
|
832 even a fake frame pointer) with either the real frame
|
|
|
833 pointer or the stack pointer. Assignments to the hard
|
|
|
834 frame pointer must not prevent this elimination. */
|
|
|
835 for (ep = reg_eliminate;
|
|
|
836 ep < ®_eliminate[NUM_ELIMINABLE_REGS];
|
|
|
837 ep++)
|
|
|
838 if (ep->to_rtx == SET_DEST (x)
|
|
|
839 && SET_DEST (x) != hard_frame_pointer_rtx)
|
|
|
840 setup_can_eliminate (ep, false);
|
|
|
841 }
|
|
|
842
|
|
|
843 mark_not_eliminable (SET_SRC (x), mem_mode);
|
|
|
844 return;
|
|
|
845
|
|
|
846 case MEM:
|
|
|
847 /* Our only special processing is to pass the mode of the MEM to
|
|
|
848 our recursive call. */
|
|
|
849 mark_not_eliminable (XEXP (x, 0), GET_MODE (x));
|
|
|
850 return;
|
|
|
851
|
|
|
852 default:
|
|
|
853 break;
|
|
|
854 }
|
|
|
855
|
|
|
856 fmt = GET_RTX_FORMAT (code);
|
|
|
857 for (i = 0; i < GET_RTX_LENGTH (code); i++, fmt++)
|
|
|
858 {
|
|
|
859 if (*fmt == 'e')
|
|
|
860 mark_not_eliminable (XEXP (x, i), mem_mode);
|
|
|
861 else if (*fmt == 'E')
|
|
|
862 for (j = 0; j < XVECLEN (x, i); j++)
|
|
|
863 mark_not_eliminable (XVECEXP (x, i, j), mem_mode);
|
|
|
864 }
|
|
|
865 }
|
|
|
866
|
|
|
867
|
|
|
868
|
|
|
869 /* Scan INSN and eliminate all eliminable hard registers in it.
|
|
|
870
|
|
|
871 If REPLACE_P is true, do the replacement destructively. Also
|
|
|
872 delete the insn as dead it if it is setting an eliminable register.
|
|
|
873
|
|
|
874 If REPLACE_P is false, just update the offsets while keeping the
|
|
|
875 base register the same. If FIRST_P, use the sp offset for
|
|
|
876 elimination to sp. Otherwise, use UPDATE_SP_OFFSET for this. If
|
|
|
877 UPDATE_SP_OFFSET is non-zero, don't use difference of the offset
|
|
|
878 and the previous offset. Attach the note about used elimination
|
|
|
879 for insns setting frame pointer to update elimination easy (without
|
|
|
880 parsing already generated elimination insns to find offset
|
|
|
881 previously used) in future. */
|
|
|
882
|
|
|
883 void
|
|
|
884 eliminate_regs_in_insn (rtx_insn *insn, bool replace_p, bool first_p,
|
|
131
|
885 poly_int64 update_sp_offset)
|
|
111
|
886 {
|
|
|
887 int icode = recog_memoized (insn);
|
|
|
888 rtx old_set = single_set (insn);
|
|
|
889 bool validate_p;
|
|
|
890 int i;
|
|
|
891 rtx substed_operand[MAX_RECOG_OPERANDS];
|
|
|
892 rtx orig_operand[MAX_RECOG_OPERANDS];
|
|
145
|
893 class lra_elim_table *ep;
|
|
111
|
894 rtx plus_src, plus_cst_src;
|
|
|
895 lra_insn_recog_data_t id;
|
|
|
896 struct lra_static_insn_data *static_id;
|
|
|
897
|
|
|
898 if (icode < 0 && asm_noperands (PATTERN (insn)) < 0 && ! DEBUG_INSN_P (insn))
|
|
|
899 {
|
|
|
900 lra_assert (GET_CODE (PATTERN (insn)) == USE
|
|
|
901 || GET_CODE (PATTERN (insn)) == CLOBBER
|
|
|
902 || GET_CODE (PATTERN (insn)) == ASM_INPUT);
|
|
|
903 return;
|
|
|
904 }
|
|
|
905
|
|
|
906 /* We allow one special case which happens to work on all machines we
|
|
|
907 currently support: a single set with the source or a REG_EQUAL
|
|
|
908 note being a PLUS of an eliminable register and a constant. */
|
|
|
909 plus_src = plus_cst_src = 0;
|
|
131
|
910 poly_int64 offset = 0;
|
|
111
|
911 if (old_set && REG_P (SET_DEST (old_set)))
|
|
|
912 {
|
|
|
913 if (GET_CODE (SET_SRC (old_set)) == PLUS)
|
|
|
914 plus_src = SET_SRC (old_set);
|
|
|
915 /* First see if the source is of the form (plus (...) CST). */
|
|
131
|
916 if (plus_src && poly_int_rtx_p (XEXP (plus_src, 1), &offset))
|
|
111
|
917 plus_cst_src = plus_src;
|
|
|
918 /* Check that the first operand of the PLUS is a hard reg or
|
|
|
919 the lowpart subreg of one. */
|
|
|
920 if (plus_cst_src)
|
|
|
921 {
|
|
|
922 rtx reg = XEXP (plus_cst_src, 0);
|
|
|
923
|
|
|
924 if (GET_CODE (reg) == SUBREG && subreg_lowpart_p (reg))
|
|
|
925 reg = SUBREG_REG (reg);
|
|
|
926
|
|
|
927 if (!REG_P (reg) || REGNO (reg) >= FIRST_PSEUDO_REGISTER)
|
|
|
928 plus_cst_src = 0;
|
|
|
929 }
|
|
|
930 }
|
|
|
931 if (plus_cst_src)
|
|
|
932 {
|
|
|
933 rtx reg = XEXP (plus_cst_src, 0);
|
|
|
934
|
|
|
935 if (GET_CODE (reg) == SUBREG)
|
|
|
936 reg = SUBREG_REG (reg);
|
|
|
937
|
|
|
938 if (REG_P (reg) && (ep = get_elimination (reg)) != NULL)
|
|
|
939 {
|
|
|
940 rtx to_rtx = replace_p ? ep->to_rtx : ep->from_rtx;
|
|
|
941
|
|
|
942 if (! replace_p)
|
|
|
943 {
|
|
131
|
944 if (known_eq (update_sp_offset, 0))
|
|
111
|
945 offset += (ep->offset - ep->previous_offset);
|
|
|
946 if (ep->to_rtx == stack_pointer_rtx)
|
|
|
947 {
|
|
|
948 if (first_p)
|
|
|
949 offset -= lra_get_insn_recog_data (insn)->sp_offset;
|
|
|
950 else
|
|
|
951 offset += update_sp_offset;
|
|
|
952 }
|
|
|
953 offset = trunc_int_for_mode (offset, GET_MODE (plus_cst_src));
|
|
|
954 }
|
|
|
955
|
|
|
956 if (GET_CODE (XEXP (plus_cst_src, 0)) == SUBREG)
|
|
|
957 to_rtx = gen_lowpart (GET_MODE (XEXP (plus_cst_src, 0)), to_rtx);
|
|
|
958 /* If we have a nonzero offset, and the source is already a
|
|
|
959 simple REG, the following transformation would increase
|
|
|
960 the cost of the insn by replacing a simple REG with (plus
|
|
|
961 (reg sp) CST). So try only when we already had a PLUS
|
|
|
962 before. */
|
|
131
|
963 if (known_eq (offset, 0) || plus_src)
|
|
111
|
964 {
|
|
|
965 rtx new_src = plus_constant (GET_MODE (to_rtx), to_rtx, offset);
|
|
|
966
|
|
|
967 old_set = single_set (insn);
|
|
|
968
|
|
|
969 /* First see if this insn remains valid when we make the
|
|
|
970 change. If not, try to replace the whole pattern
|
|
|
971 with a simple set (this may help if the original insn
|
|
|
972 was a PARALLEL that was only recognized as single_set
|
|
|
973 due to REG_UNUSED notes). If this isn't valid
|
|
|
974 either, keep the INSN_CODE the same and let the
|
|
|
975 constraint pass fix it up. */
|
|
|
976 if (! validate_change (insn, &SET_SRC (old_set), new_src, 0))
|
|
|
977 {
|
|
|
978 rtx new_pat = gen_rtx_SET (SET_DEST (old_set), new_src);
|
|
|
979
|
|
|
980 if (! validate_change (insn, &PATTERN (insn), new_pat, 0))
|
|
|
981 SET_SRC (old_set) = new_src;
|
|
|
982 }
|
|
|
983 lra_update_insn_recog_data (insn);
|
|
|
984 /* This can't have an effect on elimination offsets, so skip
|
|
|
985 right to the end. */
|
|
|
986 return;
|
|
|
987 }
|
|
|
988 }
|
|
|
989 }
|
|
|
990
|
|
|
991 /* Eliminate all eliminable registers occurring in operands that
|
|
|
992 can be handled by the constraint pass. */
|
|
|
993 id = lra_get_insn_recog_data (insn);
|
|
|
994 static_id = id->insn_static_data;
|
|
|
995 validate_p = false;
|
|
|
996 for (i = 0; i < static_id->n_operands; i++)
|
|
|
997 {
|
|
|
998 orig_operand[i] = *id->operand_loc[i];
|
|
|
999 substed_operand[i] = *id->operand_loc[i];
|
|
|
1000
|
|
|
1001 /* For an asm statement, every operand is eliminable. */
|
|
|
1002 if (icode < 0 || insn_data[icode].operand[i].eliminable)
|
|
|
1003 {
|
|
|
1004 /* Check for setting a hard register that we know about. */
|
|
|
1005 if (static_id->operand[i].type != OP_IN
|
|
|
1006 && REG_P (orig_operand[i]))
|
|
|
1007 {
|
|
|
1008 /* If we are assigning to a hard register that can be
|
|
|
1009 eliminated, it must be as part of a PARALLEL, since
|
|
145
|
1010 the code above handles single SETs. This reg cannot
|
|
111
|
1011 be longer eliminated -- it is forced by
|
|
|
1012 mark_not_eliminable. */
|
|
|
1013 for (ep = reg_eliminate;
|
|
|
1014 ep < ®_eliminate[NUM_ELIMINABLE_REGS];
|
|
|
1015 ep++)
|
|
|
1016 lra_assert (ep->from_rtx != orig_operand[i]
|
|
|
1017 || ! ep->can_eliminate);
|
|
|
1018 }
|
|
|
1019
|
|
|
1020 /* Companion to the above plus substitution, we can allow
|
|
|
1021 invariants as the source of a plain move. */
|
|
|
1022 substed_operand[i]
|
|
|
1023 = lra_eliminate_regs_1 (insn, *id->operand_loc[i], VOIDmode,
|
|
|
1024 replace_p, ! replace_p && ! first_p,
|
|
|
1025 update_sp_offset, first_p);
|
|
|
1026 if (substed_operand[i] != orig_operand[i])
|
|
|
1027 validate_p = true;
|
|
|
1028 }
|
|
|
1029 }
|
|
|
1030
|
|
|
1031 if (! validate_p)
|
|
|
1032 return;
|
|
|
1033
|
|
|
1034 /* Substitute the operands; the new values are in the substed_operand
|
|
|
1035 array. */
|
|
|
1036 for (i = 0; i < static_id->n_operands; i++)
|
|
|
1037 *id->operand_loc[i] = substed_operand[i];
|
|
|
1038 for (i = 0; i < static_id->n_dups; i++)
|
|
|
1039 *id->dup_loc[i] = substed_operand[(int) static_id->dup_num[i]];
|
|
|
1040
|
|
|
1041 /* If we had a move insn but now we don't, re-recognize it.
|
|
|
1042 This will cause spurious re-recognition if the old move had a
|
|
|
1043 PARALLEL since the new one still will, but we can't call
|
|
|
1044 single_set without having put new body into the insn and the
|
|
|
1045 re-recognition won't hurt in this rare case. */
|
|
145
|
1046 lra_update_insn_recog_data (insn);
|
|
111
|
1047 }
|
|
|
1048
|
|
|
1049 /* Spill pseudos which are assigned to hard registers in SET. Add
|
|
|
1050 affected insns for processing in the subsequent constraint
|
|
|
1051 pass. */
|
|
|
1052 static void
|
|
|
1053 spill_pseudos (HARD_REG_SET set)
|
|
|
1054 {
|
|
|
1055 int i;
|
|
|
1056 bitmap_head to_process;
|
|
|
1057 rtx_insn *insn;
|
|
|
1058
|
|
|
1059 if (hard_reg_set_empty_p (set))
|
|
|
1060 return;
|
|
|
1061 if (lra_dump_file != NULL)
|
|
|
1062 {
|
|
|
1063 fprintf (lra_dump_file, " Spilling non-eliminable hard regs:");
|
|
|
1064 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
|
|
|
1065 if (TEST_HARD_REG_BIT (set, i))
|
|
|
1066 fprintf (lra_dump_file, " %d", i);
|
|
|
1067 fprintf (lra_dump_file, "\n");
|
|
|
1068 }
|
|
|
1069 bitmap_initialize (&to_process, ®_obstack);
|
|
|
1070 for (i = FIRST_PSEUDO_REGISTER; i < max_reg_num (); i++)
|
|
|
1071 if (lra_reg_info[i].nrefs != 0 && reg_renumber[i] >= 0
|
|
|
1072 && overlaps_hard_reg_set_p (set,
|
|
|
1073 PSEUDO_REGNO_MODE (i), reg_renumber[i]))
|
|
|
1074 {
|
|
|
1075 if (lra_dump_file != NULL)
|
|
|
1076 fprintf (lra_dump_file, " Spilling r%d(%d)\n",
|
|
|
1077 i, reg_renumber[i]);
|
|
|
1078 reg_renumber[i] = -1;
|
|
|
1079 bitmap_ior_into (&to_process, &lra_reg_info[i].insn_bitmap);
|
|
|
1080 }
|
|
145
|
1081 lra_no_alloc_regs |= set;
|
|
111
|
1082 for (insn = get_insns (); insn != NULL_RTX; insn = NEXT_INSN (insn))
|
|
|
1083 if (bitmap_bit_p (&to_process, INSN_UID (insn)))
|
|
|
1084 {
|
|
|
1085 lra_push_insn (insn);
|
|
131
|
1086 lra_set_used_insn_alternative (insn, LRA_UNKNOWN_ALT);
|
|
111
|
1087 }
|
|
|
1088 bitmap_clear (&to_process);
|
|
|
1089 }
|
|
|
1090
|
|
|
1091 /* Update all offsets and possibility for elimination on eliminable
|
|
|
1092 registers. Spill pseudos assigned to registers which are
|
|
|
1093 uneliminable, update LRA_NO_ALLOC_REGS and ELIMINABLE_REG_SET. Add
|
|
|
1094 insns to INSNS_WITH_CHANGED_OFFSETS containing eliminable hard
|
|
|
1095 registers whose offsets should be changed. Return true if any
|
|
|
1096 elimination offset changed. */
|
|
|
1097 static bool
|
|
|
1098 update_reg_eliminate (bitmap insns_with_changed_offsets)
|
|
|
1099 {
|
|
|
1100 bool prev, result;
|
|
145
|
1101 class lra_elim_table *ep, *ep1;
|
|
111
|
1102 HARD_REG_SET temp_hard_reg_set;
|
|
|
1103
|
|
|
1104 targetm.compute_frame_layout ();
|
|
|
1105
|
|
|
1106 /* Clear self elimination offsets. */
|
|
|
1107 for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++)
|
|
|
1108 self_elim_offsets[ep->from] = 0;
|
|
|
1109 for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++)
|
|
|
1110 {
|
|
|
1111 /* If it is a currently used elimination: update the previous
|
|
|
1112 offset. */
|
|
|
1113 if (elimination_map[ep->from] == ep)
|
|
|
1114 ep->previous_offset = ep->offset;
|
|
|
1115
|
|
|
1116 prev = ep->prev_can_eliminate;
|
|
|
1117 setup_can_eliminate (ep, targetm.can_eliminate (ep->from, ep->to));
|
|
|
1118 if (ep->can_eliminate && ! prev)
|
|
|
1119 {
|
|
|
1120 /* It is possible that not eliminable register becomes
|
|
|
1121 eliminable because we took other reasons into account to
|
|
|
1122 set up eliminable regs in the initial set up. Just
|
|
|
1123 ignore new eliminable registers. */
|
|
|
1124 setup_can_eliminate (ep, false);
|
|
|
1125 continue;
|
|
|
1126 }
|
|
|
1127 if (ep->can_eliminate != prev && elimination_map[ep->from] == ep)
|
|
|
1128 {
|
|
|
1129 /* We cannot use this elimination anymore -- find another
|
|
|
1130 one. */
|
|
|
1131 if (lra_dump_file != NULL)
|
|
|
1132 fprintf (lra_dump_file,
|
|
|
1133 " Elimination %d to %d is not possible anymore\n",
|
|
|
1134 ep->from, ep->to);
|
|
|
1135 /* If after processing RTL we decides that SP can be used as
|
|
145
|
1136 a result of elimination, it cannot be changed. */
|
|
111
|
1137 gcc_assert ((ep->to_rtx != stack_pointer_rtx)
|
|
|
1138 || (ep->from < FIRST_PSEUDO_REGISTER
|
|
|
1139 && fixed_regs [ep->from]));
|
|
|
1140 /* Mark that is not eliminable anymore. */
|
|
|
1141 elimination_map[ep->from] = NULL;
|
|
|
1142 for (ep1 = ep + 1; ep1 < ®_eliminate[NUM_ELIMINABLE_REGS]; ep1++)
|
|
|
1143 if (ep1->can_eliminate && ep1->from == ep->from)
|
|
|
1144 break;
|
|
|
1145 if (ep1 < ®_eliminate[NUM_ELIMINABLE_REGS])
|
|
|
1146 {
|
|
|
1147 if (lra_dump_file != NULL)
|
|
|
1148 fprintf (lra_dump_file, " Using elimination %d to %d now\n",
|
|
|
1149 ep1->from, ep1->to);
|
|
131
|
1150 lra_assert (known_eq (ep1->previous_offset, 0));
|
|
111
|
1151 ep1->previous_offset = ep->offset;
|
|
|
1152 }
|
|
|
1153 else
|
|
|
1154 {
|
|
|
1155 /* There is no elimination anymore just use the hard
|
|
|
1156 register `from' itself. Setup self elimination
|
|
|
1157 offset to restore the original offset values. */
|
|
|
1158 if (lra_dump_file != NULL)
|
|
|
1159 fprintf (lra_dump_file, " %d is not eliminable at all\n",
|
|
|
1160 ep->from);
|
|
|
1161 self_elim_offsets[ep->from] = -ep->offset;
|
|
131
|
1162 if (maybe_ne (ep->offset, 0))
|
|
111
|
1163 bitmap_ior_into (insns_with_changed_offsets,
|
|
|
1164 &lra_reg_info[ep->from].insn_bitmap);
|
|
|
1165 }
|
|
|
1166 }
|
|
|
1167
|
|
|
1168 INITIAL_ELIMINATION_OFFSET (ep->from, ep->to, ep->offset);
|
|
|
1169 }
|
|
|
1170 setup_elimination_map ();
|
|
|
1171 result = false;
|
|
|
1172 CLEAR_HARD_REG_SET (temp_hard_reg_set);
|
|
|
1173 for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++)
|
|
|
1174 if (elimination_map[ep->from] == NULL)
|
|
131
|
1175 add_to_hard_reg_set (&temp_hard_reg_set, Pmode, ep->from);
|
|
111
|
1176 else if (elimination_map[ep->from] == ep)
|
|
|
1177 {
|
|
|
1178 /* Prevent the hard register into which we eliminate from
|
|
|
1179 the usage for pseudos. */
|
|
|
1180 if (ep->from != ep->to)
|
|
131
|
1181 add_to_hard_reg_set (&temp_hard_reg_set, Pmode, ep->to);
|
|
|
1182 if (maybe_ne (ep->previous_offset, ep->offset))
|
|
111
|
1183 {
|
|
|
1184 bitmap_ior_into (insns_with_changed_offsets,
|
|
|
1185 &lra_reg_info[ep->from].insn_bitmap);
|
|
|
1186
|
|
|
1187 /* Update offset when the eliminate offset have been
|
|
|
1188 changed. */
|
|
|
1189 lra_update_reg_val_offset (lra_reg_info[ep->from].val,
|
|
|
1190 ep->offset - ep->previous_offset);
|
|
|
1191 result = true;
|
|
|
1192 }
|
|
|
1193 }
|
|
145
|
1194 lra_no_alloc_regs |= temp_hard_reg_set;
|
|
|
1195 eliminable_regset &= ~temp_hard_reg_set;
|
|
111
|
1196 spill_pseudos (temp_hard_reg_set);
|
|
|
1197 return result;
|
|
|
1198 }
|
|
|
1199
|
|
|
1200 /* Initialize the table of hard registers to eliminate.
|
|
|
1201 Pre-condition: global flag frame_pointer_needed has been set before
|
|
|
1202 calling this function. */
|
|
|
1203 static void
|
|
|
1204 init_elim_table (void)
|
|
|
1205 {
|
|
145
|
1206 class lra_elim_table *ep;
|
|
111
|
1207 bool value_p;
|
|
|
1208 const struct elim_table_1 *ep1;
|
|
|
1209
|
|
|
1210 if (!reg_eliminate)
|
|
145
|
1211 reg_eliminate = XCNEWVEC (class lra_elim_table, NUM_ELIMINABLE_REGS);
|
|
111
|
1212
|
|
|
1213 memset (self_elim_offsets, 0, sizeof (self_elim_offsets));
|
|
|
1214 /* Initiate member values which will be never changed. */
|
|
|
1215 self_elim_table.can_eliminate = self_elim_table.prev_can_eliminate = true;
|
|
|
1216 self_elim_table.previous_offset = 0;
|
|
|
1217
|
|
|
1218 for (ep = reg_eliminate, ep1 = reg_eliminate_1;
|
|
|
1219 ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++, ep1++)
|
|
|
1220 {
|
|
|
1221 ep->offset = ep->previous_offset = 0;
|
|
|
1222 ep->from = ep1->from;
|
|
|
1223 ep->to = ep1->to;
|
|
|
1224 value_p = (targetm.can_eliminate (ep->from, ep->to)
|
|
|
1225 && ! (ep->to == STACK_POINTER_REGNUM
|
|
|
1226 && frame_pointer_needed
|
|
|
1227 && (! SUPPORTS_STACK_ALIGNMENT
|
|
|
1228 || ! stack_realign_fp)));
|
|
|
1229 setup_can_eliminate (ep, value_p);
|
|
|
1230 }
|
|
|
1231
|
|
|
1232 /* Build the FROM and TO REG rtx's. Note that code in gen_rtx_REG
|
|
|
1233 will cause, e.g., gen_rtx_REG (Pmode, STACK_POINTER_REGNUM) to
|
|
|
1234 equal stack_pointer_rtx. We depend on this. Threfore we switch
|
|
|
1235 off that we are in LRA temporarily. */
|
|
|
1236 lra_in_progress = 0;
|
|
|
1237 for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++)
|
|
|
1238 {
|
|
|
1239 ep->from_rtx = gen_rtx_REG (Pmode, ep->from);
|
|
|
1240 ep->to_rtx = gen_rtx_REG (Pmode, ep->to);
|
|
|
1241 eliminable_reg_rtx[ep->from] = ep->from_rtx;
|
|
|
1242 }
|
|
|
1243 lra_in_progress = 1;
|
|
|
1244 }
|
|
|
1245
|
|
|
1246 /* Function for initialization of elimination once per function. It
|
|
|
1247 sets up sp offset for each insn. */
|
|
|
1248 static void
|
|
|
1249 init_elimination (void)
|
|
|
1250 {
|
|
|
1251 bool stop_to_sp_elimination_p;
|
|
|
1252 basic_block bb;
|
|
|
1253 rtx_insn *insn;
|
|
145
|
1254 class lra_elim_table *ep;
|
|
111
|
1255
|
|
|
1256 init_elim_table ();
|
|
|
1257 FOR_EACH_BB_FN (bb, cfun)
|
|
|
1258 {
|
|
|
1259 curr_sp_change = 0;
|
|
|
1260 stop_to_sp_elimination_p = false;
|
|
|
1261 FOR_BB_INSNS (bb, insn)
|
|
|
1262 if (INSN_P (insn))
|
|
|
1263 {
|
|
|
1264 lra_get_insn_recog_data (insn)->sp_offset = curr_sp_change;
|
|
|
1265 if (NONDEBUG_INSN_P (insn))
|
|
|
1266 {
|
|
|
1267 mark_not_eliminable (PATTERN (insn), VOIDmode);
|
|
131
|
1268 if (maybe_ne (curr_sp_change, 0)
|
|
111
|
1269 && find_reg_note (insn, REG_LABEL_OPERAND, NULL_RTX))
|
|
|
1270 stop_to_sp_elimination_p = true;
|
|
|
1271 }
|
|
|
1272 }
|
|
|
1273 if (! frame_pointer_needed
|
|
131
|
1274 && (maybe_ne (curr_sp_change, 0) || stop_to_sp_elimination_p)
|
|
111
|
1275 && bb->succs && bb->succs->length () != 0)
|
|
|
1276 for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++)
|
|
|
1277 if (ep->to == STACK_POINTER_REGNUM)
|
|
|
1278 setup_can_eliminate (ep, false);
|
|
|
1279 }
|
|
|
1280 setup_elimination_map ();
|
|
|
1281 }
|
|
|
1282
|
|
|
1283 /* Eliminate hard reg given by its location LOC. */
|
|
|
1284 void
|
|
|
1285 lra_eliminate_reg_if_possible (rtx *loc)
|
|
|
1286 {
|
|
|
1287 int regno;
|
|
145
|
1288 class lra_elim_table *ep;
|
|
111
|
1289
|
|
|
1290 lra_assert (REG_P (*loc));
|
|
|
1291 if ((regno = REGNO (*loc)) >= FIRST_PSEUDO_REGISTER
|
|
|
1292 || ! TEST_HARD_REG_BIT (lra_no_alloc_regs, regno))
|
|
|
1293 return;
|
|
|
1294 if ((ep = get_elimination (*loc)) != NULL)
|
|
|
1295 *loc = ep->to_rtx;
|
|
|
1296 }
|
|
|
1297
|
|
|
1298 /* Do (final if FINAL_P or first if FIRST_P) elimination in INSN. Add
|
|
|
1299 the insn for subsequent processing in the constraint pass, update
|
|
|
1300 the insn info. */
|
|
|
1301 static void
|
|
|
1302 process_insn_for_elimination (rtx_insn *insn, bool final_p, bool first_p)
|
|
|
1303 {
|
|
|
1304 eliminate_regs_in_insn (insn, final_p, first_p, 0);
|
|
|
1305 if (! final_p)
|
|
|
1306 {
|
|
|
1307 /* Check that insn changed its code. This is a case when a move
|
|
|
1308 insn becomes an add insn and we do not want to process the
|
|
|
1309 insn as a move anymore. */
|
|
|
1310 int icode = recog (PATTERN (insn), insn, 0);
|
|
|
1311
|
|
|
1312 if (icode >= 0 && icode != INSN_CODE (insn))
|
|
|
1313 {
|
|
145
|
1314 if (INSN_CODE (insn) >= 0)
|
|
|
1315 /* Insn code is changed. It may change its operand type
|
|
|
1316 from IN to INOUT. Inform the subsequent assignment
|
|
|
1317 subpass about this situation. */
|
|
|
1318 check_and_force_assignment_correctness_p = true;
|
|
111
|
1319 INSN_CODE (insn) = icode;
|
|
|
1320 lra_update_insn_recog_data (insn);
|
|
|
1321 }
|
|
|
1322 lra_update_insn_regno_info (insn);
|
|
|
1323 lra_push_insn (insn);
|
|
131
|
1324 lra_set_used_insn_alternative (insn, LRA_UNKNOWN_ALT);
|
|
111
|
1325 }
|
|
|
1326 }
|
|
|
1327
|
|
|
1328 /* Entry function to do final elimination if FINAL_P or to update
|
|
|
1329 elimination register offsets (FIRST_P if we are doing it the first
|
|
|
1330 time). */
|
|
|
1331 void
|
|
|
1332 lra_eliminate (bool final_p, bool first_p)
|
|
|
1333 {
|
|
|
1334 unsigned int uid;
|
|
|
1335 bitmap_head insns_with_changed_offsets;
|
|
|
1336 bitmap_iterator bi;
|
|
145
|
1337 class lra_elim_table *ep;
|
|
111
|
1338
|
|
|
1339 gcc_assert (! final_p || ! first_p);
|
|
|
1340
|
|
|
1341 timevar_push (TV_LRA_ELIMINATE);
|
|
|
1342
|
|
|
1343 if (first_p)
|
|
|
1344 init_elimination ();
|
|
|
1345
|
|
|
1346 bitmap_initialize (&insns_with_changed_offsets, ®_obstack);
|
|
|
1347 if (final_p)
|
|
|
1348 {
|
|
|
1349 if (flag_checking)
|
|
|
1350 {
|
|
|
1351 update_reg_eliminate (&insns_with_changed_offsets);
|
|
|
1352 gcc_assert (bitmap_empty_p (&insns_with_changed_offsets));
|
|
|
1353 }
|
|
|
1354 /* We change eliminable hard registers in insns so we should do
|
|
|
1355 this for all insns containing any eliminable hard
|
|
|
1356 register. */
|
|
|
1357 for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++)
|
|
|
1358 if (elimination_map[ep->from] != NULL)
|
|
|
1359 bitmap_ior_into (&insns_with_changed_offsets,
|
|
|
1360 &lra_reg_info[ep->from].insn_bitmap);
|
|
|
1361 }
|
|
|
1362 else if (! update_reg_eliminate (&insns_with_changed_offsets))
|
|
|
1363 goto lra_eliminate_done;
|
|
|
1364 if (lra_dump_file != NULL)
|
|
|
1365 {
|
|
|
1366 fprintf (lra_dump_file, "New elimination table:\n");
|
|
|
1367 print_elim_table (lra_dump_file);
|
|
|
1368 }
|
|
|
1369 EXECUTE_IF_SET_IN_BITMAP (&insns_with_changed_offsets, 0, uid, bi)
|
|
|
1370 /* A dead insn can be deleted in process_insn_for_elimination. */
|
|
|
1371 if (lra_insn_recog_data[uid] != NULL)
|
|
|
1372 process_insn_for_elimination (lra_insn_recog_data[uid]->insn,
|
|
|
1373 final_p, first_p);
|
|
|
1374 bitmap_clear (&insns_with_changed_offsets);
|
|
|
1375
|
|
|
1376 lra_eliminate_done:
|
|
|
1377 timevar_pop (TV_LRA_ELIMINATE);
|
|
|
1378 }
|
