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annotate include/xtensa-config.h @ 158:494b0b89df80 default tip

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author Shinji KONO <kono@ie.u-ryukyu.ac.jp>
date Mon, 25 May 2020 18:13:55 +0900
parents 1830386684a0
children
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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1 /* Xtensa configuration settings.
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anatofuz
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2 Copyright (C) 2001-2020 Free Software Foundation, Inc.
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3 Contributed by Bob Wilson (bob.wilson@acm.org) at Tensilica.
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4
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5 This program is free software; you can redistribute it and/or modify
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6 it under the terms of the GNU General Public License as published by
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7 the Free Software Foundation; either version 2, or (at your option)
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8 any later version.
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9
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10 This program is distributed in the hope that it will be useful, but
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11 WITHOUT ANY WARRANTY; without even the implied warranty of
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12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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13 General Public License for more details.
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15 You should have received a copy of the GNU General Public License
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16 along with this program; if not, write to the Free Software
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17 Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
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19 #ifndef XTENSA_CONFIG_H
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20 #define XTENSA_CONFIG_H
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21
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22 /* The macros defined here match those with the same names in the Xtensa
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23 compile-time HAL (Hardware Abstraction Layer). Please refer to the
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24 Xtensa System Software Reference Manual for documentation of these
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25 macros. */
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26
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27 #undef XCHAL_HAVE_BE
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28 #define XCHAL_HAVE_BE 1
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30 #undef XCHAL_HAVE_DENSITY
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31 #define XCHAL_HAVE_DENSITY 1
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32
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33 #undef XCHAL_HAVE_CONST16
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34 #define XCHAL_HAVE_CONST16 0
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36 #undef XCHAL_HAVE_ABS
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37 #define XCHAL_HAVE_ABS 1
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39 #undef XCHAL_HAVE_ADDX
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40 #define XCHAL_HAVE_ADDX 1
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41
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42 #undef XCHAL_HAVE_L32R
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43 #define XCHAL_HAVE_L32R 1
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44
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45 #undef XSHAL_USE_ABSOLUTE_LITERALS
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46 #define XSHAL_USE_ABSOLUTE_LITERALS 0
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47
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48 #undef XSHAL_HAVE_TEXT_SECTION_LITERALS
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49 #define XSHAL_HAVE_TEXT_SECTION_LITERALS 1 /* Set if there is some memory that allows both code and literals. */
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50
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51 #undef XCHAL_HAVE_MAC16
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52 #define XCHAL_HAVE_MAC16 0
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53
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54 #undef XCHAL_HAVE_MUL16
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55 #define XCHAL_HAVE_MUL16 1
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56
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57 #undef XCHAL_HAVE_MUL32
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58 #define XCHAL_HAVE_MUL32 1
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59
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60 #undef XCHAL_HAVE_MUL32_HIGH
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61 #define XCHAL_HAVE_MUL32_HIGH 0
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62
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63 #undef XCHAL_HAVE_DIV32
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64 #define XCHAL_HAVE_DIV32 1
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66 #undef XCHAL_HAVE_NSA
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67 #define XCHAL_HAVE_NSA 1
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69 #undef XCHAL_HAVE_MINMAX
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70 #define XCHAL_HAVE_MINMAX 1
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72 #undef XCHAL_HAVE_SEXT
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73 #define XCHAL_HAVE_SEXT 1
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75 #undef XCHAL_HAVE_LOOPS
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76 #define XCHAL_HAVE_LOOPS 1
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78 #undef XCHAL_HAVE_THREADPTR
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79 #define XCHAL_HAVE_THREADPTR 1
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81 #undef XCHAL_HAVE_RELEASE_SYNC
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82 #define XCHAL_HAVE_RELEASE_SYNC 1
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83
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84 #undef XCHAL_HAVE_S32C1I
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85 #define XCHAL_HAVE_S32C1I 1
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86
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87 #undef XCHAL_HAVE_BOOLEANS
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88 #define XCHAL_HAVE_BOOLEANS 0
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89
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90 #undef XCHAL_HAVE_FP
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91 #define XCHAL_HAVE_FP 0
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92
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93 #undef XCHAL_HAVE_FP_DIV
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94 #define XCHAL_HAVE_FP_DIV 0
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95
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96 #undef XCHAL_HAVE_FP_RECIP
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97 #define XCHAL_HAVE_FP_RECIP 0
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98
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99 #undef XCHAL_HAVE_FP_SQRT
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100 #define XCHAL_HAVE_FP_SQRT 0
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101
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102 #undef XCHAL_HAVE_FP_RSQRT
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103 #define XCHAL_HAVE_FP_RSQRT 0
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104
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105 #undef XCHAL_HAVE_DFP_accel
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106 #define XCHAL_HAVE_DFP_accel 0
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107 #undef XCHAL_HAVE_WINDOWED
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108 #define XCHAL_HAVE_WINDOWED 1
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109
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110 #undef XCHAL_NUM_AREGS
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111 #define XCHAL_NUM_AREGS 32
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112
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113 #undef XCHAL_HAVE_WIDE_BRANCHES
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114 #define XCHAL_HAVE_WIDE_BRANCHES 0
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115
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116 #undef XCHAL_HAVE_PREDICTED_BRANCHES
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117 #define XCHAL_HAVE_PREDICTED_BRANCHES 0
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118
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119
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120 #undef XCHAL_ICACHE_SIZE
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121 #define XCHAL_ICACHE_SIZE 16384
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122
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123 #undef XCHAL_DCACHE_SIZE
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124 #define XCHAL_DCACHE_SIZE 16384
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125
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126 #undef XCHAL_ICACHE_LINESIZE
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127 #define XCHAL_ICACHE_LINESIZE 32
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128
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129 #undef XCHAL_DCACHE_LINESIZE
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130 #define XCHAL_DCACHE_LINESIZE 32
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131
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132 #undef XCHAL_ICACHE_LINEWIDTH
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133 #define XCHAL_ICACHE_LINEWIDTH 5
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134
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135 #undef XCHAL_DCACHE_LINEWIDTH
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136 #define XCHAL_DCACHE_LINEWIDTH 5
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137
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138 #undef XCHAL_DCACHE_IS_WRITEBACK
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139 #define XCHAL_DCACHE_IS_WRITEBACK 1
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140
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141
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142 #undef XCHAL_HAVE_MMU
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143 #define XCHAL_HAVE_MMU 1
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144
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145 #undef XCHAL_MMU_MIN_PTE_PAGE_SIZE
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146 #define XCHAL_MMU_MIN_PTE_PAGE_SIZE 12
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147
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148
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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149 #undef XCHAL_HAVE_DEBUG
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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150 #define XCHAL_HAVE_DEBUG 1
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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151
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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152 #undef XCHAL_NUM_IBREAK
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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153 #define XCHAL_NUM_IBREAK 2
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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154
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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155 #undef XCHAL_NUM_DBREAK
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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156 #define XCHAL_NUM_DBREAK 2
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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157
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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158 #undef XCHAL_DEBUGLEVEL
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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159 #define XCHAL_DEBUGLEVEL 6
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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160
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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161
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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162 #undef XCHAL_MAX_INSTRUCTION_SIZE
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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163 #define XCHAL_MAX_INSTRUCTION_SIZE 3
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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164
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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165 #undef XCHAL_INST_FETCH_WIDTH
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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166 #define XCHAL_INST_FETCH_WIDTH 4
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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167
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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168
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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169 #undef XSHAL_ABI
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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170 #undef XTHAL_ABI_WINDOWED
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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171 #undef XTHAL_ABI_CALL0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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172 #define XSHAL_ABI XTHAL_ABI_WINDOWED
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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173 #define XTHAL_ABI_WINDOWED 0
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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174 #define XTHAL_ABI_CALL0 1
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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175
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kent <kent@cr.ie.u-ryukyu.ac.jp>
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176 #endif /* !XTENSA_CONFIG_H */