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comparison gcc/config/avr/avr-devices.c @ 111:04ced10e8804

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gcc 7
author kono
date Fri, 27 Oct 2017 22:46:09 +0900
parents f6334be47118
children 84e7813d76e9
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68:561a7518be6b 111:04ced10e8804
1 /* Copyright (C) 2009, 2010, 2011 1 /* Copyright (C) 2009-2017 Free Software Foundation, Inc.
2 Free Software Foundation, Inc.
3 Contributed by Anatoly Sokolov (aesok@post.ru) 2 Contributed by Anatoly Sokolov (aesok@post.ru)
4 3
5 This file is part of GCC. 4 This file is part of GCC.
6 5
7 GCC is free software; you can redistribute it and/or modify 6 GCC is free software; you can redistribute it and/or modify
16 15
17 You should have received a copy of the GNU General Public License 16 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3. If not see 17 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */ 18 <http://www.gnu.org/licenses/>. */
20 19
20 #ifndef IN_GEN_AVR_MMCU_TEXI
21 #include "config.h" 21 #include "config.h"
22 #include "system.h" 22 #include "system.h"
23 #include "coretypes.h" 23 #include "coretypes.h"
24 #include "tm.h" 24 #include "tm.h"
25 #include "diagnostic.h"
26 #endif /* IN_GEN_AVR_MMCU_TEXI */
25 27
26 /* List of all known AVR MCU architectures. */ 28 #include "avr-arch.h"
27 29
28 const struct base_arch_s avr_arch_types[] = { 30 /* List of all known AVR MCU architectures.
29 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x0060, NULL, "avr2" }, /* unknown device specified */ 31 Order as of enum avr_arch from avr.h. */
30 { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0x0060, "__AVR_ARCH__=1", "avr1" }, 32
31 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x0060, "__AVR_ARCH__=2", "avr2" }, 33 const avr_arch_t
32 { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0x0060, "__AVR_ARCH__=25", "avr25" }, 34 avr_arch_types[] =
33 { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0x0060, "__AVR_ARCH__=3", "avr3" }, 35 {
34 { 0, 0, 1, 0, 1, 0, 0, 0, 0, 0x0060, "__AVR_ARCH__=31", "avr31" }, 36 /* unknown device specified */
35 { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0x0060, "__AVR_ARCH__=35", "avr35" }, 37 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x0060, 0, 32, NULL, AVR_MMCU_DEFAULT },
36 { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0x0060, "__AVR_ARCH__=4", "avr4" }, 38 /*
37 { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0x0060, "__AVR_ARCH__=5", "avr5" }, 39 A M J LM E E E X R T d S FPO S O A
38 { 0, 1, 1, 1, 1, 1, 0, 0, 0, 0x0060, "__AVR_ARCH__=51", "avr51" }, 40 S U M PO L L I M A I a t lMff F ff r
39 { 0, 1, 1, 1, 1, 1, 1, 0, 0, 0x0060, "__AVR_ARCH__=6", "avr6" } 41 M L P MV P P J E M N t a a s R s c
42 XW M M M G P Y a r s e e h
43 X P A D t h t t ID */
44 { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x0060, 0, 32, "1", "avr1" },
45 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0x0060, 0, 32, "2", "avr2" },
46 { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0x0060, 0, 32, "25", "avr25" },
47 { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0x0060, 0, 32, "3", "avr3" },
48 { 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0x0060, 0, 32, "31", "avr31" },
49 { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0x0060, 0, 32, "35", "avr35" },
50 { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0x0060, 0, 32, "4", "avr4" },
51 { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0x0060, 0, 32, "5", "avr5" },
52 { 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0x0060, 0, 32, "51", "avr51" },
53 { 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0x0060, 0, 32, "6", "avr6" },
54
55 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0x0040, 0x4000, 0, "100", "avrtiny" },
56 { 0, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0x2000, 0, 0, "102", "avrxmega2" },
57 { 0, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0x2000, 0x8000, 0, "103", "avrxmega3" },
58 { 0, 1, 1, 1, 1, 1, 0, 1, 0, 0, 0x2000, 0, 0, "104", "avrxmega4" },
59 { 0, 1, 1, 1, 1, 1, 0, 1, 1, 0, 0x2000, 0, 0, "105", "avrxmega5" },
60 { 0, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0x2000, 0, 0, "106", "avrxmega6" },
61 { 0, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0x2000, 0, 0, "107", "avrxmega7" }
40 }; 62 };
41 63
42 /* List of all known AVR MCU types - if updated, it has to be kept 64 const avr_arch_info_t
43 in sync in several places (FIXME: is there a better way?): 65 avr_texinfo[] =
44 - here; 66 {
45 - t-avr (MULTILIB_MATCHES); 67 { ARCH_AVR1,
46 - gas/config/tc-avr.c; 68 "This ISA is implemented by the minimal AVR core and supported "
47 - avr-libc. */ 69 "for assembler only." },
48 70 { ARCH_AVR2,
49 const struct mcu_type_s avr_mcu_types[] = { 71 "``Classic'' devices with up to 8@tie{}KiB of program memory." },
50 /* Classic, <= 8K. */ 72 { ARCH_AVR25,
51 { "avr2", ARCH_AVR2, NULL, 0, 0x0060, "s8515" }, 73 "``Classic'' devices with up to 8@tie{}KiB of program memory and with "
52 { "at90s2313", ARCH_AVR2, "__AVR_AT90S2313__", 1, 0x0060, "s2313" }, 74 "the @code{MOVW} instruction." },
53 { "at90s2323", ARCH_AVR2, "__AVR_AT90S2323__", 1, 0x0060, "s2323" }, 75 { ARCH_AVR3,
54 { "at90s2333", ARCH_AVR2, "__AVR_AT90S2333__", 1, 0x0060, "s2333" }, 76 "``Classic'' devices with 16@tie{}KiB up to 64@tie{}KiB of "
55 { "at90s2343", ARCH_AVR2, "__AVR_AT90S2343__", 1, 0x0060, "s2343" }, 77 " program memory." },
56 { "attiny22", ARCH_AVR2, "__AVR_ATtiny22__", 1, 0x0060, "tn22" }, 78 { ARCH_AVR31,
57 { "attiny26", ARCH_AVR2, "__AVR_ATtiny26__", 1, 0x0060, "tn26" }, 79 "``Classic'' devices with 128@tie{}KiB of program memory." },
58 { "at90s4414", ARCH_AVR2, "__AVR_AT90S4414__", 0, 0x0060, "s4414" }, 80 { ARCH_AVR35,
59 { "at90s4433", ARCH_AVR2, "__AVR_AT90S4433__", 1, 0x0060, "s4433" }, 81 "``Classic'' devices with 16@tie{}KiB up to 64@tie{}KiB of "
60 { "at90s4434", ARCH_AVR2, "__AVR_AT90S4434__", 0, 0x0060, "s4434" }, 82 "program memory and with the @code{MOVW} instruction." },
61 { "at90s8515", ARCH_AVR2, "__AVR_AT90S8515__", 0, 0x0060, "s8515" }, 83 { ARCH_AVR4,
62 { "at90c8534", ARCH_AVR2, "__AVR_AT90C8534__", 0, 0x0060, "c8534" }, 84 "``Enhanced'' devices with up to 8@tie{}KiB of program memory." },
63 { "at90s8535", ARCH_AVR2, "__AVR_AT90S8535__", 0, 0x0060, "s8535" }, 85 { ARCH_AVR5,
64 /* Classic + MOVW, <= 8K. */ 86 "``Enhanced'' devices with 16@tie{}KiB up to 64@tie{}KiB of "
65 { "avr25", ARCH_AVR25, NULL, 0, 0x0060, "tn85" }, 87 "program memory." },
66 { "ata6289", ARCH_AVR25, "__AVR_ATA6289__", 0, 0x0100, "a6289" }, 88 { ARCH_AVR51,
67 { "attiny13", ARCH_AVR25, "__AVR_ATtiny13__", 1, 0x0060, "tn13" }, 89 "``Enhanced'' devices with 128@tie{}KiB of program memory." },
68 { "attiny13a", ARCH_AVR25, "__AVR_ATtiny13A__", 1, 0x0060, "tn13a" }, 90 { ARCH_AVR6,
69 { "attiny2313", ARCH_AVR25, "__AVR_ATtiny2313__", 1, 0x0060, "tn2313" }, 91 "``Enhanced'' devices with 3-byte PC, i.e.@: with more than 128@tie{}KiB "
70 { "attiny2313a", ARCH_AVR25, "__AVR_ATtiny2313A__", 1, 0x0060, "tn2313a" }, 92 "of program memory." },
71 { "attiny24", ARCH_AVR25, "__AVR_ATtiny24__", 1, 0x0060, "tn24" }, 93 { ARCH_AVRTINY,
72 { "attiny24a", ARCH_AVR25, "__AVR_ATtiny24A__", 1, 0x0060, "tn24a" }, 94 "``TINY'' Tiny core devices with 512@tie{}B up to 4@tie{}KiB of "
73 { "attiny4313", ARCH_AVR25, "__AVR_ATtiny4313__", 1, 0x0060, "tn4313" }, 95 "program memory." },
74 { "attiny44", ARCH_AVR25, "__AVR_ATtiny44__", 0, 0x0060, "tn44" }, 96 { ARCH_AVRXMEGA2,
75 { "attiny44a", ARCH_AVR25, "__AVR_ATtiny44A__", 0, 0x0060, "tn44a" }, 97 "``XMEGA'' devices with more than 8@tie{}KiB and up to 64@tie{}KiB "
76 { "attiny84", ARCH_AVR25, "__AVR_ATtiny84__", 0, 0x0060, "tn84" }, 98 "of program memory." },
77 { "attiny84a", ARCH_AVR25, "__AVR_ATtiny84A__", 0, 0x0060, "tn84" }, 99 { ARCH_AVRXMEGA3,
78 { "attiny25", ARCH_AVR25, "__AVR_ATtiny25__", 1, 0x0060, "tn25" }, 100 "``XMEGA'' devices with up to 64@tie{}KiB of combined program memory "
79 { "attiny45", ARCH_AVR25, "__AVR_ATtiny45__", 0, 0x0060, "tn45" }, 101 "and RAM, and with program memory visible in the RAM address space." },
80 { "attiny85", ARCH_AVR25, "__AVR_ATtiny85__", 0, 0x0060, "tn85" }, 102 { ARCH_AVRXMEGA4,
81 { "attiny261", ARCH_AVR25, "__AVR_ATtiny261__", 1, 0x0060, "tn261" }, 103 "``XMEGA'' devices with more than 64@tie{}KiB and up to 128@tie{}KiB "
82 { "attiny261a", ARCH_AVR25, "__AVR_ATtiny261A__", 1, 0x0060, "tn261a" }, 104 "of program memory." },
83 { "attiny461", ARCH_AVR25, "__AVR_ATtiny461__", 0, 0x0060, "tn461" }, 105 { ARCH_AVRXMEGA5,
84 { "attiny461a", ARCH_AVR25, "__AVR_ATtiny461A__", 0, 0x0060, "tn461a" }, 106 "``XMEGA'' devices with more than 64@tie{}KiB and up to 128@tie{}KiB "
85 { "attiny861", ARCH_AVR25, "__AVR_ATtiny861__", 0, 0x0060, "tn861" }, 107 "of program memory and more than 64@tie{}KiB of RAM." },
86 { "attiny861a", ARCH_AVR25, "__AVR_ATtiny861A__", 0, 0x0060, "tn861a" }, 108 { ARCH_AVRXMEGA6,
87 { "attiny43u", ARCH_AVR25, "__AVR_ATtiny43U__", 0, 0x0060, "tn43u" }, 109 "``XMEGA'' devices with more than 128@tie{}KiB of program memory." },
88 { "attiny87", ARCH_AVR25, "__AVR_ATtiny87__", 0, 0x0100, "tn87" }, 110 { ARCH_AVRXMEGA7,
89 { "attiny48", ARCH_AVR25, "__AVR_ATtiny48__", 0, 0x0100, "tn48" }, 111 "``XMEGA'' devices with more than 128@tie{}KiB of program memory "
90 { "attiny88", ARCH_AVR25, "__AVR_ATtiny88__", 0, 0x0100, "tn88" }, 112 "and more than 64@tie{}KiB of RAM." }
91 { "at86rf401", ARCH_AVR25, "__AVR_AT86RF401__", 1, 0x0060, "86401" },
92 /* Classic, > 8K, <= 64K. */
93 { "avr3", ARCH_AVR3, NULL, 0, 0x0060, "43355" },
94 { "at43usb355", ARCH_AVR3, "__AVR_AT43USB355__", 0, 0x0060, "43355" },
95 { "at76c711", ARCH_AVR3, "__AVR_AT76C711__", 0, 0x0060, "76711" },
96 /* Classic, == 128K. */
97 { "avr31", ARCH_AVR31, NULL, 0, 0x0060, "m103" },
98 { "atmega103", ARCH_AVR31, "__AVR_ATmega103__", 0, 0x0060, "m103" },
99 { "at43usb320", ARCH_AVR31, "__AVR_AT43USB320__", 0, 0x0060, "43320" },
100 /* Classic + MOVW + JMP/CALL. */
101 { "avr35", ARCH_AVR35, NULL, 0, 0x0100, "usb162" },
102 { "at90usb82", ARCH_AVR35, "__AVR_AT90USB82__", 0, 0x0100, "usb82" },
103 { "at90usb162", ARCH_AVR35, "__AVR_AT90USB162__", 0, 0x0100, "usb162" },
104 { "atmega8u2", ARCH_AVR35, "__AVR_ATmega8U2__", 0, 0x0100, "m8u2" },
105 { "atmega16u2", ARCH_AVR35, "__AVR_ATmega16U2__", 0, 0x0100, "m16u2" },
106 { "atmega32u2", ARCH_AVR35, "__AVR_ATmega32U2__", 0, 0x0100, "m32u2" },
107 { "attiny167", ARCH_AVR35, "__AVR_ATtiny167__", 0, 0x0100, "tn167" },
108 /* Enhanced, <= 8K. */
109 { "avr4", ARCH_AVR4, NULL, 0, 0x0060, "m8" },
110 { "atmega8", ARCH_AVR4, "__AVR_ATmega8__", 0, 0x0060, "m8" },
111 { "atmega48", ARCH_AVR4, "__AVR_ATmega48__", 0, 0x0100, "m48" },
112 { "atmega48a", ARCH_AVR4, "__AVR_ATmega48A__", 0, 0x0100, "m48a" },
113 { "atmega48p", ARCH_AVR4, "__AVR_ATmega48P__", 0, 0x0100, "m48p" },
114 { "atmega88", ARCH_AVR4, "__AVR_ATmega88__", 0, 0x0100, "m88" },
115 { "atmega88a", ARCH_AVR4, "__AVR_ATmega88A__", 0, 0x0100, "m88a" },
116 { "atmega88p", ARCH_AVR4, "__AVR_ATmega88P__", 0, 0x0100, "m88p" },
117 { "atmega88pa", ARCH_AVR4, "__AVR_ATmega88PA__", 0, 0x0100, "m88pa" },
118 { "atmega8515", ARCH_AVR4, "__AVR_ATmega8515__", 0, 0x0060, "m8515" },
119 { "atmega8535", ARCH_AVR4, "__AVR_ATmega8535__", 0, 0x0060, "m8535" },
120 { "atmega8hva", ARCH_AVR4, "__AVR_ATmega8HVA__", 0, 0x0100, "m8hva" },
121 { "at90pwm1", ARCH_AVR4, "__AVR_AT90PWM1__", 0, 0x0100, "90pwm1" },
122 { "at90pwm2", ARCH_AVR4, "__AVR_AT90PWM2__", 0, 0x0100, "90pwm2" },
123 { "at90pwm2b", ARCH_AVR4, "__AVR_AT90PWM2B__", 0, 0x0100, "90pwm2b" },
124 { "at90pwm3", ARCH_AVR4, "__AVR_AT90PWM3__", 0, 0x0100, "90pwm3" },
125 { "at90pwm3b", ARCH_AVR4, "__AVR_AT90PWM3B__", 0, 0x0100, "90pwm3b" },
126 { "at90pwm81", ARCH_AVR4, "__AVR_AT90PWM81__", 0, 0x0100, "90pwm81" },
127 /* Enhanced, > 8K, <= 64K. */
128 { "avr5", ARCH_AVR5, NULL, 0, 0x0060, "m16" },
129 { "atmega16", ARCH_AVR5, "__AVR_ATmega16__", 0, 0x0060, "m16" },
130 { "atmega16a", ARCH_AVR5, "__AVR_ATmega16A__", 0, 0x0060, "m16a" },
131 { "atmega161", ARCH_AVR5, "__AVR_ATmega161__", 0, 0x0060, "m161" },
132 { "atmega162", ARCH_AVR5, "__AVR_ATmega162__", 0, 0x0100, "m162" },
133 { "atmega163", ARCH_AVR5, "__AVR_ATmega163__", 0, 0x0060, "m163" },
134 { "atmega164a", ARCH_AVR5, "__AVR_ATmega164A__", 0, 0x0060, "m164a" },
135 { "atmega164p", ARCH_AVR5, "__AVR_ATmega164P__", 0, 0x0100, "m164p" },
136 { "atmega165", ARCH_AVR5, "__AVR_ATmega165__", 0, 0x0100, "m165" },
137 { "atmega165a", ARCH_AVR5, "__AVR_ATmega165A__", 0, 0x0100, "m165a" },
138 { "atmega165p", ARCH_AVR5, "__AVR_ATmega165P__", 0, 0x0100, "m165p" },
139 { "atmega168", ARCH_AVR5, "__AVR_ATmega168__", 0, 0x0100, "m168" },
140 { "atmega168a", ARCH_AVR5, "__AVR_ATmega168A__", 0, 0x0100, "m168a" },
141 { "atmega168p", ARCH_AVR5, "__AVR_ATmega168P__", 0, 0x0100, "m168p" },
142 { "atmega169", ARCH_AVR5, "__AVR_ATmega169__", 0, 0x0100, "m169" },
143 { "atmega169a", ARCH_AVR5, "__AVR_ATmega169A__", 0, 0x0100, "m169a" },
144 { "atmega169p", ARCH_AVR5, "__AVR_ATmega169P__", 0, 0x0100, "m169p" },
145 { "atmega169pa", ARCH_AVR5, "__AVR_ATmega169PA__", 0, 0x0100, "m169pa" },
146 { "atmega32", ARCH_AVR5, "__AVR_ATmega32__", 0, 0x0060, "m32" },
147 { "atmega323", ARCH_AVR5, "__AVR_ATmega323__", 0, 0x0060, "m323" },
148 { "atmega324a", ARCH_AVR5, "__AVR_ATmega324A__", 0, 0x0100, "m324a" },
149 { "atmega324p", ARCH_AVR5, "__AVR_ATmega324P__", 0, 0x0100, "m324p" },
150 { "atmega324pa", ARCH_AVR5, "__AVR_ATmega324PA__", 0, 0x0100, "m324pa" },
151 { "atmega325", ARCH_AVR5, "__AVR_ATmega325__", 0, 0x0100, "m325" },
152 { "atmega325a", ARCH_AVR5, "__AVR_ATmega325A__", 0, 0x0100, "m325a" },
153 { "atmega325p", ARCH_AVR5, "__AVR_ATmega325P__", 0, 0x0100, "m325p" },
154 { "atmega3250", ARCH_AVR5, "__AVR_ATmega3250__", 0, 0x0100, "m3250" },
155 { "atmega3250a", ARCH_AVR5, "__AVR_ATmega3250A__", 0, 0x0100, "m3250a" },
156 { "atmega3250p", ARCH_AVR5, "__AVR_ATmega3250P__", 0, 0x0100, "m3250p" },
157 { "atmega328", ARCH_AVR5, "__AVR_ATmega328__", 0, 0x0100, "m328" },
158 { "atmega328p", ARCH_AVR5, "__AVR_ATmega328P__", 0, 0x0100, "m328p" },
159 { "atmega329", ARCH_AVR5, "__AVR_ATmega329__", 0, 0x0100, "m329" },
160 { "atmega329a", ARCH_AVR5, "__AVR_ATmega329A__", 0, 0x0100, "m329a" },
161 { "atmega329p", ARCH_AVR5, "__AVR_ATmega329P__", 0, 0x0100, "m329p" },
162 { "atmega329pa", ARCH_AVR5, "__AVR_ATmega329PA__", 0, 0x0100, "m329pa" },
163 { "atmega3290", ARCH_AVR5, "__AVR_ATmega3290__", 0, 0x0100, "m3290" },
164 { "atmega3290a", ARCH_AVR5, "__AVR_ATmega3290A__", 0, 0x0100, "m3290a" },
165 { "atmega3290p", ARCH_AVR5, "__AVR_ATmega3290P__", 0, 0x0100, "m3290p" },
166 { "atmega406", ARCH_AVR5, "__AVR_ATmega406__", 0, 0x0100, "m406" },
167 { "atmega64", ARCH_AVR5, "__AVR_ATmega64__", 0, 0x0100, "m64" },
168 { "atmega640", ARCH_AVR5, "__AVR_ATmega640__", 0, 0x0200, "m640" },
169 { "atmega644", ARCH_AVR5, "__AVR_ATmega644__", 0, 0x0100, "m644" },
170 { "atmega644a", ARCH_AVR5, "__AVR_ATmega644A__", 0, 0x0100, "m644a" },
171 { "atmega644p", ARCH_AVR5, "__AVR_ATmega644P__", 0, 0x0100, "m644p" },
172 { "atmega644pa", ARCH_AVR5, "__AVR_ATmega644PA__", 0, 0x0100, "m644pa" },
173 { "atmega645", ARCH_AVR5, "__AVR_ATmega645__", 0, 0x0100, "m645" },
174 { "atmega645a", ARCH_AVR5, "__AVR_ATmega645A__", 0, 0x0100, "m645a" },
175 { "atmega645p", ARCH_AVR5, "__AVR_ATmega645P__", 0, 0x0100, "m645p" },
176 { "atmega6450", ARCH_AVR5, "__AVR_ATmega6450__", 0, 0x0100, "m6450" },
177 { "atmega6450a", ARCH_AVR5, "__AVR_ATmega6450A__", 0, 0x0100, "m6450a" },
178 { "atmega6450p", ARCH_AVR5, "__AVR_ATmega6450P__", 0, 0x0100, "m6450p" },
179 { "atmega649", ARCH_AVR5, "__AVR_ATmega649__", 0, 0x0100, "m649" },
180 { "atmega649a", ARCH_AVR5, "__AVR_ATmega649A__", 0, 0x0100, "m649a" },
181 { "atmega649p", ARCH_AVR5, "__AVR_ATmega649P__", 0, 0x0100, "m649p" },
182 { "atmega6490", ARCH_AVR5, "__AVR_ATmega6490__", 0, 0x0100, "m6490" },
183 { "atmega16hva", ARCH_AVR5, "__AVR_ATmega16HVA__", 0, 0x0100, "m16hva" },
184 { "atmega16hva2", ARCH_AVR5, "__AVR_ATmega16HVA2__", 0, 0x0100, "m16hva2" },
185 { "atmega16hvb", ARCH_AVR5, "__AVR_ATmega16HVB__", 0, 0x0100, "m16hvb" },
186 { "atmega32hvb", ARCH_AVR5, "__AVR_ATmega32HVB__", 0, 0x0100, "m32hvb" },
187 { "atmega64hve", ARCH_AVR5, "__AVR_ATmega64HVE__", 0, 0x0100, "m64hve" },
188 { "at90can32", ARCH_AVR5, "__AVR_AT90CAN32__", 0, 0x0100, "can32" },
189 { "at90can64", ARCH_AVR5, "__AVR_AT90CAN64__", 0, 0x0100, "can64" },
190 { "at90pwm216", ARCH_AVR5, "__AVR_AT90PWM216__", 0, 0x0100, "90pwm216" },
191 { "at90pwm316", ARCH_AVR5, "__AVR_AT90PWM316__", 0, 0x0100, "90pwm316" },
192 { "atmega32c1", ARCH_AVR5, "__AVR_ATmega32C1__", 0, 0x0100, "m32c1" },
193 { "atmega64c1", ARCH_AVR5, "__AVR_ATmega64C1__", 0, 0x0100, "m64c1" },
194 { "atmega16m1", ARCH_AVR5, "__AVR_ATmega16M1__", 0, 0x0100, "m16m1" },
195 { "atmega32m1", ARCH_AVR5, "__AVR_ATmega32M1__", 0, 0x0100, "m32m1" },
196 { "atmega64m1", ARCH_AVR5, "__AVR_ATmega64M1__", 0, 0x0100, "m64m1" },
197 { "atmega16u4", ARCH_AVR5, "__AVR_ATmega16U4__", 0, 0x0100, "m16u4" },
198 { "atmega32u4", ARCH_AVR5, "__AVR_ATmega32U4__", 0, 0x0100, "m32u4" },
199 { "atmega32u6", ARCH_AVR5, "__AVR_ATmega32U6__", 0, 0x0100, "m32u6" },
200 { "at90scr100", ARCH_AVR5, "__AVR_AT90SCR100__", 0, 0x0100, "90scr100" },
201 { "at90usb646", ARCH_AVR5, "__AVR_AT90USB646__", 0, 0x0100, "usb646" },
202 { "at90usb647", ARCH_AVR5, "__AVR_AT90USB647__", 0, 0x0100, "usb647" },
203 { "at94k", ARCH_AVR5, "__AVR_AT94K__", 0, 0x0060, "at94k" },
204 { "m3000", ARCH_AVR5, "__AVR_M3000__", 0, 0x1000, "m3000" },
205 /* Enhanced, == 128K. */
206 { "avr51", ARCH_AVR51, NULL, 0, 0x0100, "m128" },
207 { "atmega128", ARCH_AVR51, "__AVR_ATmega128__", 0, 0x0100, "m128" },
208 { "atmega1280", ARCH_AVR51, "__AVR_ATmega1280__", 0, 0x0200, "m1280" },
209 { "atmega1281", ARCH_AVR51, "__AVR_ATmega1281__", 0, 0x0200, "m1281" },
210 { "atmega1284p", ARCH_AVR51, "__AVR_ATmega1284P__", 0, 0x0100, "m1284p" },
211 { "atmega128rfa1", ARCH_AVR51, "__AVR_ATmega128RFA1__", 0, 0x0200, "m128rfa1" },
212 { "at90can128", ARCH_AVR51, "__AVR_AT90CAN128__", 0, 0x0100, "can128" },
213 { "at90usb1286", ARCH_AVR51, "__AVR_AT90USB1286__", 0, 0x0100, "usb1286" },
214 { "at90usb1287", ARCH_AVR51, "__AVR_AT90USB1287__", 0, 0x0100, "usb1286" },
215 /* 3-Byte PC. */
216 { "avr6", ARCH_AVR6, NULL, 0, 0x0200, "m2561" },
217 { "atmega2560", ARCH_AVR6, "__AVR_ATmega2560__", 0, 0x0200, "m2560" },
218 { "atmega2561", ARCH_AVR6, "__AVR_ATmega2561__", 0, 0x0200, "m2561" },
219 /* Assembler only. */
220 { "avr1", ARCH_AVR1, NULL, 0, 0x0060, "s1200" },
221 { "at90s1200", ARCH_AVR1, "__AVR_AT90S1200__", 0, 0x0060, "s1200" },
222 { "attiny11", ARCH_AVR1, "__AVR_ATtiny11__", 0, 0x0060, "tn11" },
223 { "attiny12", ARCH_AVR1, "__AVR_ATtiny12__", 0, 0x0060, "tn12" },
224 { "attiny15", ARCH_AVR1, "__AVR_ATtiny15__", 0, 0x0060, "tn15" },
225 { "attiny28", ARCH_AVR1, "__AVR_ATtiny28__", 0, 0x0060, "tn28" },
226 /* End of list. */
227 { NULL, ARCH_UNKNOWN, NULL, 0, 0, NULL }
228 }; 113 };
229 114
115 const avr_mcu_t
116 avr_mcu_types[] =
117 {
118 #define AVR_MCU(NAME, ARCH, DEV_ATTRIBUTE, MACRO, DATA_SEC, TEXT_SEC, FLASH_SIZE)\
119 { NAME, ARCH, DEV_ATTRIBUTE, MACRO, DATA_SEC, TEXT_SEC, FLASH_SIZE },
120 #include "avr-mcus.def"
121 #undef AVR_MCU
122 /* End of list. */
123 { NULL, ARCH_UNKNOWN, AVR_ISA_NONE, NULL, 0, 0, 0 }
124 };
125
126
127
128
129 #ifndef IN_GEN_AVR_MMCU_TEXI
130
131 static char*
132 avr_archs_str (void)
133 {
134 char *archs = concat ("", NULL);
135
136 // Build of core architectures' names.
137
138 for (const avr_mcu_t *mcu = avr_mcu_types; mcu->name; mcu++)
139 if (!mcu->macro)
140 archs = concat (archs, " ", avr_arch_types[mcu->arch_id].name, NULL);
141
142 return archs;
143 }
144
145
146 void
147 avr_inform_core_architectures (void)
148 {
149 char *archs = avr_archs_str ();
150 inform (input_location, "supported core architectures:%s", archs);
151 free (archs);
152 }
153
154 #endif // IN_GEN_AVR_MMCU_TEXI