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comparison gcc/config/avr/avr.h @ 111:04ced10e8804

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gcc 7
author kono
date Fri, 27 Oct 2017 22:46:09 +0900
parents f6334be47118
children 84e7813d76e9
comparison
equal deleted inserted replaced
68:561a7518be6b 111:04ced10e8804
1 /* Definitions of target machine for GNU compiler, 1 /* Definitions of target machine for GNU compiler,
2 for ATMEL AVR at90s8515, ATmega103/103L, ATmega603/603L microcontrollers. 2 for ATMEL AVR at90s8515, ATmega103/103L, ATmega603/603L microcontrollers.
3 Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 3 Copyright (C) 1998-2017 Free Software Foundation, Inc.
4 2008, 2009, 2010, 2011
5 Free Software Foundation, Inc.
6 Contributed by Denis Chertykov (chertykov@gmail.com) 4 Contributed by Denis Chertykov (chertykov@gmail.com)
7 5
8 This file is part of GCC. 6 This file is part of GCC.
9 7
10 GCC is free software; you can redistribute it and/or modify 8 GCC is free software; you can redistribute it and/or modify
19 17
20 You should have received a copy of the GNU General Public License 18 You should have received a copy of the GNU General Public License
21 along with GCC; see the file COPYING3. If not see 19 along with GCC; see the file COPYING3. If not see
22 <http://www.gnu.org/licenses/>. */ 20 <http://www.gnu.org/licenses/>. */
23 21
24 /* Names to predefine in the preprocessor for this target machine. */ 22 typedef struct
25
26 struct base_arch_s {
27 /* Assembler only. */
28 int asm_only;
29
30 /* Core have 'MUL*' instructions. */
31 int have_mul;
32
33 /* Core have 'CALL' and 'JMP' instructions. */
34 int have_jmp_call;
35
36 /* Core have 'MOVW' and 'LPM Rx,Z' instructions. */
37 int have_movw_lpmx;
38
39 /* Core have 'ELPM' instructions. */
40 int have_elpm;
41
42 /* Core have 'ELPM Rx,Z' instructions. */
43 int have_elpmx;
44
45 /* Core have 'EICALL' and 'EIJMP' instructions. */
46 int have_eijmp_eicall;
47
48 /* Reserved for xmega architecture. */
49 int reserved;
50
51 /* Reserved for xmega architecture. */
52 int reserved2;
53
54 /* Default start of data section address for architecture. */
55 int default_data_section_start;
56
57 const char *const macro;
58
59 /* Architecture name. */
60 const char *const arch_name;
61 };
62
63 /* These names are used as the index into the avr_arch_types[] table
64 above. */
65
66 enum avr_arch
67 { 23 {
68 ARCH_UNKNOWN, 24 /* Id of the address space as used in c_register_addr_space */
69 ARCH_AVR1, 25 unsigned char id;
70 ARCH_AVR2, 26
71 ARCH_AVR25, 27 /* Flavour of memory: 0 = RAM, 1 = Flash */
72 ARCH_AVR3, 28 int memory_class;
73 ARCH_AVR31, 29
74 ARCH_AVR35, 30 /* Width of pointer (in bytes) */
75 ARCH_AVR4, 31 int pointer_size;
76 ARCH_AVR5, 32
77 ARCH_AVR51, 33 /* Name of the address space as visible to the user */
78 ARCH_AVR6 34 const char *name;
79 }; 35
80 36 /* Segment (i.e. 64k memory chunk) number. */
81 struct mcu_type_s { 37 int segment;
82 /* Device name. */ 38
83 const char *const name; 39 /* Section prefix, e.g. ".progmem1.data" */
84 40 const char *section_name;
85 /* Index in avr_arch_types[]. */ 41 } avr_addrspace_t;
86 int arch; 42
87 43 extern const avr_addrspace_t avr_addrspace[];
88 /* Must lie outside user's namespace. NULL == no macro. */ 44
89 const char *const macro; 45 /* Known address spaces */
90 46
91 /* Stack pointer have 8 bits width. */ 47 enum
92 int short_sp; 48 {
93 49 ADDR_SPACE_RAM, /* ADDR_SPACE_GENERIC */
94 /* Start of data section. */ 50 ADDR_SPACE_FLASH,
95 int data_section_start; 51 ADDR_SPACE_FLASH1,
96 52 ADDR_SPACE_FLASH2,
97 /* Name of device library. */ 53 ADDR_SPACE_FLASH3,
98 const char *const library_name; 54 ADDR_SPACE_FLASH4,
99 }; 55 ADDR_SPACE_FLASH5,
100 56 ADDR_SPACE_MEMX,
101 /* Preprocessor macros to define depending on MCU type. */ 57 /* Sentinel */
102 extern const char *avr_extra_arch_macro; 58 ADDR_SPACE_COUNT
103 extern const struct base_arch_s *avr_current_arch; 59 };
104 extern const struct mcu_type_s *avr_current_device;
105 extern const struct mcu_type_s avr_mcu_types[];
106 extern const struct base_arch_s avr_arch_types[];
107 60
108 #define TARGET_CPU_CPP_BUILTINS() avr_cpu_cpp_builtins (pfile) 61 #define TARGET_CPU_CPP_BUILTINS() avr_cpu_cpp_builtins (pfile)
109 62
110 #if !defined(IN_LIBGCC2) && !defined(IN_TARGET_LIBS) 63 #define AVR_SHORT_CALLS (TARGET_SHORT_CALLS \
111 extern GTY(()) section *progmem_section; 64 && avr_arch == &avr_arch_types[ARCH_AVRXMEGA3])
112 #endif 65 #define AVR_HAVE_JMP_CALL (avr_arch->have_jmp_call && ! AVR_SHORT_CALLS)
113 66 #define AVR_HAVE_MUL (avr_arch->have_mul)
114 #define AVR_HAVE_JMP_CALL (avr_current_arch->have_jmp_call && !TARGET_SHORT_CALLS) 67 #define AVR_HAVE_MOVW (avr_arch->have_movw_lpmx)
115 #define AVR_HAVE_MUL (avr_current_arch->have_mul) 68 #define AVR_HAVE_LPM (!AVR_TINY)
116 #define AVR_HAVE_MOVW (avr_current_arch->have_movw_lpmx) 69 #define AVR_HAVE_LPMX (avr_arch->have_movw_lpmx)
117 #define AVR_HAVE_LPMX (avr_current_arch->have_movw_lpmx) 70 #define AVR_HAVE_ELPM (avr_arch->have_elpm)
118 #define AVR_HAVE_RAMPZ (avr_current_arch->have_elpm) 71 #define AVR_HAVE_ELPMX (avr_arch->have_elpmx)
119 #define AVR_HAVE_EIJMP_EICALL (avr_current_arch->have_eijmp_eicall) 72 #define AVR_HAVE_RAMPD (avr_arch->have_rampd)
120 #define AVR_HAVE_8BIT_SP (avr_current_device->short_sp || TARGET_TINY_STACK) 73 #define AVR_HAVE_RAMPX (avr_arch->have_rampd)
74 #define AVR_HAVE_RAMPY (avr_arch->have_rampd)
75 #define AVR_HAVE_RAMPZ (avr_arch->have_elpm \
76 || avr_arch->have_rampd)
77 #define AVR_HAVE_EIJMP_EICALL (avr_arch->have_eijmp_eicall)
78
79 /* Handling of 8-bit SP versus 16-bit SP is as follows:
80
81 FIXME: DRIVER_SELF_SPECS has changed.
82 -msp8 is used internally to select the right multilib for targets with
83 8-bit SP. -msp8 is set automatically by DRIVER_SELF_SPECS for devices
84 with 8-bit SP or by multilib generation machinery. If a frame pointer is
85 needed and SP is only 8 bits wide, SP is zero-extended to get FP.
86
87 TARGET_TINY_STACK is triggered by -mtiny-stack which is a user option.
88 This option has no effect on multilib selection. It serves to save some
89 bytes on 16-bit SP devices by only changing SP_L and leaving SP_H alone.
90
91 These two properties are reflected by built-in macros __AVR_SP8__ resp.
92 __AVR_HAVE_8BIT_SP__ and __AVR_HAVE_16BIT_SP__. During multilib generation
93 there is always __AVR_SP8__ == __AVR_HAVE_8BIT_SP__. */
94
95 #define AVR_HAVE_8BIT_SP \
96 (TARGET_TINY_STACK || avr_sp8)
97
98 #define AVR_HAVE_SPH (!avr_sp8)
121 99
122 #define AVR_2_BYTE_PC (!AVR_HAVE_EIJMP_EICALL) 100 #define AVR_2_BYTE_PC (!AVR_HAVE_EIJMP_EICALL)
123 #define AVR_3_BYTE_PC (AVR_HAVE_EIJMP_EICALL) 101 #define AVR_3_BYTE_PC (AVR_HAVE_EIJMP_EICALL)
124 102
125 #define TARGET_VERSION fprintf (stderr, " (GNU assembler syntax)"); 103 #define AVR_XMEGA (avr_arch->xmega_p)
104 #define AVR_TINY (avr_arch->tiny_p)
126 105
127 #define BITS_BIG_ENDIAN 0 106 #define BITS_BIG_ENDIAN 0
128 #define BYTES_BIG_ENDIAN 0 107 #define BYTES_BIG_ENDIAN 0
129 #define WORDS_BIG_ENDIAN 0 108 #define WORDS_BIG_ENDIAN 0
130 109
150 #define EMPTY_FIELD_BOUNDARY 8 129 #define EMPTY_FIELD_BOUNDARY 8
151 130
152 /* No data type wants to be aligned rounder than this. */ 131 /* No data type wants to be aligned rounder than this. */
153 #define BIGGEST_ALIGNMENT 8 132 #define BIGGEST_ALIGNMENT 8
154 133
155 #define MAX_OFILE_ALIGNMENT (32768 * 8)
156
157 #define TARGET_VTABLE_ENTRY_ALIGN 8 134 #define TARGET_VTABLE_ENTRY_ALIGN 8
158 135
159 #define STRICT_ALIGNMENT 0 136 #define STRICT_ALIGNMENT 0
160 137
161 #define INT_TYPE_SIZE (TARGET_INT8 ? 8 : 16) 138 #define INT_TYPE_SIZE (TARGET_INT8 ? 8 : 16)
163 #define LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 16 : 32) 140 #define LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 16 : 32)
164 #define LONG_LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 32 : 64) 141 #define LONG_LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 32 : 64)
165 #define FLOAT_TYPE_SIZE 32 142 #define FLOAT_TYPE_SIZE 32
166 #define DOUBLE_TYPE_SIZE 32 143 #define DOUBLE_TYPE_SIZE 32
167 #define LONG_DOUBLE_TYPE_SIZE 32 144 #define LONG_DOUBLE_TYPE_SIZE 32
145 #define LONG_LONG_ACCUM_TYPE_SIZE 64
168 146
169 #define DEFAULT_SIGNED_CHAR 1 147 #define DEFAULT_SIGNED_CHAR 1
170 148
171 #define SIZE_TYPE (INT_TYPE_SIZE == 8 ? "long unsigned int" : "unsigned int") 149 #define SIZE_TYPE (INT_TYPE_SIZE == 8 ? "long unsigned int" : "unsigned int")
172 #define PTRDIFF_TYPE (INT_TYPE_SIZE == 8 ? "long int" :"int") 150 #define PTRDIFF_TYPE (INT_TYPE_SIZE == 8 ? "long int" :"int")
226 17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2, \ 204 17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2, \
227 0,1, \ 205 0,1, \
228 32,33,34,35 \ 206 32,33,34,35 \
229 } 207 }
230 208
231 #define ADJUST_REG_ALLOC_ORDER order_regs_for_local_alloc () 209 #define ADJUST_REG_ALLOC_ORDER avr_adjust_reg_alloc_order()
232 210
233
234 #define HARD_REGNO_NREGS(REGNO, MODE) ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
235
236 #define HARD_REGNO_MODE_OK(REGNO, MODE) avr_hard_regno_mode_ok(REGNO, MODE)
237
238 #define MODES_TIEABLE_P(MODE1, MODE2) 1
239 211
240 enum reg_class { 212 enum reg_class {
241 NO_REGS, 213 NO_REGS,
242 R0_REG, /* r0 */ 214 R0_REG, /* r0 */
243 POINTER_X_REGS, /* r26 - r27 */ 215 POINTER_X_REGS, /* r26 - r27 */
274 "ALL_REGS" } 246 "ALL_REGS" }
275 247
276 #define REG_CLASS_CONTENTS { \ 248 #define REG_CLASS_CONTENTS { \
277 {0x00000000,0x00000000}, /* NO_REGS */ \ 249 {0x00000000,0x00000000}, /* NO_REGS */ \
278 {0x00000001,0x00000000}, /* R0_REG */ \ 250 {0x00000001,0x00000000}, /* R0_REG */ \
279 {3 << REG_X,0x00000000}, /* POINTER_X_REGS, r26 - r27 */ \ 251 {3u << REG_X,0x00000000}, /* POINTER_X_REGS, r26 - r27 */ \
280 {3 << REG_Y,0x00000000}, /* POINTER_Y_REGS, r28 - r29 */ \ 252 {3u << REG_Y,0x00000000}, /* POINTER_Y_REGS, r28 - r29 */ \
281 {3 << REG_Z,0x00000000}, /* POINTER_Z_REGS, r30 - r31 */ \ 253 {3u << REG_Z,0x00000000}, /* POINTER_Z_REGS, r30 - r31 */ \
282 {0x00000000,0x00000003}, /* STACK_REG, STACK */ \ 254 {0x00000000,0x00000003}, /* STACK_REG, STACK */ \
283 {(3 << REG_Y) | (3 << REG_Z), \ 255 {(3u << REG_Y) | (3u << REG_Z), \
284 0x00000000}, /* BASE_POINTER_REGS, r28 - r31 */ \ 256 0x00000000}, /* BASE_POINTER_REGS, r28 - r31 */ \
285 {(3 << REG_X) | (3 << REG_Y) | (3 << REG_Z), \ 257 {(3u << REG_X) | (3u << REG_Y) | (3u << REG_Z), \
286 0x00000000}, /* POINTER_REGS, r26 - r31 */ \ 258 0x00000000}, /* POINTER_REGS, r26 - r31 */ \
287 {(3 << REG_X) | (3 << REG_Y) | (3 << REG_Z) | (3 << REG_W), \ 259 {(3u << REG_X) | (3u << REG_Y) | (3u << REG_Z) | (3u << REG_W), \
288 0x00000000}, /* ADDW_REGS, r24 - r31 */ \ 260 0x00000000}, /* ADDW_REGS, r24 - r31 */ \
289 {0x00ff0000,0x00000000}, /* SIMPLE_LD_REGS r16 - r23 */ \ 261 {0x00ff0000,0x00000000}, /* SIMPLE_LD_REGS r16 - r23 */ \
290 {(3 << REG_X)|(3 << REG_Y)|(3 << REG_Z)|(3 << REG_W)|(0xff << 16), \ 262 {(3u << REG_X)|(3u << REG_Y)|(3u << REG_Z)|(3u << REG_W)|(0xffu << 16),\
291 0x00000000}, /* LD_REGS, r16 - r31 */ \ 263 0x00000000}, /* LD_REGS, r16 - r31 */ \
292 {0x0000ffff,0x00000000}, /* NO_LD_REGS r0 - r15 */ \ 264 {0x0000ffff,0x00000000}, /* NO_LD_REGS r0 - r15 */ \
293 {0xffffffff,0x00000000}, /* GENERAL_REGS, r0 - r31 */ \ 265 {0xffffffff,0x00000000}, /* GENERAL_REGS, r0 - r31 */ \
294 {0xffffffff,0x00000003} /* ALL_REGS */ \ 266 {0xffffffff,0x00000003} /* ALL_REGS */ \
295 } 267 }
296 268
297 #define REGNO_REG_CLASS(R) avr_regno_reg_class(R) 269 #define REGNO_REG_CLASS(R) avr_regno_reg_class(R)
298 270
299 /* The following macro defines cover classes for Integrated Register 271 #define MODE_CODE_BASE_REG_CLASS(mode, as, outer_code, index_code) \
300 Allocator. Cover classes is a set of non-intersected register 272 avr_mode_code_base_reg_class (mode, as, outer_code, index_code)
301 classes covering all hard registers used for register allocation
302 purpose. Any move between two registers of a cover class should be
303 cheaper than load or store of the registers. The macro value is
304 array of register classes with LIM_REG_CLASSES used as the end
305 marker. */
306
307 #define IRA_COVER_CLASSES \
308 { \
309 GENERAL_REGS, LIM_REG_CLASSES \
310 }
311
312 #define BASE_REG_CLASS (reload_completed ? BASE_POINTER_REGS : POINTER_REGS)
313 273
314 #define INDEX_REG_CLASS NO_REGS 274 #define INDEX_REG_CLASS NO_REGS
315 275
316 #define REGNO_OK_FOR_BASE_P(r) (((r) < FIRST_PSEUDO_REGISTER \ 276 #define REGNO_MODE_CODE_OK_FOR_BASE_P(num, mode, as, outer_code, index_code) \
317 && ((r) == REG_X \ 277 avr_regno_mode_code_ok_for_base_p (num, mode, as, outer_code, index_code)
318 || (r) == REG_Y \
319 || (r) == REG_Z \
320 || (r) == ARG_POINTER_REGNUM)) \
321 || (reg_renumber \
322 && (reg_renumber[r] == REG_X \
323 || reg_renumber[r] == REG_Y \
324 || reg_renumber[r] == REG_Z \
325 || (reg_renumber[r] \
326 == ARG_POINTER_REGNUM))))
327 278
328 #define REGNO_OK_FOR_INDEX_P(NUM) 0 279 #define REGNO_OK_FOR_INDEX_P(NUM) 0
329 280
330 #define TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P hook_bool_mode_true 281 #define TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P hook_bool_mode_true
331 282
332 #define CLASS_MAX_NREGS(CLASS, MODE) class_max_nregs (CLASS, MODE)
333
334 #define STACK_PUSH_CODE POST_DEC 283 #define STACK_PUSH_CODE POST_DEC
335 284
336 #define STACK_GROWS_DOWNWARD 285 #define STACK_GROWS_DOWNWARD 1
337
338 #define STARTING_FRAME_OFFSET 1
339 286
340 #define STACK_POINTER_OFFSET 1 287 #define STACK_POINTER_OFFSET 1
341 288
342 #define FIRST_PARM_OFFSET(FUNDECL) 0 289 #define FIRST_PARM_OFFSET(FUNDECL) 0
343 290
347 294
348 #define FRAME_POINTER_REGNUM REG_Y 295 #define FRAME_POINTER_REGNUM REG_Y
349 296
350 #define ARG_POINTER_REGNUM 34 297 #define ARG_POINTER_REGNUM 34
351 298
352 #define STATIC_CHAIN_REGNUM 2 299 #define STATIC_CHAIN_REGNUM ((AVR_TINY) ? 18 :2)
353
354 /* Offset from the frame pointer register value to the top of the stack. */
355 #define FRAME_POINTER_CFA_OFFSET(FNDECL) 0
356 300
357 #define ELIMINABLE_REGS { \ 301 #define ELIMINABLE_REGS { \
358 {ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \ 302 { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM }, \
359 {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM} \ 303 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM }, \
360 ,{FRAME_POINTER_REGNUM+1,STACK_POINTER_REGNUM+1}} 304 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM }, \
305 { FRAME_POINTER_REGNUM + 1, STACK_POINTER_REGNUM + 1 } }
361 306
362 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ 307 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
363 OFFSET = avr_initial_elimination_offset (FROM, TO) 308 OFFSET = avr_initial_elimination_offset (FROM, TO)
364 309
365 #define RETURN_ADDR_RTX(count, tem) avr_return_addr_rtx (count, tem) 310 #define RETURN_ADDR_RTX(count, tem) avr_return_addr_rtx (count, tem)
366 311
367 /* Don't use Push rounding. expr.c: emit_single_push_insn is broken 312 /* Don't use Push rounding. expr.c: emit_single_push_insn is broken
368 for POST_DEC targets (PR27386). */ 313 for POST_DEC targets (PR27386). */
369 /*#define PUSH_ROUNDING(NPUSHED) (NPUSHED)*/ 314 /*#define PUSH_ROUNDING(NPUSHED) (NPUSHED)*/
370 315
371 typedef struct avr_args { 316 typedef struct avr_args
372 int nregs; /* # registers available for passing */ 317 {
373 int regno; /* next available register number */ 318 /* # Registers available for passing */
319 int nregs;
320
321 /* Next available register number */
322 int regno;
374 } CUMULATIVE_ARGS; 323 } CUMULATIVE_ARGS;
375 324
376 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \ 325 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \
377 init_cumulative_args (&(CUM), FNTYPE, LIBNAME, FNDECL) 326 avr_init_cumulative_args (&(CUM), FNTYPE, LIBNAME, FNDECL)
378 327
379 #define FUNCTION_ARG_REGNO_P(r) function_arg_regno_p(r) 328 #define FUNCTION_ARG_REGNO_P(r) avr_function_arg_regno_p(r)
380
381 extern int avr_reg_order[];
382
383 #define RET_REGISTER avr_ret_register ()
384
385 #define LIBCALL_VALUE(MODE) avr_libcall_value (MODE)
386
387 #define FUNCTION_VALUE_REGNO_P(N) ((int) (N) == RET_REGISTER)
388 329
389 #define DEFAULT_PCC_STRUCT_RETURN 0 330 #define DEFAULT_PCC_STRUCT_RETURN 0
390 331
391 #define EPILOGUE_USES(REGNO) avr_epilogue_uses(REGNO) 332 #define EPILOGUE_USES(REGNO) avr_epilogue_uses(REGNO)
392 333
393 #define HAVE_POST_INCREMENT 1 334 #define HAVE_POST_INCREMENT 1
394 #define HAVE_PRE_DECREMENT 1 335 #define HAVE_PRE_DECREMENT 1
395 336
396 #define MAX_REGS_PER_ADDRESS 1 337 #define MAX_REGS_PER_ADDRESS 1
397 338
398 #define REG_OK_FOR_BASE_NOSTRICT_P(X) \ 339 #define LEGITIMIZE_RELOAD_ADDRESS(X,MODE,OPNUM,TYPE,IND_L,WIN) \
399 (REGNO (X) >= FIRST_PSEUDO_REGISTER || REG_OK_FOR_BASE_STRICT_P(X)) 340 do { \
400 341 rtx new_x = avr_legitimize_reload_address (&(X), MODE, OPNUM, TYPE, \
401 #define REG_OK_FOR_BASE_STRICT_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) 342 ADDR_TYPE (TYPE), \
402 343 IND_L, make_memloc); \
403 /* LEGITIMIZE_RELOAD_ADDRESS will allow register R26/27 to be used, where it 344 if (new_x) \
404 is no worse than normal base pointers R28/29 and R30/31. For example: 345 { \
405 If base offset is greater than 63 bytes or for R++ or --R addressing. */ 346 X = new_x; \
406 347 goto WIN; \
407 #define LEGITIMIZE_RELOAD_ADDRESS(X, MODE, OPNUM, TYPE, IND_LEVELS, WIN) \ 348 } \
408 do { \ 349 } while (0)
409 if (1&&(GET_CODE (X) == POST_INC || GET_CODE (X) == PRE_DEC)) \ 350
410 { \ 351 /* We increase branch costs after reload in order to keep basic-block
411 push_reload (XEXP (X,0), XEXP (X,0), &XEXP (X,0), &XEXP (X,0), \ 352 reordering from introducing out-of-line jumps and to prefer fall-through
412 POINTER_REGS, GET_MODE (X),GET_MODE (X) , 0, 0, \ 353 edges instead. The default branch costs are 0, mainly because otherwise
413 OPNUM, RELOAD_OTHER); \ 354 do_store_flag might come up with bloated code. */
414 goto WIN; \ 355 #define BRANCH_COST(speed_p, predictable_p) \
415 } \ 356 (avr_branch_cost + (reload_completed ? 4 : 0))
416 if (GET_CODE (X) == PLUS \
417 && REG_P (XEXP (X, 0)) \
418 && reg_equiv_constant[REGNO (XEXP (X, 0))] == 0 \
419 && GET_CODE (XEXP (X, 1)) == CONST_INT \
420 && INTVAL (XEXP (X, 1)) >= 1) \
421 { \
422 int fit = INTVAL (XEXP (X, 1)) <= (64 - GET_MODE_SIZE (MODE)); \
423 if (fit) \
424 { \
425 if (reg_equiv_address[REGNO (XEXP (X, 0))] != 0) \
426 { \
427 int regno = REGNO (XEXP (X, 0)); \
428 rtx mem = make_memloc (X, regno); \
429 push_reload (XEXP (mem,0), NULL, &XEXP (mem,0), NULL, \
430 POINTER_REGS, Pmode, VOIDmode, 0, 0, \
431 1, ADDR_TYPE (TYPE)); \
432 push_reload (mem, NULL_RTX, &XEXP (X, 0), NULL, \
433 BASE_POINTER_REGS, GET_MODE (X), VOIDmode, 0, 0, \
434 OPNUM, TYPE); \
435 goto WIN; \
436 } \
437 } \
438 else if (! (frame_pointer_needed && XEXP (X,0) == frame_pointer_rtx)) \
439 { \
440 push_reload (X, NULL_RTX, &X, NULL, \
441 POINTER_REGS, GET_MODE (X), VOIDmode, 0, 0, \
442 OPNUM, TYPE); \
443 goto WIN; \
444 } \
445 } \
446 } while(0)
447
448 #define LEGITIMATE_CONSTANT_P(X) 1
449
450 #define BRANCH_COST(speed_p, predictable_p) 0
451 357
452 #define SLOW_BYTE_ACCESS 0 358 #define SLOW_BYTE_ACCESS 0
453 359
454 #define NO_FUNCTION_CSE 360 #define NO_FUNCTION_CSE 1
361
362 #define REGISTER_TARGET_PRAGMAS() \
363 do { \
364 avr_register_target_pragmas(); \
365 } while (0)
455 366
456 #define TEXT_SECTION_ASM_OP "\t.text" 367 #define TEXT_SECTION_ASM_OP "\t.text"
457 368
458 #define DATA_SECTION_ASM_OP "\t.data" 369 #define DATA_SECTION_ASM_OP "\t.data"
459 370
473 384
474 #define TARGET_ASM_DESTRUCTOR avr_asm_out_dtor 385 #define TARGET_ASM_DESTRUCTOR avr_asm_out_dtor
475 386
476 #define SUPPORTS_INIT_PRIORITY 0 387 #define SUPPORTS_INIT_PRIORITY 0
477 388
478 #define JUMP_TABLES_IN_TEXT_SECTION 0 389 /* We pretend jump tables are in text section because otherwise,
390 final.c will switch to .rodata before jump tables and thereby
391 triggers __do_copy_data. As we implement ASM_OUTPUT_ADDR_VEC,
392 we still have full control over the jump tables themselves. */
393 #define JUMP_TABLES_IN_TEXT_SECTION 1
479 394
480 #define ASM_COMMENT_START " ; " 395 #define ASM_COMMENT_START " ; "
481 396
482 #define ASM_APP_ON "/* #APP */\n" 397 #define ASM_APP_ON "/* #APP */\n"
483 398
484 #define ASM_APP_OFF "/* #NOAPP */\n" 399 #define ASM_APP_OFF "/* #NOAPP */\n"
485 400
486 /* Switch into a generic section. */
487 #define TARGET_ASM_NAMED_SECTION default_elf_asm_named_section
488 #define TARGET_ASM_INIT_SECTIONS avr_asm_init_sections
489
490 #define ASM_OUTPUT_ASCII(FILE, P, SIZE) gas_output_ascii (FILE,P,SIZE)
491
492 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == '\n' || ((C) == '$')) 401 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == '\n' || ((C) == '$'))
493 402
494 #define ASM_OUTPUT_COMMON(STREAM, NAME, SIZE, ROUNDED) \ 403 #define ASM_OUTPUT_ALIGNED_DECL_COMMON(STREAM, DECL, NAME, SIZE, ALIGN) \
495 do { \ 404 avr_asm_output_aligned_decl_common (STREAM, DECL, NAME, SIZE, ALIGN, false)
496 fputs ("\t.comm ", (STREAM)); \ 405
497 assemble_name ((STREAM), (NAME)); \ 406 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
498 fprintf ((STREAM), ",%lu,1\n", (unsigned long)(SIZE)); \ 407 avr_asm_asm_output_aligned_bss (FILE, DECL, NAME, SIZE, ALIGN, \
499 } while (0) 408 asm_output_aligned_bss)
500 409
501 #define ASM_OUTPUT_BSS(FILE, DECL, NAME, SIZE, ROUNDED) \ 410 #define ASM_OUTPUT_ALIGNED_DECL_LOCAL(STREAM, DECL, NAME, SIZE, ALIGN) \
502 asm_output_bss ((FILE), (DECL), (NAME), (SIZE), (ROUNDED)) 411 avr_asm_output_aligned_decl_common (STREAM, DECL, NAME, SIZE, ALIGN, true)
503
504 #define ASM_OUTPUT_LOCAL(STREAM, NAME, SIZE, ROUNDED) \
505 do { \
506 fputs ("\t.lcomm ", (STREAM)); \
507 assemble_name ((STREAM), (NAME)); \
508 fprintf ((STREAM), ",%d\n", (int)(SIZE)); \
509 } while (0)
510
511 #undef TYPE_ASM_OP
512 #undef SIZE_ASM_OP
513 #undef WEAK_ASM_OP
514 #define TYPE_ASM_OP "\t.type\t"
515 #define SIZE_ASM_OP "\t.size\t"
516 #define WEAK_ASM_OP "\t.weak\t"
517 /* Define the strings used for the special svr4 .type and .size directives.
518 These strings generally do not vary from one system running svr4 to
519 another, but if a given system (e.g. m88k running svr) needs to use
520 different pseudo-op names for these, they may be overridden in the
521 file which includes this one. */
522
523
524 #undef TYPE_OPERAND_FMT
525 #define TYPE_OPERAND_FMT "@%s"
526 /* The following macro defines the format used to output the second
527 operand of the .type assembler directive. Different svr4 assemblers
528 expect various different forms for this operand. The one given here
529 is just a default. You may need to override it in your machine-
530 specific tm.h file (depending upon the particulars of your assembler). */
531
532 #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
533 avr_asm_declare_function_name ((FILE), (NAME), (DECL))
534
535 #define ASM_DECLARE_FUNCTION_SIZE(FILE, FNAME, DECL) \
536 do { \
537 if (!flag_inhibit_size_directive) \
538 ASM_OUTPUT_MEASURED_SIZE (FILE, FNAME); \
539 } while (0)
540
541 #define ASM_DECLARE_OBJECT_NAME(FILE, NAME, DECL) \
542 do { \
543 ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "object"); \
544 size_directive_output = 0; \
545 if (!flag_inhibit_size_directive && DECL_SIZE (DECL)) \
546 { \
547 size_directive_output = 1; \
548 ASM_OUTPUT_SIZE_DIRECTIVE (FILE, NAME, \
549 int_size_in_bytes (TREE_TYPE (DECL))); \
550 } \
551 ASM_OUTPUT_LABEL(FILE, NAME); \
552 } while (0)
553
554 #undef ASM_FINISH_DECLARE_OBJECT
555 #define ASM_FINISH_DECLARE_OBJECT(FILE, DECL, TOP_LEVEL, AT_END) \
556 do { \
557 const char *name = XSTR (XEXP (DECL_RTL (DECL), 0), 0); \
558 HOST_WIDE_INT size; \
559 if (!flag_inhibit_size_directive && DECL_SIZE (DECL) \
560 && ! AT_END && TOP_LEVEL \
561 && DECL_INITIAL (DECL) == error_mark_node \
562 && !size_directive_output) \
563 { \
564 size_directive_output = 1; \
565 size = int_size_in_bytes (TREE_TYPE (DECL)); \
566 ASM_OUTPUT_SIZE_DIRECTIVE (FILE, name, size); \
567 } \
568 } while (0)
569
570
571 #define ESCAPES \
572 "\1\1\1\1\1\1\1\1btn\1fr\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
573 \0\0\"\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\
574 \0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\\\0\0\0\
575 \0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\1\
576 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
577 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
578 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
579 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1"
580 /* A table of bytes codes used by the ASM_OUTPUT_ASCII and
581 ASM_OUTPUT_LIMITED_STRING macros. Each byte in the table
582 corresponds to a particular byte value [0..255]. For any
583 given byte value, if the value in the corresponding table
584 position is zero, the given character can be output directly.
585 If the table value is 1, the byte must be output as a \ooo
586 octal escape. If the tables value is anything else, then the
587 byte value should be output as a \ followed by the value
588 in the table. Note that we can use standard UN*X escape
589 sequences for many control characters, but we don't use
590 \a to represent BEL because some svr4 assemblers (e.g. on
591 the i386) don't know about that. Also, we don't use \v
592 since some versions of gas, such as 2.2 did not accept it. */
593
594 #define STRING_LIMIT ((unsigned) 64)
595 #define STRING_ASM_OP "\t.string\t"
596 /* Some svr4 assemblers have a limit on the number of characters which
597 can appear in the operand of a .string directive. If your assembler
598 has such a limitation, you should define STRING_LIMIT to reflect that
599 limit. Note that at least some svr4 assemblers have a limit on the
600 actual number of bytes in the double-quoted string, and that they
601 count each character in an escape sequence as one byte. Thus, an
602 escape sequence like \377 would count as four bytes.
603
604 If your target assembler doesn't support the .string directive, you
605 should define this to zero. */
606 412
607 /* Globalizing directive for a label. */ 413 /* Globalizing directive for a label. */
608 #define GLOBAL_ASM_OP ".global\t" 414 #define GLOBAL_ASM_OP ".global\t"
609 415
610 #define SET_ASM_OP "\t.set\t"
611
612 #define ASM_WEAKEN_LABEL(FILE, NAME) \
613 do \
614 { \
615 fputs ("\t.weak\t", (FILE)); \
616 assemble_name ((FILE), (NAME)); \
617 fputc ('\n', (FILE)); \
618 } \
619 while (0)
620
621 #define SUPPORTS_WEAK 1 416 #define SUPPORTS_WEAK 1
622
623 #define ASM_GENERATE_INTERNAL_LABEL(STRING, PREFIX, NUM) \
624 sprintf (STRING, "*.%s%lu", PREFIX, (unsigned long)(NUM))
625 417
626 #define HAS_INIT_SECTION 1 418 #define HAS_INIT_SECTION 1
627 419
628 #define REGISTER_NAMES { \ 420 #define REGISTER_NAMES { \
629 "r0","r1","r2","r3","r4","r5","r6","r7", \ 421 "r0","r1","r2","r3","r4","r5","r6","r7", \
630 "r8","r9","r10","r11","r12","r13","r14","r15", \ 422 "r8","r9","r10","r11","r12","r13","r14","r15", \
631 "r16","r17","r18","r19","r20","r21","r22","r23", \ 423 "r16","r17","r18","r19","r20","r21","r22","r23", \
632 "r24","r25","r26","r27","r28","r29","r30","r31", \ 424 "r24","r25","r26","r27","r28","r29","r30","r31", \
633 "__SP_L__","__SP_H__","argL","argH"} 425 "__SP_L__","__SP_H__","argL","argH"}
634 426
635 #define FINAL_PRESCAN_INSN(insn, operand, nop) final_prescan_insn (insn, operand,nop) 427 #define FINAL_PRESCAN_INSN(insn, operand, nop) \
636 428 avr_final_prescan_insn (insn, operand,nop)
637 #define PRINT_OPERAND(STREAM, X, CODE) print_operand (STREAM, X, CODE)
638
639 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) ((CODE) == '~' || (CODE) == '!')
640
641 #define PRINT_OPERAND_ADDRESS(STREAM, X) print_operand_address(STREAM, X)
642
643 #define USER_LABEL_PREFIX ""
644
645 #define ASSEMBLER_DIALECT AVR_HAVE_MOVW
646 429
647 #define ASM_OUTPUT_REG_PUSH(STREAM, REGNO) \ 430 #define ASM_OUTPUT_REG_PUSH(STREAM, REGNO) \
648 { \ 431 { \
649 gcc_assert (REGNO < 32); \ 432 gcc_assert (REGNO < 32); \
650 fprintf (STREAM, "\tpush\tr%d", REGNO); \ 433 fprintf (STREAM, "\tpush\tr%d", REGNO); \
654 { \ 437 { \
655 gcc_assert (REGNO < 32); \ 438 gcc_assert (REGNO < 32); \
656 fprintf (STREAM, "\tpop\tr%d", REGNO); \ 439 fprintf (STREAM, "\tpop\tr%d", REGNO); \
657 } 440 }
658 441
659 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \ 442 #define ASM_OUTPUT_ADDR_VEC(TLABEL, TDATA) \
660 avr_output_addr_vec_elt(STREAM, VALUE) 443 avr_output_addr_vec (TLABEL, TDATA)
661 444
662 #define ASM_OUTPUT_CASE_LABEL(STREAM, PREFIX, NUM, TABLE) \ 445 #define ASM_OUTPUT_ALIGN(STREAM, POWER) \
663 (switch_to_section (progmem_section), \ 446 do { \
664 (*targetm.asm_out.internal_label) (STREAM, PREFIX, NUM)) 447 if ((POWER) > 0) \
665 448 fprintf (STREAM, "\t.p2align\t%d\n", POWER); \
666 #define ASM_OUTPUT_SKIP(STREAM, N) \
667 fprintf (STREAM, "\t.skip %lu,0\n", (unsigned long)(N))
668
669 #define ASM_OUTPUT_ALIGN(STREAM, POWER) \
670 do { \
671 if ((POWER) > 1) \
672 fprintf (STREAM, "\t.p2align\t%d\n", POWER); \
673 } while (0) 449 } while (0)
674 450
675 #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
676 default_elf_asm_output_external (FILE, DECL, NAME)
677
678 #define CASE_VECTOR_MODE HImode 451 #define CASE_VECTOR_MODE HImode
679 452
680 #undef WORD_REGISTER_OPERATIONS 453 #undef WORD_REGISTER_OPERATIONS
681 454
682 #define MOVE_MAX 4 455 /* Can move only a single byte from memory to reg in a
683 456 single instruction. */
684 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 457
458 #define MOVE_MAX 1
459
460 /* Allow upto two bytes moves to occur using by_pieces
461 infrastructure */
462
463 #define MOVE_MAX_PIECES 2
464
465 /* Set MOVE_RATIO to 3 to allow memory moves upto 4 bytes to happen
466 by pieces when optimizing for speed, like it did when MOVE_MAX_PIECES
467 was 4. When optimizing for size, allow memory moves upto 2 bytes.
468 Also see avr_use_by_pieces_infrastructure_p. */
469
470 #define MOVE_RATIO(speed) ((speed) ? 3 : 2)
685 471
686 #define Pmode HImode 472 #define Pmode HImode
687 473
688 #define FUNCTION_MODE HImode 474 #define FUNCTION_MODE HImode
689 475
690 #define DOLLARS_IN_IDENTIFIERS 0 476 #define DOLLARS_IN_IDENTIFIERS 0
691
692 #define NO_DOLLAR_IN_LABEL 1
693 477
694 #define TRAMPOLINE_SIZE 4 478 #define TRAMPOLINE_SIZE 4
695 479
696 /* Store in cc_status the expressions 480 /* Store in cc_status the expressions
697 that the condition codes will describe 481 that the condition codes will describe
698 after execution of an instruction whose pattern is EXP. 482 after execution of an instruction whose pattern is EXP.
699 Do not alter them if the instruction would not alter the cc's. */ 483 Do not alter them if the instruction would not alter the cc's. */
700 484
701 #define NOTICE_UPDATE_CC(EXP, INSN) notice_update_cc(EXP, INSN) 485 #define NOTICE_UPDATE_CC(EXP, INSN) avr_notice_update_cc (EXP, INSN)
702 486
703 /* The add insns don't set overflow in a usable way. */ 487 /* The add insns don't set overflow in a usable way. */
704 #define CC_OVERFLOW_UNUSABLE 01000 488 #define CC_OVERFLOW_UNUSABLE 01000
705 /* The mov,and,or,xor insns don't set carry. That's ok though as the 489 /* The mov,and,or,xor insns don't set carry. That's ok though as the
706 Z bit is all we need when doing unsigned comparisons on the result of 490 Z bit is all we need when doing unsigned comparisons on the result of
714 for profiling a function entry. */ 498 for profiling a function entry. */
715 499
716 #define FUNCTION_PROFILER(FILE, LABELNO) \ 500 #define FUNCTION_PROFILER(FILE, LABELNO) \
717 fprintf (FILE, "/* profiler %d */", (LABELNO)) 501 fprintf (FILE, "/* profiler %d */", (LABELNO))
718 502
719 #define ADJUST_INSN_LENGTH(INSN, LENGTH) (LENGTH =\ 503 #define ADJUST_INSN_LENGTH(INSN, LENGTH) \
720 adjust_insn_length (INSN, LENGTH)) 504 (LENGTH = avr_adjust_insn_length (INSN, LENGTH))
721 505
722 extern const char *avr_device_to_arch (int argc, const char **argv); 506 extern const char *avr_devicespecs_file (int, const char**);
723 extern const char *avr_device_to_data_start (int argc, const char **argv); 507
724 extern const char *avr_device_to_startfiles (int argc, const char **argv); 508 #define EXTRA_SPEC_FUNCTIONS \
725 extern const char *avr_device_to_devicelib (int argc, const char **argv); 509 { "device-specs-file", avr_devicespecs_file },
726 510
727 #define EXTRA_SPEC_FUNCTIONS \ 511 /* Driver self specs has lmited functionality w.r.t. '%s' for dynamic specs.
728 { "device_to_arch", avr_device_to_arch }, \ 512 Apply '%s' to a static string to inflate the file (directory) name which
729 { "device_to_data_start", avr_device_to_data_start }, \ 513 is used to diagnose problems with reading the specs file. */
730 { "device_to_startfile", avr_device_to_startfiles }, \ 514
731 { "device_to_devicelib", avr_device_to_devicelib }, 515 #undef DRIVER_SELF_SPECS
732 516 #define DRIVER_SELF_SPECS \
733 #define CPP_SPEC "" 517 " %:device-specs-file(device-specs%s %{mmcu=*:%*})"
734 518
735 #define CC1_SPEC "" 519 /* No libstdc++ for now. Empty string doesn't work. */
736
737 #define CC1PLUS_SPEC "%{!frtti:-fno-rtti} \
738 %{!fenforce-eh-specs:-fno-enforce-eh-specs} \
739 %{!fexceptions:-fno-exceptions}"
740 /* A C string constant that tells the GCC driver program options to
741 pass to `cc1plus'. */
742
743 #define ASM_SPEC "%{mmcu=avr25:-mmcu=avr2;mmcu=avr35:-mmcu=avr3;mmcu=avr31:-mmcu=avr3;mmcu=avr51:-mmcu=avr5;\
744 mmcu=*:-mmcu=%*}"
745
746 #define LINK_SPEC "\
747 %{mrelax:--relax\
748 %{mpmem-wrap-around:%{mmcu=at90usb8*:--pmem-wrap-around=8k}\
749 %{mmcu=atmega16*:--pmem-wrap-around=16k}\
750 %{mmcu=atmega32*|\
751 mmcu=at90can32*:--pmem-wrap-around=32k}\
752 %{mmcu=atmega64*|\
753 mmcu=at90can64*|\
754 mmcu=at90usb64*:--pmem-wrap-around=64k}}}\
755 %:device_to_arch(%{mmcu=*:%*})\
756 %:device_to_data_start(%{mmcu=*:%*})"
757
758 #define LIB_SPEC \
759 "%{!mmcu=at90s1*:%{!mmcu=attiny11:%{!mmcu=attiny12:%{!mmcu=attiny15:%{!mmcu=attiny28: -lc }}}}}"
760
761 #define LIBSTDCXX "gcc" 520 #define LIBSTDCXX "gcc"
762 /* No libstdc++ for now. Empty string doesn't work. */ 521
763 522 /* This is the default without any -mmcu=* option. */
764 #define LIBGCC_SPEC \ 523 #define MULTILIB_DEFAULTS { "mmcu=" AVR_MMCU_DEFAULT }
765 "%{!mmcu=at90s1*:%{!mmcu=attiny11:%{!mmcu=attiny12:%{!mmcu=attiny15:%{!mmcu=attiny28: -lgcc }}}}}"
766
767 #define STARTFILE_SPEC "%:device_to_startfile(%{mmcu=*:%*})"
768
769 #define ENDFILE_SPEC ""
770
771 /* This is the default without any -mmcu=* option (AT90S*). */
772 #define MULTILIB_DEFAULTS { "mmcu=avr2" }
773 524
774 #define TEST_HARD_REG_CLASS(CLASS, REGNO) \ 525 #define TEST_HARD_REG_CLASS(CLASS, REGNO) \
775 TEST_HARD_REG_BIT (reg_class_contents[ (int) (CLASS)], REGNO) 526 TEST_HARD_REG_BIT (reg_class_contents[ (int) (CLASS)], REGNO)
776 527
777 /* Note that the other files fail to use these
778 in some of the places where they should. */
779
780 #if defined(__STDC__) || defined(ALMOST_STDC)
781 #define AS2(a,b,c) #a " " #b "," #c
782 #define AS2C(b,c) " " #b "," #c
783 #define AS3(a,b,c,d) #a " " #b "," #c "," #d
784 #define AS1(a,b) #a " " #b
785 #else
786 #define AS1(a,b) "a b"
787 #define AS2(a,b,c) "a b,c"
788 #define AS2C(b,c) " b,c"
789 #define AS3(a,b,c,d) "a b,c,d"
790 #endif
791 #define OUT_AS1(a,b) output_asm_insn (AS1(a,b), operands)
792 #define OUT_AS2(a,b,c) output_asm_insn (AS2(a,b,c), operands)
793 #define CR_TAB "\n\t" 528 #define CR_TAB "\n\t"
794 529
795 #define PREFERRED_DEBUGGING_TYPE DBX_DEBUG
796
797 #define DWARF2_DEBUGGING_INFO 1
798
799 #define DWARF2_ADDR_SIZE 4 530 #define DWARF2_ADDR_SIZE 4
800 531
801 #define OBJECT_FORMAT_ELF 532 #define INCOMING_RETURN_ADDR_RTX avr_incoming_return_addr_rtx ()
533 #define INCOMING_FRAME_SP_OFFSET (AVR_3_BYTE_PC ? 3 : 2)
534
535 /* The caller's stack pointer value immediately before the call
536 is one byte below the first argument. */
537 #define ARG_POINTER_CFA_OFFSET(FNDECL) -1
802 538
803 #define HARD_REGNO_RENAME_OK(OLD_REG, NEW_REG) \ 539 #define HARD_REGNO_RENAME_OK(OLD_REG, NEW_REG) \
804 avr_hard_regno_rename_ok (OLD_REG, NEW_REG) 540 avr_hard_regno_rename_ok (OLD_REG, NEW_REG)
805 541
806 /* A C structure for machine-specific, per-function data. 542 /* A C structure for machine-specific, per-function data.
826 as specified by the "OS_main" attribute. */ 562 as specified by the "OS_main" attribute. */
827 int is_OS_main; 563 int is_OS_main;
828 564
829 /* Current function stack size. */ 565 /* Current function stack size. */
830 int stack_usage; 566 int stack_usage;
567
568 /* 'true' if a callee might be tail called */
569 int sibcall_fails;
570
571 /* 'true' if the above is_foo predicates are sanity-checked to avoid
572 multiple diagnose for the same function. */
573 int attributes_checked_p;
574
575 /* 'true' - if current function shall not use '__gcc_isr' pseudo
576 instructions as specified by the "no_gccisr" attribute. */
577 int is_no_gccisr;
578
579 /* Used for `__gcc_isr' pseudo instruction handling of
580 non-naked ISR prologue / epilogue(s). */
581 struct
582 {
583 /* 'true' if this function actually uses "*gasisr" insns. */
584 int yes;
585 /* 'true' if this function is allowed to use "*gasisr" insns. */
586 int maybe;
587 /* The register numer as printed by the Done chunk. */
588 int regno;
589 } gasisr;
590
591 /* 'true' if this function references .L__stack_usage like with
592 __builtin_return_address. */
593 int use_L__stack_usage;
831 }; 594 };
595
596 /* AVR does not round pushes, but the existence of this macro is
597 required in order for pushes to be generated. */
598 #define PUSH_ROUNDING(X) (X)
599
600 /* Define prototype here to avoid build warning. Some files using
601 ACCUMULATE_OUTGOING_ARGS (directly or indirectly) include
602 tm.h but not tm_p.h. */
603 extern int avr_accumulate_outgoing_args (void);
604 #define ACCUMULATE_OUTGOING_ARGS avr_accumulate_outgoing_args()
605
606 #define INIT_EXPANDERS avr_init_expanders()
607
608 /* Flags used for io and address attributes. */
609 #define SYMBOL_FLAG_IO_LOW (SYMBOL_FLAG_MACH_DEP << 4)
610 #define SYMBOL_FLAG_IO (SYMBOL_FLAG_MACH_DEP << 5)
611 #define SYMBOL_FLAG_ADDRESS (SYMBOL_FLAG_MACH_DEP << 6)