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comparison gcc/config/powerpcspe/476.md @ 111:04ced10e8804

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gcc 7
author kono
date Fri, 27 Oct 2017 22:46:09 +0900
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68:561a7518be6b 111:04ced10e8804
1 ;; Scheduling description for IBM PowerPC 476 processor.
2 ;; Copyright (C) 2009-2017 Free Software Foundation, Inc.
3 ;; Contributed by Peter Bergner (bergner@vnet.ibm.com).
4 ;;
5 ;; This file is part of GCC.
6 ;;
7 ;; GCC is free software; you can redistribute it and/or modify
8 ;; it under the terms of the GNU General Public License as published by
9 ;; the Free Software Foundation; either version 3, or (at your option)
10 ;; any later version.
11 ;;
12 ;; GCC is distributed in the hope that it will be useful,
13 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
14 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 ;; GNU General Public License for more details.
16 ;;
17 ;; You should have received a copy of the GNU General Public License
18 ;; along with GCC; see the file COPYING3. If not see
19 ;; <http://www.gnu.org/licenses/>.
20
21 ;; PPC476 Embedded PowerPC controller
22 ;; 3 issue (476) / 4 issue (476fp)
23 ;;
24 ;; i_pipe - complex integer / compare
25 ;; lj_pipe - load-store / simple integer arithmetic
26 ;; b_pipe - branch pipe
27 ;; f_pipe - floating point arithmetic
28
29 (define_automaton "ppc476_core,ppc476_apu")
30
31 (define_cpu_unit "ppc476_i_pipe,ppc476_lj_pipe,ppc476_b_pipe" "ppc476_core")
32 (define_cpu_unit "ppc476_issue_fp,ppc476_f_pipe" "ppc476_apu")
33 (define_cpu_unit "ppc476_issue_0,ppc476_issue_1,ppc476_issue_2" "ppc476_core")
34
35 (define_reservation "ppc476_issue" "ppc476_issue_0|ppc476_issue_1|ppc476_issue_2")
36 (define_reservation "ppc476_issue2" "ppc476_issue_0+ppc476_issue_1\
37 |ppc476_issue_0+ppc476_issue_2\
38 |ppc476_issue_1+ppc476_issue_2")
39 (define_reservation "ppc476_issue3" "ppc476_issue_0+ppc476_issue_1+ppc476_issue_2")
40
41 (define_insn_reservation "ppc476-load" 4
42 (and (eq_attr "type" "load,load_l,store_c,sync")
43 (eq_attr "cpu" "ppc476"))
44 "ppc476_issue,\
45 ppc476_lj_pipe")
46
47 (define_insn_reservation "ppc476-store" 4
48 (and (eq_attr "type" "store")
49 (eq_attr "cpu" "ppc476"))
50 "ppc476_issue,\
51 ppc476_lj_pipe")
52
53 (define_insn_reservation "ppc476-fpload" 4
54 (and (eq_attr "type" "fpload")
55 (eq_attr "cpu" "ppc476"))
56 "ppc476_issue,\
57 ppc476_lj_pipe")
58
59 (define_insn_reservation "ppc476-fpstore" 4
60 (and (eq_attr "type" "fpstore")
61 (eq_attr "cpu" "ppc476"))
62 "ppc476_issue,\
63 ppc476_lj_pipe")
64
65 (define_insn_reservation "ppc476-simple-integer" 1
66 (and (ior (eq_attr "type" "integer,insert")
67 (and (eq_attr "type" "add,logical,shift,exts")
68 (eq_attr "dot" "no")))
69 (eq_attr "cpu" "ppc476"))
70 "ppc476_issue,\
71 ppc476_i_pipe|ppc476_lj_pipe")
72
73 (define_insn_reservation "ppc476-complex-integer" 1
74 (and (eq_attr "type" "cmp,cr_logical,delayed_cr,cntlz,isel,isync,sync,trap,popcnt")
75 (eq_attr "cpu" "ppc476"))
76 "ppc476_issue,\
77 ppc476_i_pipe")
78
79 (define_insn_reservation "ppc476-compare" 4
80 (and (ior (eq_attr "type" "mfcr,mfcrf,mtcr,mfjmpr,mtjmpr")
81 (and (eq_attr "type" "add,logical,shift,exts")
82 (eq_attr "dot" "yes")))
83 (eq_attr "cpu" "ppc476"))
84 "ppc476_issue,\
85 ppc476_i_pipe")
86
87 (define_insn_reservation "ppc476-imul" 4
88 (and (eq_attr "type" "mul,halfmul")
89 (eq_attr "cpu" "ppc476"))
90 "ppc476_issue,\
91 ppc476_i_pipe")
92
93 (define_insn_reservation "ppc476-idiv" 11
94 (and (eq_attr "type" "div")
95 (eq_attr "cpu" "ppc476"))
96 "ppc476_issue,\
97 ppc476_i_pipe*11")
98
99 (define_insn_reservation "ppc476-branch" 1
100 (and (eq_attr "type" "branch,jmpreg")
101 (eq_attr "cpu" "ppc476"))
102 "ppc476_issue,\
103 ppc476_b_pipe")
104
105 (define_insn_reservation "ppc476-two" 2
106 (and (eq_attr "type" "two")
107 (eq_attr "cpu" "ppc476"))
108 "ppc476_issue2,\
109 ppc476_i_pipe|ppc476_lj_pipe,\
110 ppc476_i_pipe|ppc476_lj_pipe")
111
112 (define_insn_reservation "ppc476-three" 3
113 (and (eq_attr "type" "three")
114 (eq_attr "cpu" "ppc476"))
115 "ppc476_issue3,\
116 ppc476_i_pipe|ppc476_lj_pipe,\
117 ppc476_i_pipe|ppc476_lj_pipe,\
118 ppc476_i_pipe|ppc476_lj_pipe")
119
120 (define_insn_reservation "ppc476-fpcompare" 6
121 (and (eq_attr "type" "fpcompare")
122 (eq_attr "cpu" "ppc476"))
123 "ppc476_issue+ppc476_issue_fp,\
124 ppc476_f_pipe+ppc476_i_pipe")
125
126 (define_insn_reservation "ppc476-fp" 6
127 (and (eq_attr "type" "fp,fpsimple,dmul")
128 (eq_attr "cpu" "ppc476"))
129 "ppc476_issue_fp,\
130 ppc476_f_pipe")
131
132 (define_insn_reservation "ppc476-sdiv" 19
133 (and (eq_attr "type" "sdiv")
134 (eq_attr "cpu" "ppc476"))
135 "ppc476_issue_fp,
136 ppc476_f_pipe*19")
137
138 (define_insn_reservation "ppc476-ddiv" 33
139 (and (eq_attr "type" "ddiv")
140 (eq_attr "cpu" "ppc476"))
141 "ppc476_issue_fp,\
142 ppc476_f_pipe*33")
143