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comparison gcc/config/rl78/constraints.md @ 111:04ced10e8804
gcc 7
author | kono |
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date | Fri, 27 Oct 2017 22:46:09 +0900 |
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children | 84e7813d76e9 |
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1 ;; Machine Description for Renesas RL78 processors | |
2 ;; Copyright (C) 2011-2017 Free Software Foundation, Inc. | |
3 ;; Contributed by Red Hat. | |
4 | |
5 ;; This file is part of GCC. | |
6 | |
7 ;; GCC is free software; you can redistribute it and/or modify | |
8 ;; it under the terms of the GNU General Public License as published by | |
9 ;; the Free Software Foundation; either version 3, or (at your option) | |
10 ;; any later version. | |
11 | |
12 ;; GCC is distributed in the hope that it will be useful, | |
13 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 ;; GNU General Public License for more details. | |
16 | |
17 ;; You should have received a copy of the GNU General Public License | |
18 ;; along with GCC; see the file COPYING3. If not see | |
19 ;; <http://www.gnu.org/licenses/>. | |
20 | |
21 ; Constraints in use: | |
22 | |
23 ; core: | |
24 ; V X g i m n o p r s < > | |
25 ; 0..9 | |
26 ; I..Q - integers | |
27 ; Int8 = 0..255 | |
28 ; Int3 = 1..7 | |
29 ; J = -255..0 | |
30 ; K = 1 | |
31 ; L = -1 | |
32 ; M = 0 | |
33 ; N = 2 | |
34 ; O = -2 | |
35 ; P = 1..15 | |
36 | |
37 ; E..H - float constants | |
38 | |
39 ; RL78-specific | |
40 ; a x b c d e h l w - 8-bit regs | |
41 ; A B D T S - 16-bit regs | |
42 ; R = all regular registers (A-L) | |
43 ; Y - any valid memory | |
44 ; Wxx - various memory addressing modes | |
45 ; Qxx - conditionals | |
46 ; U = usual memory references mov-able to/from AX | |
47 ; v = virtual registers | |
48 ; Zxx = specific virtual registers | |
49 | |
50 (define_constraint "Int8" | |
51 "Integer constant in the range 0 @dots{} 255." | |
52 (and (match_code "const_int") | |
53 (match_test "IN_RANGE (ival, 0, 255)"))) | |
54 | |
55 (define_constraint "Int3" | |
56 "Integer constant in the range 1 @dots{} 7." | |
57 (and (match_code "const_int") | |
58 (match_test "IN_RANGE (ival, 1, 7)"))) | |
59 | |
60 (define_constraint "Iv08" | |
61 "@internal | |
62 Integer constant equal to 8." | |
63 (and (match_code "const_int") | |
64 (match_test "IN_RANGE (ival, 8, 8)"))) | |
65 | |
66 (define_constraint "Iv16" | |
67 "@internal | |
68 Integer constant equal to 16." | |
69 (and (match_code "const_int") | |
70 (match_test "IN_RANGE (ival, 16, 16)"))) | |
71 | |
72 (define_constraint "Iv24" | |
73 "@internal | |
74 Integer constant equal to 24." | |
75 (and (match_code "const_int") | |
76 (match_test "IN_RANGE (ival, 24, 24)"))) | |
77 | |
78 (define_constraint "Is09" | |
79 "@internal | |
80 Integer constant in the range 9 @dots{} 15 (for shifts)." | |
81 (and (match_code "const_int") | |
82 (match_test "IN_RANGE (ival, 9, 15)"))) | |
83 | |
84 (define_constraint "Is17" | |
85 "@internal | |
86 Integer constant in the range 17 @dots{} 23 (for shifts)." | |
87 (and (match_code "const_int") | |
88 (match_test "IN_RANGE (ival, 17, 23)"))) | |
89 | |
90 (define_constraint "Is25" | |
91 "@internal | |
92 Integer constant in the range 25 @dots{} 31 (for shifts)." | |
93 (and (match_code "const_int") | |
94 (match_test "IN_RANGE (ival, 25, 31)"))) | |
95 | |
96 (define_constraint "ISsi" | |
97 "@internal | |
98 Integer constant with bit 31 set." | |
99 (and (match_code "const_int") | |
100 (match_test "(ival & 0x80000000) != 0"))) | |
101 | |
102 (define_constraint "IShi" | |
103 "@internal | |
104 Integer constant with bit 15 set." | |
105 (and (match_code "const_int") | |
106 (match_test "(ival & 0x8000) != 0"))) | |
107 | |
108 (define_constraint "ISqi" | |
109 "@internal | |
110 Integer constant with bit 7 set." | |
111 (and (match_code "const_int") | |
112 (match_test "(ival & 0x80) != 0"))) | |
113 | |
114 (define_constraint "Ibqi" | |
115 "@internal | |
116 Integer constant with one bit in 0..7 set." | |
117 (and (match_code "const_int") | |
118 (match_test "(ival & 0xff) && (exact_log2 (ival & 0xff) >= 0)"))) | |
119 (define_constraint "IBqi" | |
120 "@internal | |
121 Integer constant with one bit in 0..7 clear." | |
122 (and (match_code "const_int") | |
123 (match_test "(~ival & 0xff) && (exact_log2 (~ival & 0xff) >= 0)"))) | |
124 | |
125 (define_constraint "J" | |
126 "Integer constant in the range -255 @dots{} 0" | |
127 (and (match_code "const_int") | |
128 (match_test "IN_RANGE (ival, -255, 0)"))) | |
129 | |
130 (define_constraint "K" | |
131 "Integer constant 1." | |
132 (and (match_code "const_int") | |
133 (match_test "IN_RANGE (ival, 1, 1)"))) | |
134 | |
135 (define_constraint "L" | |
136 "Integer constant -1." | |
137 (and (match_code "const_int") | |
138 (match_test "IN_RANGE (ival, -1, -1)"))) | |
139 | |
140 (define_constraint "M" | |
141 "Integer constant 0." | |
142 (and (match_code "const_int") | |
143 (match_test "IN_RANGE (ival, 0, 0)"))) | |
144 | |
145 (define_constraint "N" | |
146 "Integer constant 2." | |
147 (and (match_code "const_int") | |
148 (match_test "IN_RANGE (ival, 2, 2)"))) | |
149 | |
150 (define_constraint "O" | |
151 "Integer constant -2." | |
152 (and (match_code "const_int") | |
153 (match_test "IN_RANGE (ival, -2, -2)"))) | |
154 | |
155 (define_constraint "P" | |
156 "Integer constant 1..15" | |
157 (and (match_code "const_int") | |
158 (match_test "IN_RANGE (ival, 1, 15)"))) | |
159 | |
160 (define_register_constraint "R" "QI_REGS" | |
161 "@code{A} through @code{L} registers.") | |
162 | |
163 (define_register_constraint "a" "AREG" | |
164 "The @code{A} register.") | |
165 | |
166 (define_register_constraint "x" "XREG" | |
167 "The @code{X} register.") | |
168 | |
169 (define_register_constraint "b" "BREG" | |
170 "The @code{B} register.") | |
171 | |
172 (define_register_constraint "c" "CREG" | |
173 "The @code{C} register.") | |
174 | |
175 (define_register_constraint "d" "DREG" | |
176 "The @code{D} register.") | |
177 | |
178 (define_register_constraint "e" "EREG" | |
179 "The @code{E} register.") | |
180 | |
181 (define_register_constraint "h" "HREG" | |
182 "The @code{H} register.") | |
183 | |
184 (define_register_constraint "l" "LREG" | |
185 "The @code{L} register.") | |
186 | |
187 (define_register_constraint "w" "PSWREG" | |
188 "The @code{PSW} register.") | |
189 | |
190 (define_register_constraint "A" "AXREG" | |
191 "The @code{AX} register.") | |
192 | |
193 (define_register_constraint "B" "BCREG" | |
194 "The @code{BC} register.") | |
195 | |
196 (define_register_constraint "D" "DEREG" | |
197 "The @code{DE} register.") | |
198 | |
199 ; because H + L = T, assuming A=1. | |
200 (define_register_constraint "T" "HLREG" | |
201 "The @code{HL} register.") | |
202 | |
203 (define_register_constraint "S" "SPREG" | |
204 "The @code{SP} register.") | |
205 | |
206 (define_register_constraint "v" "V_REGS" | |
207 "The virtual registers.") | |
208 | |
209 (define_register_constraint "Z08W" "R8W_REGS" | |
210 "The R8 register, HImode.") | |
211 | |
212 (define_register_constraint "Z10W" "R10W_REGS" | |
213 "The R10 register, HImode.") | |
214 | |
215 (define_register_constraint "Zint" "INT_REGS" | |
216 "The interrupt registers.") | |
217 | |
218 ; All the memory addressing schemes the RL78 supports | |
219 ; of the form W {register} {bytes of offset} | |
220 ; or W {register} {register} | |
221 ; Additionally, the Cxx forms are the same as the Wxx forms, but without | |
222 ; the ES: override. | |
223 | |
224 ; absolute address | |
225 (define_memory_constraint "Cab" | |
226 "[addr]" | |
227 (and (match_code "mem") | |
228 (ior (match_test "CONSTANT_P (XEXP (op, 0))") | |
229 (match_test "GET_CODE (XEXP (op, 0)) == PLUS && GET_CODE (XEXP (XEXP (op, 0), 0)) == SYMBOL_REF")) | |
230 ) | |
231 ) | |
232 (define_memory_constraint "Wab" | |
233 "es:[addr]" | |
234 (match_test "(rl78_es_addr (op) && satisfies_constraint_Cab (rl78_es_base (op))) | |
235 || satisfies_constraint_Cab (op)") | |
236 ) | |
237 | |
238 (define_memory_constraint "Cbc" | |
239 "word16[BC]" | |
240 (and (match_code "mem") | |
241 (ior | |
242 (and (match_code "reg" "0") | |
243 (match_test "REGNO (XEXP (op, 0)) == BC_REG")) | |
244 (and (match_code "plus" "0") | |
245 (and (and (match_code "reg" "00") | |
246 (match_test "REGNO (XEXP (XEXP (op, 0), 0)) == BC_REG")) | |
247 (match_test "uword_operand (XEXP (XEXP (op, 0), 1), VOIDmode)")))) | |
248 ) | |
249 ) | |
250 (define_memory_constraint "Wbc" | |
251 "es:word16[BC]" | |
252 (match_test "(rl78_es_addr (op) && satisfies_constraint_Cbc (rl78_es_base (op))) | |
253 || satisfies_constraint_Cbc (op)") | |
254 ) | |
255 | |
256 (define_memory_constraint "Cde" | |
257 "[DE]" | |
258 (and (match_code "mem") | |
259 (and (match_code "reg" "0") | |
260 (match_test "REGNO (XEXP (op, 0)) == DE_REG"))) | |
261 ) | |
262 (define_memory_constraint "Wde" | |
263 "es:[DE]" | |
264 (match_test "(rl78_es_addr (op) && satisfies_constraint_Cde (rl78_es_base (op))) | |
265 || satisfies_constraint_Cde (op)") | |
266 ) | |
267 | |
268 (define_memory_constraint "Cca" | |
269 "[AX..HL] for calls" | |
270 (and (match_code "mem") | |
271 (and (match_code "reg" "0") | |
272 (match_test "REGNO (XEXP (op, 0)) <= HL_REG"))) | |
273 ) | |
274 (define_memory_constraint "Wca" | |
275 "es:[AX..HL] for calls" | |
276 (match_test "(rl78_es_addr (op) && satisfies_constraint_Cca (rl78_es_base (op))) | |
277 || satisfies_constraint_Cca (op)") | |
278 ) | |
279 | |
280 (define_memory_constraint "Ccv" | |
281 "[AX..HL,r8-r31] for calls" | |
282 (and (match_code "mem") | |
283 (and (match_code "reg" "0") | |
284 (match_test "REGNO (XEXP (op, 0)) < 32"))) | |
285 ) | |
286 (define_memory_constraint "Wcv" | |
287 "es:[AX..HL,r8-r31] for calls" | |
288 (match_test "(rl78_es_addr (op) && satisfies_constraint_Ccv (rl78_es_base (op))) | |
289 || satisfies_constraint_Ccv (op)") | |
290 ) | |
291 | |
292 (define_memory_constraint "Cd2" | |
293 "word16[DE]" | |
294 (and (match_code "mem") | |
295 (ior | |
296 (and (match_code "reg" "0") | |
297 (match_test "REGNO (XEXP (op, 0)) == DE_REG")) | |
298 (and (match_code "plus" "0") | |
299 (and (and (match_code "reg" "00") | |
300 (match_test "REGNO (XEXP (XEXP (op, 0), 0)) == DE_REG")) | |
301 (match_test "uword_operand (XEXP (XEXP (op, 0), 1), VOIDmode)")))) | |
302 ) | |
303 ) | |
304 (define_memory_constraint "Wd2" | |
305 "es:word16[DE]" | |
306 (match_test "(rl78_es_addr (op) && satisfies_constraint_Cd2 (rl78_es_base (op))) | |
307 || satisfies_constraint_Cd2 (op)") | |
308 ) | |
309 | |
310 (define_memory_constraint "Chl" | |
311 "[HL]" | |
312 (and (match_code "mem") | |
313 (and (match_code "reg" "0") | |
314 (match_test "REGNO (XEXP (op, 0)) == HL_REG"))) | |
315 ) | |
316 (define_memory_constraint "Whl" | |
317 "es:[HL]" | |
318 (match_test "(rl78_es_addr (op) && satisfies_constraint_Chl (rl78_es_base (op))) | |
319 || satisfies_constraint_Chl (op)") | |
320 ) | |
321 | |
322 (define_memory_constraint "Ch1" | |
323 "byte8[HL]" | |
324 (and (match_code "mem") | |
325 (and (match_code "plus" "0") | |
326 (and (and (match_code "reg" "00") | |
327 (match_test "REGNO (XEXP (XEXP (op, 0), 0)) == HL_REG")) | |
328 (match_test "ubyte_operand (XEXP (XEXP (op, 0), 1), VOIDmode)")))) | |
329 ) | |
330 (define_memory_constraint "Wh1" | |
331 "es:byte8[HL]" | |
332 (match_test "(rl78_es_addr (op) && satisfies_constraint_Ch1 (rl78_es_base (op))) | |
333 || satisfies_constraint_Ch1 (op)") | |
334 ) | |
335 | |
336 (define_memory_constraint "Chb" | |
337 "[HL+B]" | |
338 (and (match_code "mem") | |
339 (match_test "rl78_hl_b_c_addr_p (XEXP (op, 0))")) | |
340 ) | |
341 (define_memory_constraint "Whb" | |
342 "es:[HL+B]" | |
343 (match_test "(rl78_es_addr (op) && satisfies_constraint_Chb (rl78_es_base (op))) | |
344 || satisfies_constraint_Chb (op)") | |
345 ) | |
346 | |
347 (define_memory_constraint "Cs1" | |
348 "word8[SP]" | |
349 (and (match_code "mem") | |
350 (ior | |
351 (and (match_code "reg" "0") | |
352 (match_test "REGNO (XEXP (op, 0)) == SP_REG")) | |
353 (and (match_code "plus" "0") | |
354 (and (and (match_code "reg" "00") | |
355 (match_test "REGNO (XEXP (XEXP (op, 0), 0)) == SP_REG")) | |
356 (and (match_code "const_int" "01") | |
357 (match_test "IN_RANGE (INTVAL (XEXP (XEXP (op, 0), 1)), 0, 256 - GET_MODE_SIZE (GET_MODE (op)))"))))) | |
358 ) | |
359 ) | |
360 | |
361 (define_memory_constraint "Ws1" | |
362 "es:word8[SP]" | |
363 (match_test "(rl78_es_addr (op) && satisfies_constraint_Cs1 (rl78_es_base (op))) | |
364 || satisfies_constraint_Cs1 (op)") | |
365 ) | |
366 | |
367 (define_constraint "Wfr" | |
368 "ES/CS far pointer" | |
369 (and (match_code "mem") | |
370 (match_test "rl78_far_p (op)")) | |
371 ) | |
372 | |
373 (define_memory_constraint "Wsa" | |
374 "any SADDR memory access" | |
375 (and (match_code "mem") | |
376 (match_test "rl78_saddr_p (op)")) | |
377 ) | |
378 | |
379 (define_memory_constraint "Wsf" | |
380 "any SFR memory access" | |
381 (and (match_code "mem") | |
382 (match_test "rl78_sfr_p (op)")) | |
383 ) | |
384 | |
385 (define_memory_constraint "Y" | |
386 "any near legitimate memory access" | |
387 (and (match_code "mem") | |
388 (match_test "!rl78_far_p (op) && rl78_as_legitimate_address (VOIDmode, XEXP (op, 0), true, ADDR_SPACE_GENERIC)")) | |
389 ) | |
390 | |
391 (define_memory_constraint "U" | |
392 "memory references valid with mov to/from a/ax" | |
393 (and (match_code "mem") | |
394 (match_test "rl78_virt_insns_ok () | |
395 || satisfies_constraint_Wab (op) | |
396 || satisfies_constraint_Wbc (op) | |
397 || satisfies_constraint_Wde (op) | |
398 || satisfies_constraint_Wd2 (op) | |
399 || satisfies_constraint_Whl (op) | |
400 || satisfies_constraint_Wh1 (op) | |
401 || satisfies_constraint_Whb (op) | |
402 || satisfies_constraint_Ws1 (op) | |
403 || satisfies_constraint_Wfr (op) "))) | |
404 | |
405 (define_memory_constraint "Qbi" | |
406 "built-in compare types" | |
407 (match_code "eq,ne,gtu,ltu,geu,leu")) | |
408 | |
409 (define_memory_constraint "Qsc" | |
410 "synthetic compares" | |
411 (match_code "gt,lt,ge,le")) | |
412 | |
413 (define_constraint "Qs8" | |
414 "Integer constant computed from (SUBREG (SYMREF))." | |
415 (and (match_code "subreg") | |
416 (match_test "GET_CODE (XEXP (op, 0)) == SYMBOL_REF")) | |
417 ) |