comparison gcc/config/rs6000/paired.md @ 111:04ced10e8804

gcc 7
author kono
date Fri, 27 Oct 2017 22:46:09 +0900
parents f6334be47118
children
comparison
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68:561a7518be6b 111:04ced10e8804
1 ;; PowerPC paired single and double hummer description 1 ;; PowerPC paired single and double hummer description
2 ;; Copyright (C) 2007, 2009, 2010 2 ;; Copyright (C) 2007-2017 Free Software Foundation, Inc.
3 ;; Free Software Foundation, Inc.
4 ;; Contributed by David Edelsohn <edelsohn@gnu.org> and Revital Eres 3 ;; Contributed by David Edelsohn <edelsohn@gnu.org> and Revital Eres
5 ;; <eres@il.ibm.com> 4 ;; <eres@il.ibm.com>
6 5
7 ;; This file is part of GCC. 6 ;; This file is part of GCC.
8 7
18 ;; 17 ;;
19 ;; You should have received a copy of the GNU General Public License 18 ;; You should have received a copy of the GNU General Public License
20 ;; along with this program; see the file COPYING3. If not see 19 ;; along with this program; see the file COPYING3. If not see
21 ;; <http://www.gnu.org/licenses/>. 20 ;; <http://www.gnu.org/licenses/>.
22 21
23 (define_constants 22 (define_c_enum "unspec"
24 [(UNSPEC_INTERHI_V2SF 330) 23 [UNSPEC_INTERHI_V2SF
25 (UNSPEC_INTERLO_V2SF 331) 24 UNSPEC_INTERLO_V2SF
26 (UNSPEC_EXTEVEN_V2SF 332) 25 UNSPEC_EXTEVEN_V2SF
27 (UNSPEC_EXTODD_V2SF 333) 26 UNSPEC_EXTODD_V2SF
28 ]) 27 ])
29 28
30 (define_insn "paired_negv2sf2" 29 (define_insn "negv2sf2"
31 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f") 30 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f")
32 (neg:V2SF (match_operand:V2SF 1 "gpc_reg_operand" "f")))] 31 (neg:V2SF (match_operand:V2SF 1 "gpc_reg_operand" "f")))]
33 "TARGET_PAIRED_FLOAT" 32 "TARGET_PAIRED_FLOAT"
34 "ps_neg %0,%1" 33 "ps_neg %0,%1"
35 [(set_attr "type" "fp")]) 34 [(set_attr "type" "fp")])
39 (sqrt:V2SF (match_operand:V2SF 1 "gpc_reg_operand" "f")))] 38 (sqrt:V2SF (match_operand:V2SF 1 "gpc_reg_operand" "f")))]
40 "TARGET_PAIRED_FLOAT" 39 "TARGET_PAIRED_FLOAT"
41 "ps_rsqrte %0,%1" 40 "ps_rsqrte %0,%1"
42 [(set_attr "type" "fp")]) 41 [(set_attr "type" "fp")])
43 42
44 (define_insn "paired_absv2sf2" 43 (define_insn "absv2sf2"
45 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f") 44 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f")
46 (abs:V2SF (match_operand:V2SF 1 "gpc_reg_operand" "f")))] 45 (abs:V2SF (match_operand:V2SF 1 "gpc_reg_operand" "f")))]
47 "TARGET_PAIRED_FLOAT" 46 "TARGET_PAIRED_FLOAT"
48 "ps_abs %0,%1" 47 "ps_abs %0,%1"
49 [(set_attr "type" "fp")]) 48 [(set_attr "type" "fp")])
53 (neg:V2SF (abs:V2SF (match_operand:V2SF 1 "gpc_reg_operand" "f"))))] 52 (neg:V2SF (abs:V2SF (match_operand:V2SF 1 "gpc_reg_operand" "f"))))]
54 "TARGET_PAIRED_FLOAT" 53 "TARGET_PAIRED_FLOAT"
55 "ps_nabs %0,%1" 54 "ps_nabs %0,%1"
56 [(set_attr "type" "fp")]) 55 [(set_attr "type" "fp")])
57 56
58 (define_insn "paired_addv2sf3" 57 (define_insn "addv2sf3"
59 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f") 58 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f")
60 (plus:V2SF (match_operand:V2SF 1 "gpc_reg_operand" "%f") 59 (plus:V2SF (match_operand:V2SF 1 "gpc_reg_operand" "%f")
61 (match_operand:V2SF 2 "gpc_reg_operand" "f")))] 60 (match_operand:V2SF 2 "gpc_reg_operand" "f")))]
62 "TARGET_PAIRED_FLOAT" 61 "TARGET_PAIRED_FLOAT"
63 "ps_add %0,%1,%2" 62 "ps_add %0,%1,%2"
64 [(set_attr "type" "fp")]) 63 [(set_attr "type" "fp")])
65 64
66 (define_insn "paired_subv2sf3" 65 (define_insn "subv2sf3"
67 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f") 66 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f")
68 (minus:V2SF (match_operand:V2SF 1 "gpc_reg_operand" "f") 67 (minus:V2SF (match_operand:V2SF 1 "gpc_reg_operand" "f")
69 (match_operand:V2SF 2 "gpc_reg_operand" "f")))] 68 (match_operand:V2SF 2 "gpc_reg_operand" "f")))]
70 "TARGET_PAIRED_FLOAT" 69 "TARGET_PAIRED_FLOAT"
71 "ps_sub %0,%1,%2" 70 "ps_sub %0,%1,%2"
72 [(set_attr "type" "fp")]) 71 [(set_attr "type" "fp")])
73 72
74 (define_insn "paired_mulv2sf3" 73 (define_insn "mulv2sf3"
75 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f") 74 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f")
76 (mult:V2SF (match_operand:V2SF 1 "gpc_reg_operand" "%f") 75 (mult:V2SF (match_operand:V2SF 1 "gpc_reg_operand" "%f")
77 (match_operand:V2SF 2 "gpc_reg_operand" "f")))] 76 (match_operand:V2SF 2 "gpc_reg_operand" "f")))]
78 "TARGET_PAIRED_FLOAT" 77 "TARGET_PAIRED_FLOAT"
79 "ps_mul %0,%1,%2" 78 "ps_mul %0,%1,%2"
84 (unspec:V2SF [(match_operand:V2SF 1 "gpc_reg_operand" "f")] UNSPEC_FRES))] 83 (unspec:V2SF [(match_operand:V2SF 1 "gpc_reg_operand" "f")] UNSPEC_FRES))]
85 "TARGET_PAIRED_FLOAT && flag_finite_math_only" 84 "TARGET_PAIRED_FLOAT && flag_finite_math_only"
86 "ps_res %0,%1" 85 "ps_res %0,%1"
87 [(set_attr "type" "fp")]) 86 [(set_attr "type" "fp")])
88 87
89 (define_insn "paired_divv2sf3" 88 (define_insn "divv2sf3"
90 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f") 89 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f")
91 (div:V2SF (match_operand:V2SF 1 "gpc_reg_operand" "f") 90 (div:V2SF (match_operand:V2SF 1 "gpc_reg_operand" "f")
92 (match_operand:V2SF 2 "gpc_reg_operand" "f")))] 91 (match_operand:V2SF 2 "gpc_reg_operand" "f")))]
93 "TARGET_PAIRED_FLOAT" 92 "TARGET_PAIRED_FLOAT"
94 "ps_div %0,%1,%2" 93 "ps_div %0,%1,%2"
199 "TARGET_PAIRED_FLOAT" 198 "TARGET_PAIRED_FLOAT"
200 "ps_sel %0,%1,%2,%3" 199 "ps_sel %0,%1,%2,%3"
201 [(set_attr "type" "fp")]) 200 [(set_attr "type" "fp")])
202 201
203 (define_insn "*movv2sf_paired" 202 (define_insn "*movv2sf_paired"
204 [(set (match_operand:V2SF 0 "nonimmediate_operand" "=Z,f,f,o,r,r,f") 203 [(set (match_operand:V2SF 0 "nonimmediate_operand" "=Z,f,f,Y,r,r,f")
205 (match_operand:V2SF 1 "input_operand" "f,Z,f,r,o,r,W"))] 204 (match_operand:V2SF 1 "input_operand" "f,Z,f,r,Y,r,W"))]
206 "TARGET_PAIRED_FLOAT 205 "TARGET_PAIRED_FLOAT
207 && (register_operand (operands[0], V2SFmode) 206 && (register_operand (operands[0], V2SFmode)
208 || register_operand (operands[1], V2SFmode))" 207 || register_operand (operands[1], V2SFmode))"
209 { 208 {
210 switch (which_alternative) 209 switch (which_alternative)
270 "ps_cmpu1 %0,%1,%2" 269 "ps_cmpu1 %0,%1,%2"
271 [(set_attr "type" "fpcompare")]) 270 [(set_attr "type" "fpcompare")])
272 271
273 (define_insn "paired_merge00" 272 (define_insn "paired_merge00"
274 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f") 273 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f")
275 (vec_concat:V2SF 274 (vec_select:V2SF
276 (vec_select:SF (match_operand:V2SF 1 "gpc_reg_operand" "f") 275 (vec_concat:V4SF
277 (parallel [(const_int 0)])) 276 (match_operand:V2SF 1 "gpc_reg_operand" "f")
278 (vec_select:SF (match_operand:V2SF 2 "gpc_reg_operand" "f") 277 (match_operand:V2SF 2 "gpc_reg_operand" "f"))
279 (parallel [(const_int 0)]))))] 278 (parallel [(const_int 0) (const_int 2)])))]
280 "TARGET_PAIRED_FLOAT" 279 "TARGET_PAIRED_FLOAT"
281 "ps_merge00 %0, %1, %2" 280 "ps_merge00 %0, %1, %2"
282 [(set_attr "type" "fp")]) 281 [(set_attr "type" "fp")])
283 282
284 (define_insn "paired_merge01" 283 (define_insn "paired_merge01"
285 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f") 284 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f")
286 (vec_concat:V2SF 285 (vec_select:V2SF
287 (vec_select:SF (match_operand:V2SF 1 "gpc_reg_operand" "f") 286 (vec_concat:V4SF
288 (parallel [(const_int 0)])) 287 (match_operand:V2SF 1 "gpc_reg_operand" "f")
289 (vec_select:SF (match_operand:V2SF 2 "gpc_reg_operand" "f") 288 (match_operand:V2SF 2 "gpc_reg_operand" "f"))
290 (parallel [(const_int 1)]))))] 289 (parallel [(const_int 0) (const_int 3)])))]
291 "TARGET_PAIRED_FLOAT" 290 "TARGET_PAIRED_FLOAT"
292 "ps_merge01 %0, %1, %2" 291 "ps_merge01 %0, %1, %2"
293 [(set_attr "type" "fp")]) 292 [(set_attr "type" "fp")])
294 293
295 (define_insn "paired_merge10" 294 (define_insn "paired_merge10"
296 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f") 295 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f")
297 (vec_concat:V2SF 296 (vec_select:V2SF
298 (vec_select:SF (match_operand:V2SF 1 "gpc_reg_operand" "f") 297 (vec_concat:V4SF
299 (parallel [(const_int 1)])) 298 (match_operand:V2SF 1 "gpc_reg_operand" "f")
300 (vec_select:SF (match_operand:V2SF 2 "gpc_reg_operand" "f") 299 (match_operand:V2SF 2 "gpc_reg_operand" "f"))
301 (parallel [(const_int 0)]))))] 300 (parallel [(const_int 1) (const_int 2)])))]
302 "TARGET_PAIRED_FLOAT" 301 "TARGET_PAIRED_FLOAT"
303 "ps_merge10 %0, %1, %2" 302 "ps_merge10 %0, %1, %2"
304 [(set_attr "type" "fp")]) 303 [(set_attr "type" "fp")])
305 304
306 (define_insn "paired_merge11" 305 (define_insn "paired_merge11"
307 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f") 306 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f")
308 (vec_concat:V2SF 307 (vec_select:V2SF
309 (vec_select:SF (match_operand:V2SF 1 "gpc_reg_operand" "f") 308 (vec_concat:V4SF
310 (parallel [(const_int 1)])) 309 (match_operand:V2SF 1 "gpc_reg_operand" "f")
311 (vec_select:SF (match_operand:V2SF 2 "gpc_reg_operand" "f") 310 (match_operand:V2SF 2 "gpc_reg_operand" "f"))
312 (parallel [(const_int 1)]))))] 311 (parallel [(const_int 1) (const_int 3)])))]
313 "TARGET_PAIRED_FLOAT" 312 "TARGET_PAIRED_FLOAT"
314 "ps_merge11 %0, %1, %2" 313 "ps_merge11 %0, %1, %2"
315 [(set_attr "type" "fp")]) 314 [(set_attr "type" "fp")])
315
316 (define_expand "vec_perm_constv2sf"
317 [(match_operand:V2SF 0 "gpc_reg_operand" "")
318 (match_operand:V2SF 1 "gpc_reg_operand" "")
319 (match_operand:V2SF 2 "gpc_reg_operand" "")
320 (match_operand:V2SI 3 "" "")]
321 "TARGET_PAIRED_FLOAT"
322 {
323 if (rs6000_expand_vec_perm_const (operands))
324 DONE;
325 else
326 FAIL;
327 })
316 328
317 (define_insn "paired_sum0" 329 (define_insn "paired_sum0"
318 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f") 330 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f")
319 (vec_concat:V2SF (plus:SF (vec_select:SF 331 (vec_concat:V2SF (plus:SF (vec_select:SF
320 (match_operand:V2SF 1 "gpc_reg_operand" "f") 332 (match_operand:V2SF 1 "gpc_reg_operand" "f")
363 (parallel [(const_int 1)])))))] 375 (parallel [(const_int 1)])))))]
364 "TARGET_PAIRED_FLOAT" 376 "TARGET_PAIRED_FLOAT"
365 "ps_muls1 %0, %1, %2" 377 "ps_muls1 %0, %1, %2"
366 [(set_attr "type" "fp")]) 378 [(set_attr "type" "fp")])
367 379
368 (define_expand "vec_initv2sf" 380 (define_expand "vec_initv2sfsf"
369 [(match_operand:V2SF 0 "gpc_reg_operand" "=f") 381 [(match_operand:V2SF 0 "gpc_reg_operand" "=f")
370 (match_operand 1 "" "")] 382 (match_operand 1 "" "")]
371 "TARGET_PAIRED_FLOAT" 383 "TARGET_PAIRED_FLOAT"
372 { 384 {
373 paired_expand_vector_init (operands[0], operands[1]); 385 paired_expand_vector_init (operands[0], operands[1]);
407 emit_insn (gen_subv2sf3 (tmp, operands[1], operands[2])); 419 emit_insn (gen_subv2sf3 (tmp, operands[1], operands[2]));
408 emit_insn (gen_selv2sf4 (operands[0], tmp, operands[1], operands[2], CONST0_RTX (SFmode))); 420 emit_insn (gen_selv2sf4 (operands[0], tmp, operands[1], operands[2], CONST0_RTX (SFmode)));
409 DONE; 421 DONE;
410 }) 422 })
411 423
412 (define_expand "reduc_smax_v2sf" 424 (define_expand "reduc_smax_scal_v2sf"
413 [(match_operand:V2SF 0 "gpc_reg_operand" "=f") 425 [(match_operand:SF 0 "gpc_reg_operand" "=f")
414 (match_operand:V2SF 1 "gpc_reg_operand" "f")] 426 (match_operand:V2SF 1 "gpc_reg_operand" "f")]
415 "TARGET_PAIRED_FLOAT" 427 "TARGET_PAIRED_FLOAT"
416 { 428 {
417 rtx tmp_swap = gen_reg_rtx (V2SFmode); 429 rtx tmp_swap = gen_reg_rtx (V2SFmode);
418 rtx tmp = gen_reg_rtx (V2SFmode); 430 rtx tmp = gen_reg_rtx (V2SFmode);
431 rtx vec_res = gen_reg_rtx (V2SFmode);
432 rtx di_res = gen_reg_rtx (DImode);
419 433
420 emit_insn (gen_paired_merge10 (tmp_swap, operands[1], operands[1])); 434 emit_insn (gen_paired_merge10 (tmp_swap, operands[1], operands[1]));
421 emit_insn (gen_subv2sf3 (tmp, operands[1], tmp_swap)); 435 emit_insn (gen_subv2sf3 (tmp, operands[1], tmp_swap));
422 emit_insn (gen_selv2sf4 (operands[0], tmp, operands[1], tmp_swap, CONST0_RTX (SFmode))); 436 emit_insn (gen_selv2sf4 (vec_res, tmp, operands[1], tmp_swap,
423 437 CONST0_RTX (SFmode)));
424 DONE; 438 emit_move_insn (di_res, simplify_gen_subreg (DImode, vec_res, V2SFmode, 0));
425 }) 439 emit_move_insn (operands[0], simplify_gen_subreg (SFmode, di_res, DImode,
426 440 BYTES_BIG_ENDIAN ? 4 : 0));
427 (define_expand "reduc_smin_v2sf" 441
428 [(match_operand:V2SF 0 "gpc_reg_operand" "=f") 442 DONE;
443 })
444
445 (define_expand "reduc_smin_scal_v2sf"
446 [(match_operand:SF 0 "gpc_reg_operand" "=f")
429 (match_operand:V2SF 1 "gpc_reg_operand" "f")] 447 (match_operand:V2SF 1 "gpc_reg_operand" "f")]
430 "TARGET_PAIRED_FLOAT" 448 "TARGET_PAIRED_FLOAT"
431 { 449 {
432 rtx tmp_swap = gen_reg_rtx (V2SFmode); 450 rtx tmp_swap = gen_reg_rtx (V2SFmode);
433 rtx tmp = gen_reg_rtx (V2SFmode); 451 rtx tmp = gen_reg_rtx (V2SFmode);
452 rtx vec_res = gen_reg_rtx (V2SFmode);
453 rtx di_res = gen_reg_rtx (DImode);
434 454
435 emit_insn (gen_paired_merge10 (tmp_swap, operands[1], operands[1])); 455 emit_insn (gen_paired_merge10 (tmp_swap, operands[1], operands[1]));
436 emit_insn (gen_subv2sf3 (tmp, operands[1], tmp_swap)); 456 emit_insn (gen_subv2sf3 (tmp, operands[1], tmp_swap));
437 emit_insn (gen_selv2sf4 (operands[0], tmp, tmp_swap, operands[1], CONST0_RTX (SFmode))); 457 emit_insn (gen_selv2sf4 (vec_res, tmp, tmp_swap, operands[1],
438 458 CONST0_RTX (SFmode)));
439 DONE; 459 emit_move_insn (di_res, simplify_gen_subreg (DImode, vec_res, V2SFmode, 0));
440 }) 460 emit_move_insn (operands[0], simplify_gen_subreg (SFmode, di_res, DImode,
441 461 BYTES_BIG_ENDIAN ? 4 : 0));
442 (define_expand "vec_interleave_highv2sf" 462
443 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f") 463 DONE;
444 (unspec:V2SF [(match_operand:V2SF 1 "gpc_reg_operand" "f") 464 })
445 (match_operand:V2SF 2 "gpc_reg_operand" "f")] 465
446 UNSPEC_INTERHI_V2SF))] 466 (define_expand "reduc_plus_scal_v2sf"
447 "TARGET_PAIRED_FLOAT" 467 [(set (match_operand:SF 0 "gpc_reg_operand" "=f")
448 "
449 {
450 emit_insn (gen_paired_merge00 (operands[0], operands[1], operands[2]));
451 DONE;
452 }")
453
454 (define_expand "vec_interleave_lowv2sf"
455 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f")
456 (unspec:V2SF [(match_operand:V2SF 1 "gpc_reg_operand" "f")
457 (match_operand:V2SF 2 "gpc_reg_operand" "f")]
458 UNSPEC_INTERLO_V2SF))]
459 "TARGET_PAIRED_FLOAT"
460 "
461 {
462 emit_insn (gen_paired_merge11 (operands[0], operands[1], operands[2]));
463 DONE;
464 }")
465
466 (define_expand "vec_extract_evenv2sf"
467 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f")
468 (unspec:V2SF [(match_operand:V2SF 1 "gpc_reg_operand" "f")
469 (match_operand:V2SF 2 "gpc_reg_operand" "f")]
470 UNSPEC_EXTEVEN_V2SF))]
471 "TARGET_PAIRED_FLOAT"
472 "
473 {
474 emit_insn (gen_paired_merge00 (operands[0], operands[1], operands[2]));
475 DONE;
476 }")
477
478 (define_expand "vec_extract_oddv2sf"
479 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f")
480 (unspec:V2SF [(match_operand:V2SF 1 "gpc_reg_operand" "f")
481 (match_operand:V2SF 2 "gpc_reg_operand" "f")]
482 UNSPEC_EXTODD_V2SF))]
483 "TARGET_PAIRED_FLOAT"
484 "
485 {
486 emit_insn (gen_paired_merge11 (operands[0], operands[1], operands[2]));
487 DONE;
488 }")
489
490
491 (define_expand "reduc_splus_v2sf"
492 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f")
493 (match_operand:V2SF 1 "gpc_reg_operand" "f"))] 468 (match_operand:V2SF 1 "gpc_reg_operand" "f"))]
494 "TARGET_PAIRED_FLOAT" 469 "TARGET_PAIRED_FLOAT"
495 " 470 {
496 { 471 rtx vec_res = gen_reg_rtx (V2SFmode);
497 emit_insn (gen_paired_sum1 (operands[0], operands[1], operands[1], operands[1])); 472 rtx di_res = gen_reg_rtx (DImode);
498 DONE; 473
499 }") 474 emit_insn (gen_paired_sum1 (vec_res, operands[1], operands[1], operands[1]));
475 emit_move_insn (di_res, simplify_gen_subreg (DImode, vec_res, V2SFmode, 0));
476 emit_move_insn (operands[0], simplify_gen_subreg (SFmode, di_res, DImode,
477 BYTES_BIG_ENDIAN ? 4 : 0));
478 DONE;
479 })
500 480
501 (define_expand "movmisalignv2sf" 481 (define_expand "movmisalignv2sf"
502 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f") 482 [(set (match_operand:V2SF 0 "nonimmediate_operand" "")
503 (match_operand:V2SF 1 "gpc_reg_operand" "f"))] 483 (match_operand:V2SF 1 "any_operand" ""))]
504 "TARGET_PAIRED_FLOAT" 484 "TARGET_PAIRED_FLOAT"
505 { 485 {
506 paired_expand_vector_move (operands); 486 paired_expand_vector_move (operands);
507 DONE; 487 DONE;
508 }) 488 })
509 489
510 (define_expand "vcondv2sf" 490 (define_expand "vcondv2sfv2sf"
511 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f") 491 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=f")
512 (if_then_else:V2SF 492 (if_then_else:V2SF
513 (match_operator 3 "gpc_reg_operand" 493 (match_operator 3 "gpc_reg_operand"
514 [(match_operand:V2SF 4 "gpc_reg_operand" "f") 494 [(match_operand:V2SF 4 "gpc_reg_operand" "f")
515 (match_operand:V2SF 5 "gpc_reg_operand" "f")]) 495 (match_operand:V2SF 5 "gpc_reg_operand" "f")])
516 (match_operand:V2SF 1 "gpc_reg_operand" "f") 496 (match_operand:V2SF 1 "gpc_reg_operand" "f")
517 (match_operand:V2SF 2 "gpc_reg_operand" "f")))] 497 (match_operand:V2SF 2 "gpc_reg_operand" "f")))]
518 "TARGET_PAIRED_FLOAT && flag_unsafe_math_optimizations" 498 "TARGET_PAIRED_FLOAT && flag_unsafe_math_optimizations"
519 " 499 {
520 { 500 if (paired_emit_vector_cond_expr (operands[0], operands[1], operands[2],
521 if (paired_emit_vector_cond_expr (operands[0], operands[1], operands[2], 501 operands[3], operands[4], operands[5]))
522 operands[3], operands[4], operands[5])) 502 DONE;
523 DONE; 503 else
524 else 504 FAIL;
525 FAIL; 505 })
526 }")
527