Mercurial > hg > CbC > CbC_gcc
comparison gcc/config/rs6000/ppc-auxv.h @ 111:04ced10e8804
gcc 7
author | kono |
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date | Fri, 27 Oct 2017 22:46:09 +0900 |
parents | |
children | 84e7813d76e9 |
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68:561a7518be6b | 111:04ced10e8804 |
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1 /* PowerPC support for accessing the AUXV AT_PLATFORM, AT_HWCAP and AT_HWCAP2 | |
2 values from the Thread Control Block (TCB). | |
3 | |
4 Copyright (C) 2016-2017 Free Software Foundation, Inc. | |
5 Contributed by Peter Bergner <bergner@vnet.ibm.com>. | |
6 | |
7 This file is part of GCC. | |
8 | |
9 GCC is free software; you can redistribute it and/or modify it | |
10 under the terms of the GNU General Public License as published | |
11 by the Free Software Foundation; either version 3, or (at your | |
12 option) any later version. | |
13 | |
14 GCC is distributed in the hope that it will be useful, but WITHOUT | |
15 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
16 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public | |
17 License for more details. | |
18 | |
19 Under Section 7 of GPL version 3, you are granted additional | |
20 permissions described in the GCC Runtime Library Exception, version | |
21 3.1, as published by the Free Software Foundation. | |
22 | |
23 You should have received a copy of the GNU General Public License and | |
24 a copy of the GCC Runtime Library Exception along with this program; | |
25 see the files COPYING3 and COPYING.RUNTIME respectively. If not, see | |
26 <http://www.gnu.org/licenses/>. */ | |
27 | |
28 #ifndef _PPC_AUXV_H | |
29 #define _PPC_AUXV_H | |
30 | |
31 /* The PLATFORM value stored in the TCB is offset by _DL_FIRST_PLATFORM. */ | |
32 #define _DL_FIRST_PLATFORM 32 | |
33 | |
34 /* AT_PLATFORM bits. These must match the values defined in GLIBC. */ | |
35 #define PPC_PLATFORM_POWER4 0 | |
36 #define PPC_PLATFORM_PPC970 1 | |
37 #define PPC_PLATFORM_POWER5 2 | |
38 #define PPC_PLATFORM_POWER5_PLUS 3 | |
39 #define PPC_PLATFORM_POWER6 4 | |
40 #define PPC_PLATFORM_CELL_BE 5 | |
41 #define PPC_PLATFORM_POWER6X 6 | |
42 #define PPC_PLATFORM_POWER7 7 | |
43 #define PPC_PLATFORM_PPCA2 8 | |
44 #define PPC_PLATFORM_PPC405 9 | |
45 #define PPC_PLATFORM_PPC440 10 | |
46 #define PPC_PLATFORM_PPC464 11 | |
47 #define PPC_PLATFORM_PPC476 12 | |
48 #define PPC_PLATFORM_POWER8 13 | |
49 #define PPC_PLATFORM_POWER9 14 | |
50 | |
51 /* AT_HWCAP bits. These must match the values defined in the Linux kernel. */ | |
52 #define PPC_FEATURE_32 0x80000000 | |
53 #define PPC_FEATURE_64 0x40000000 | |
54 #define PPC_FEATURE_601_INSTR 0x20000000 | |
55 #define PPC_FEATURE_HAS_ALTIVEC 0x10000000 | |
56 #define PPC_FEATURE_HAS_FPU 0x08000000 | |
57 #define PPC_FEATURE_HAS_MMU 0x04000000 | |
58 #define PPC_FEATURE_HAS_4xxMAC 0x02000000 | |
59 #define PPC_FEATURE_UNIFIED_CACHE 0x01000000 | |
60 #define PPC_FEATURE_HAS_SPE 0x00800000 | |
61 #define PPC_FEATURE_HAS_EFP_SINGLE 0x00400000 | |
62 #define PPC_FEATURE_HAS_EFP_DOUBLE 0x00200000 | |
63 #define PPC_FEATURE_NO_TB 0x00100000 | |
64 #define PPC_FEATURE_POWER4 0x00080000 | |
65 #define PPC_FEATURE_POWER5 0x00040000 | |
66 #define PPC_FEATURE_POWER5_PLUS 0x00020000 | |
67 #define PPC_FEATURE_CELL_BE 0x00010000 | |
68 #define PPC_FEATURE_BOOKE 0x00008000 | |
69 #define PPC_FEATURE_SMT 0x00004000 | |
70 #define PPC_FEATURE_ICACHE_SNOOP 0x00002000 | |
71 #define PPC_FEATURE_ARCH_2_05 0x00001000 | |
72 #define PPC_FEATURE_PA6T 0x00000800 | |
73 #define PPC_FEATURE_HAS_DFP 0x00000400 | |
74 #define PPC_FEATURE_POWER6_EXT 0x00000200 | |
75 #define PPC_FEATURE_ARCH_2_06 0x00000100 | |
76 #define PPC_FEATURE_HAS_VSX 0x00000080 | |
77 #define PPC_FEATURE_PERFMON_COMPAT 0x00000040 | |
78 #define PPC_FEATURE_TRUE_LE 0x00000002 | |
79 #define PPC_FEATURE_PPC_LE 0x00000001 | |
80 | |
81 /* AT_HWCAP2 bits. These must match the values defined in the Linux kernel. */ | |
82 #define PPC_FEATURE2_ARCH_2_07 0x80000000 | |
83 #define PPC_FEATURE2_HAS_HTM 0x40000000 | |
84 #define PPC_FEATURE2_HAS_DSCR 0x20000000 | |
85 #define PPC_FEATURE2_HAS_EBB 0x10000000 | |
86 #define PPC_FEATURE2_HAS_ISEL 0x08000000 | |
87 #define PPC_FEATURE2_HAS_TAR 0x04000000 | |
88 #define PPC_FEATURE2_HAS_VEC_CRYPTO 0x02000000 | |
89 #define PPC_FEATURE2_HTM_NOSC 0x01000000 | |
90 #define PPC_FEATURE2_ARCH_3_00 0x00800000 | |
91 #define PPC_FEATURE2_HAS_IEEE128 0x00400000 | |
92 #define PPC_FEATURE2_DARN 0x00200000 | |
93 #define PPC_FEATURE2_SCV 0x00100000 | |
94 | |
95 | |
96 /* Thread Control Block (TCB) offsets of the AT_PLATFORM, AT_HWCAP and | |
97 AT_HWCAP2 values. These must match the values defined in GLIBC. */ | |
98 #define TCB_PLATFORM_OFFSET ((TARGET_64BIT) ? -28764 : -28724) | |
99 #define TCB_HWCAP_BASE_OFFSET ((TARGET_64BIT) ? -28776 : -28736) | |
100 #define TCB_HWCAP1_OFFSET \ | |
101 ((BYTES_BIG_ENDIAN) ? TCB_HWCAP_BASE_OFFSET : TCB_HWCAP_BASE_OFFSET+4) | |
102 #define TCB_HWCAP2_OFFSET \ | |
103 ((BYTES_BIG_ENDIAN) ? TCB_HWCAP_BASE_OFFSET+4 : TCB_HWCAP_BASE_OFFSET) | |
104 #define TCB_HWCAP_OFFSET(ID) \ | |
105 (((ID) == 0) ? TCB_HWCAP1_OFFSET : TCB_HWCAP2_OFFSET) | |
106 | |
107 #endif /* _PPC_AUXV_H */ |