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comparison gcc/config/s390/subst.md @ 111:04ced10e8804

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gcc 7
author kono
date Fri, 27 Oct 2017 22:46:09 +0900
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68:561a7518be6b 111:04ced10e8804
1 ;;- Machine description for GNU compiler -- S/390 / zSeries version.
2 ;; Subst patterns.
3 ;; Copyright (C) 2016-2017 Free Software Foundation, Inc.
4 ;; Contributed by Andreas Krebbel (Andreas.Krebbel@de.ibm.com)
5
6 ;; This file is part of GCC.
7
8 ;; GCC is free software; you can redistribute it and/or modify it under
9 ;; the terms of the GNU General Public License as published by the Free
10 ;; Software Foundation; either version 3, or (at your option) any later
11 ;; version.
12
13 ;; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 ;; WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 ;; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 ;; for more details.
17
18 ;; You should have received a copy of the GNU General Public License
19 ;; along with GCC; see the file COPYING3. If not see
20 ;; <http://www.gnu.org/licenses/>.
21
22 (define_code_iterator SUBST [rotate ashift lshiftrt ashiftrt])
23 (define_mode_iterator DSI_VI [SI DI V2QI V4QI V8QI V16QI V2HI V4HI V8HI V2SI V4SI V2DI])
24
25 ; This expands an register/immediate operand to a register+immediate
26 ; operand to draw advantage of the address style operand format
27 ; providing a addition for free.
28 (define_subst "addr_style_op_subst"
29 [(set (match_operand:DSI_VI 0 "" "")
30 (SUBST:DSI_VI (match_operand:DSI_VI 1 "" "")
31 (match_operand:SI 2 "" "")))]
32 ""
33 [(set (match_dup 0)
34 (SUBST:DSI_VI (match_dup 1)
35 (plus:SI (match_operand:SI 2 "register_operand" "a")
36 (match_operand 3 "const_int_operand" "n"))))])
37
38 ; Use this in the insn name.
39 (define_subst_attr "addr_style_op" "addr_style_op_subst" "" "_plus")
40
41 ; In the subst pattern the additional const int operand will be used
42 ; as displacement. In the normal version %Y is able to print the
43 ; operand either as displacement or as base register.
44 (define_subst_attr "addr_style_op_ops" "addr_style_op_subst" "%Y2" "%Y3(%2)")
45
46
47 ; This substitution adds an explicit AND operation to the second
48 ; operand. This way previous operations on the now masked out bits
49 ; might get optimized away.
50 (define_subst "masked_op_subst"
51 [(set (match_operand:DSI 0 "" "")
52 (SUBST:DSI (match_operand:DSI 1 "" "")
53 (match_operand:SI 2 "" "")))]
54 ""
55 [(set (match_dup 0)
56 (SUBST:DSI (match_dup 1)
57 (and:SI (match_dup 2)
58 (match_operand:SI 3 "const_int_6bitset_operand" "jm6"))))])
59
60 ; Use this in the insn name.
61 (define_subst_attr "masked_op" "masked_op_subst" "" "_and")
62
63
64
65 ; This is like the addr_style_op substitution above but with a CC clobber.
66 (define_subst "addr_style_op_cc_subst"
67 [(set (match_operand:DSI 0 "" "")
68 (ashiftrt:DSI (match_operand:DSI 1 "" "")
69 (match_operand:SI 2 "" "")))
70 (clobber (reg:CC CC_REGNUM))]
71 "REG_P (operands[2])"
72 [(set (match_dup 0)
73 (ashiftrt:DSI (match_dup 1)
74 (plus:SI (match_dup 2)
75 (match_operand 3 "const_int_operand" "n"))))
76 (clobber (reg:CC CC_REGNUM))])
77
78 (define_subst_attr "addr_style_op_cc" "addr_style_op_cc_subst" "" "_plus")
79 (define_subst_attr "addr_style_op_cc_ops" "addr_style_op_cc_subst" "%Y2" "%Y3(%2)")
80
81
82 ; This is like the masked_op substitution but with a CC clobber.
83 (define_subst "masked_op_cc_subst"
84 [(set (match_operand:DSI 0 "" "")
85 (ashiftrt:DSI (match_operand:DSI 1 "" "")
86 (match_operand:SI 2 "" "")))
87 (clobber (reg:CC CC_REGNUM))]
88 ""
89 [(set (match_dup 0)
90 (ashiftrt:DSI (match_dup 1)
91 (and:SI (match_dup 2)
92 (match_operand:SI 3 "const_int_6bitset_operand" ""))))
93 (clobber (reg:CC CC_REGNUM))])
94 (define_subst_attr "masked_op_cc" "masked_op_cc_subst" "" "_and")
95
96
97 ; This adds an explicit CC reg set to an operation while keeping the
98 ; set for the operation result as well.
99 (define_subst "setcc_subst"
100 [(set (match_operand:DSI 0 "" "")
101 (match_operand:DSI 1 "" ""))
102 (clobber (reg:CC CC_REGNUM))]
103 "s390_match_ccmode(insn, CCSmode)"
104 [(set (reg CC_REGNUM)
105 (compare (match_dup 1) (const_int 0)))
106 (set (match_dup 0) (match_dup 1))])
107
108 ; Use this in the insn name.
109 (define_subst_attr "setcc" "setcc_subst" "" "_cc")
110
111 ; This adds an explicit CC reg set to an operation while dropping the
112 ; result of the operation.
113 (define_subst "cconly_subst"
114 [(set (match_operand:DSI 0 "" "")
115 (match_operand:DSI 1 "" ""))
116 (clobber (reg:CC CC_REGNUM))]
117 "s390_match_ccmode(insn, CCSmode)"
118 [(set (reg CC_REGNUM)
119 (compare (match_dup 1) (const_int 0)))
120 (clobber (match_scratch:DSI 0 "=d,d"))])
121
122 (define_subst_attr "cconly" "cconly_subst" "" "_cconly")
123
124
125 ; Does transformations to switch between patterns unsing risbg +
126 ; clobber CC (z10) and risbgn without clobber (zEC12).
127 (define_subst "clobbercc_or_nocc_subst"
128 [(set (match_operand 0 "" "") (match_operand 1 "" ""))]
129 ""
130 [(set (match_dup 0) (match_dup 1))
131 (clobber (reg:CC CC_REGNUM))])
132
133 ; Use this in the insn name to add the target suffix.
134 (define_subst_attr "clobbercc_or_nocc" "clobbercc_or_nocc_subst"
135 "_nocc" "_clobbercc")
136
137 ; Use this in the condition.
138 (define_subst_attr "z10_or_zEC12_cond" "clobbercc_or_nocc_subst"
139 "TARGET_ZEC12" "TARGET_Z10 && ! TARGET_ZEC12")
140
141 ; Use this instead of the risbg instruction.
142 (define_subst_attr "risbg_n" "clobbercc_or_nocc_subst"
143 "risbgn" "risbg")