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comparison gcc/reginfo.c @ 111:04ced10e8804

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gcc 7
author kono
date Fri, 27 Oct 2017 22:46:09 +0900
parents f6334be47118
children 84e7813d76e9
comparison
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68:561a7518be6b 111:04ced10e8804
1 /* Compute different info about registers. 1 /* Compute different info about registers.
2 Copyright (C) 1987, 1988, 1991, 1992, 1993, 1994, 1995, 1996 2 Copyright (C) 1987-2017 Free Software Foundation, Inc.
3 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008,
4 2009, 2010 Free Software Foundation, Inc.
5 3
6 This file is part of GCC. 4 This file is part of GCC.
7 5
8 GCC is free software; you can redistribute it and/or modify it under 6 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free 7 the terms of the GNU General Public License as published by the Free
28 registers and their classes. */ 26 registers and their classes. */
29 27
30 #include "config.h" 28 #include "config.h"
31 #include "system.h" 29 #include "system.h"
32 #include "coretypes.h" 30 #include "coretypes.h"
33 #include "tm.h" 31 #include "backend.h"
34 #include "hard-reg-set.h" 32 #include "target.h"
35 #include "rtl.h" 33 #include "rtl.h"
36 #include "expr.h" 34 #include "tree.h"
35 #include "df.h"
36 #include "memmodel.h"
37 #include "tm_p.h" 37 #include "tm_p.h"
38 #include "flags.h" 38 #include "insn-config.h"
39 #include "basic-block.h"
40 #include "regs.h" 39 #include "regs.h"
41 #include "addresses.h" 40 #include "ira.h"
42 #include "function.h"
43 #include "insn-config.h"
44 #include "recog.h" 41 #include "recog.h"
42 #include "diagnostic-core.h"
45 #include "reload.h" 43 #include "reload.h"
46 #include "diagnostic-core.h"
47 #include "output.h" 44 #include "output.h"
48 #include "timevar.h"
49 #include "hashtab.h"
50 #include "target.h"
51 #include "tree-pass.h" 45 #include "tree-pass.h"
52 #include "df.h"
53 #include "ira.h"
54 46
55 /* Maximum register number used in this function, plus one. */ 47 /* Maximum register number used in this function, plus one. */
56 48
57 int max_regno; 49 int max_regno;
58 50
51 /* Used to cache the results of simplifiable_subregs. SHAPE is the input
52 parameter and SIMPLIFIABLE_REGS is the result. */
53 struct simplifiable_subreg
54 {
55 simplifiable_subreg (const subreg_shape &);
56
57 subreg_shape shape;
58 HARD_REG_SET simplifiable_regs;
59 };
59 60
60 struct target_hard_regs default_target_hard_regs; 61 struct target_hard_regs default_target_hard_regs;
61 struct target_regs default_target_regs; 62 struct target_regs default_target_regs;
62 #if SWITCHABLE_TARGET 63 #if SWITCHABLE_TARGET
63 struct target_hard_regs *this_target_hard_regs = &default_target_hard_regs; 64 struct target_hard_regs *this_target_hard_regs = &default_target_hard_regs;
85 that are being used for global register decls. 86 that are being used for global register decls.
86 These must be exempt from ordinary flow analysis 87 These must be exempt from ordinary flow analysis
87 and are also considered fixed. */ 88 and are also considered fixed. */
88 char global_regs[FIRST_PSEUDO_REGISTER]; 89 char global_regs[FIRST_PSEUDO_REGISTER];
89 90
91 /* Declaration for the global register. */
92 tree global_regs_decl[FIRST_PSEUDO_REGISTER];
93
90 /* Same information as REGS_INVALIDATED_BY_CALL but in regset form to be used 94 /* Same information as REGS_INVALIDATED_BY_CALL but in regset form to be used
91 in dataflow more conveniently. */ 95 in dataflow more conveniently. */
92 regset regs_invalidated_by_call_regset; 96 regset regs_invalidated_by_call_regset;
97
98 /* Same information as FIXED_REG_SET but in regset form. */
99 regset fixed_reg_set_regset;
93 100
94 /* The bitmap_obstack is used to hold some static variables that 101 /* The bitmap_obstack is used to hold some static variables that
95 should not be reset after each function is compiled. */ 102 should not be reset after each function is compiled. */
96 static bitmap_obstack persistent_obstack; 103 static bitmap_obstack persistent_obstack;
97 104
113 /* Array containing all of the register names. */ 120 /* Array containing all of the register names. */
114 static const char *const initial_reg_names[] = REGISTER_NAMES; 121 static const char *const initial_reg_names[] = REGISTER_NAMES;
115 122
116 /* Array containing all of the register class names. */ 123 /* Array containing all of the register class names. */
117 const char * reg_class_names[] = REG_CLASS_NAMES; 124 const char * reg_class_names[] = REG_CLASS_NAMES;
118
119 #define last_mode_for_init_move_cost \
120 (this_target_regs->x_last_mode_for_init_move_cost)
121 125
122 /* No more global register variables may be declared; true once 126 /* No more global register variables may be declared; true once
123 reginfo has been initialized. */ 127 reginfo has been initialized. */
124 static int no_global_reg_vars = 0; 128 static int no_global_reg_vars = 0;
125 129
184 #endif 188 #endif
185 #ifdef REG_ALLOC_ORDER 189 #ifdef REG_ALLOC_ORDER
186 memcpy (reg_alloc_order, initial_reg_alloc_order, sizeof reg_alloc_order); 190 memcpy (reg_alloc_order, initial_reg_alloc_order, sizeof reg_alloc_order);
187 #endif 191 #endif
188 memcpy (reg_names, initial_reg_names, sizeof reg_names); 192 memcpy (reg_names, initial_reg_names, sizeof reg_names);
189 } 193
190 194 SET_HARD_REG_SET (accessible_reg_set);
191 /* Initialize may_move_cost and friends for mode M. */ 195 SET_HARD_REG_SET (operand_reg_set);
192 void
193 init_move_cost (enum machine_mode m)
194 {
195 static unsigned short last_move_cost[N_REG_CLASSES][N_REG_CLASSES];
196 bool all_match = true;
197 unsigned int i, j;
198
199 gcc_assert (have_regs_of_mode[m]);
200 for (i = 0; i < N_REG_CLASSES; i++)
201 if (contains_reg_of_mode[i][m])
202 for (j = 0; j < N_REG_CLASSES; j++)
203 {
204 int cost;
205 if (!contains_reg_of_mode[j][m])
206 cost = 65535;
207 else
208 {
209 cost = register_move_cost (m, (enum reg_class) i,
210 (enum reg_class) j);
211 gcc_assert (cost < 65535);
212 }
213 all_match &= (last_move_cost[i][j] == cost);
214 last_move_cost[i][j] = cost;
215 }
216 if (all_match && last_mode_for_init_move_cost != -1)
217 {
218 move_cost[m] = move_cost[last_mode_for_init_move_cost];
219 may_move_in_cost[m] = may_move_in_cost[last_mode_for_init_move_cost];
220 may_move_out_cost[m] = may_move_out_cost[last_mode_for_init_move_cost];
221 return;
222 }
223 last_mode_for_init_move_cost = m;
224 move_cost[m] = (move_table *)xmalloc (sizeof (move_table)
225 * N_REG_CLASSES);
226 may_move_in_cost[m] = (move_table *)xmalloc (sizeof (move_table)
227 * N_REG_CLASSES);
228 may_move_out_cost[m] = (move_table *)xmalloc (sizeof (move_table)
229 * N_REG_CLASSES);
230 for (i = 0; i < N_REG_CLASSES; i++)
231 if (contains_reg_of_mode[i][m])
232 for (j = 0; j < N_REG_CLASSES; j++)
233 {
234 int cost;
235 enum reg_class *p1, *p2;
236
237 if (last_move_cost[i][j] == 65535)
238 {
239 move_cost[m][i][j] = 65535;
240 may_move_in_cost[m][i][j] = 65535;
241 may_move_out_cost[m][i][j] = 65535;
242 }
243 else
244 {
245 cost = last_move_cost[i][j];
246
247 for (p2 = &reg_class_subclasses[j][0];
248 *p2 != LIM_REG_CLASSES; p2++)
249 if (*p2 != i && contains_reg_of_mode[*p2][m])
250 cost = MAX (cost, move_cost[m][i][*p2]);
251
252 for (p1 = &reg_class_subclasses[i][0];
253 *p1 != LIM_REG_CLASSES; p1++)
254 if (*p1 != j && contains_reg_of_mode[*p1][m])
255 cost = MAX (cost, move_cost[m][*p1][j]);
256
257 gcc_assert (cost <= 65535);
258 move_cost[m][i][j] = cost;
259
260 if (reg_class_subset_p ((enum reg_class) i, (enum reg_class) j))
261 may_move_in_cost[m][i][j] = 0;
262 else
263 may_move_in_cost[m][i][j] = cost;
264
265 if (reg_class_subset_p ((enum reg_class) j, (enum reg_class) i))
266 may_move_out_cost[m][i][j] = 0;
267 else
268 may_move_out_cost[m][i][j] = cost;
269 }
270 }
271 else
272 for (j = 0; j < N_REG_CLASSES; j++)
273 {
274 move_cost[m][i][j] = 65535;
275 may_move_in_cost[m][i][j] = 65535;
276 may_move_out_cost[m][i][j] = 65535;
277 }
278 } 196 }
279 197
280 /* We need to save copies of some of the register information which 198 /* We need to save copies of some of the register information which
281 can be munged by command-line switches so we can restore it during 199 can be munged by command-line switches so we can restore it during
282 subsequent back-end reinitialization. */ 200 subsequent back-end reinitialization. */
284 static char saved_call_used_regs[FIRST_PSEUDO_REGISTER]; 202 static char saved_call_used_regs[FIRST_PSEUDO_REGISTER];
285 #ifdef CALL_REALLY_USED_REGISTERS 203 #ifdef CALL_REALLY_USED_REGISTERS
286 static char saved_call_really_used_regs[FIRST_PSEUDO_REGISTER]; 204 static char saved_call_really_used_regs[FIRST_PSEUDO_REGISTER];
287 #endif 205 #endif
288 static const char *saved_reg_names[FIRST_PSEUDO_REGISTER]; 206 static const char *saved_reg_names[FIRST_PSEUDO_REGISTER];
207 static HARD_REG_SET saved_accessible_reg_set;
208 static HARD_REG_SET saved_operand_reg_set;
289 209
290 /* Save the register information. */ 210 /* Save the register information. */
291 void 211 void
292 save_register_info (void) 212 save_register_info (void)
293 { 213 {
307 #endif 227 #endif
308 228
309 /* And similarly for reg_names. */ 229 /* And similarly for reg_names. */
310 gcc_assert (sizeof reg_names == sizeof saved_reg_names); 230 gcc_assert (sizeof reg_names == sizeof saved_reg_names);
311 memcpy (saved_reg_names, reg_names, sizeof reg_names); 231 memcpy (saved_reg_names, reg_names, sizeof reg_names);
232 COPY_HARD_REG_SET (saved_accessible_reg_set, accessible_reg_set);
233 COPY_HARD_REG_SET (saved_operand_reg_set, operand_reg_set);
312 } 234 }
313 235
314 /* Restore the register information. */ 236 /* Restore the register information. */
315 static void 237 static void
316 restore_register_info (void) 238 restore_register_info (void)
322 memcpy (call_really_used_regs, saved_call_really_used_regs, 244 memcpy (call_really_used_regs, saved_call_really_used_regs,
323 sizeof call_really_used_regs); 245 sizeof call_really_used_regs);
324 #endif 246 #endif
325 247
326 memcpy (reg_names, saved_reg_names, sizeof reg_names); 248 memcpy (reg_names, saved_reg_names, sizeof reg_names);
249 COPY_HARD_REG_SET (accessible_reg_set, saved_accessible_reg_set);
250 COPY_HARD_REG_SET (operand_reg_set, saved_operand_reg_set);
327 } 251 }
328 252
329 /* After switches have been processed, which perhaps alter 253 /* After switches have been processed, which perhaps alter
330 `fixed_regs' and `call_used_regs', convert them to HARD_REG_SETs. */ 254 `fixed_regs' and `call_used_regs', convert them to HARD_REG_SETs. */
331 static void 255 static void
332 init_reg_sets_1 (void) 256 init_reg_sets_1 (void)
333 { 257 {
334 unsigned int i, j; 258 unsigned int i, j;
335 unsigned int /* enum machine_mode */ m; 259 unsigned int /* machine_mode */ m;
336 260
337 restore_register_info (); 261 restore_register_info ();
338 262
339 #ifdef REG_ALLOC_ORDER 263 #ifdef REG_ALLOC_ORDER
340 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 264 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
446 bitmap_obstack_initialize (&persistent_obstack); 370 bitmap_obstack_initialize (&persistent_obstack);
447 regs_invalidated_by_call_regset = ALLOC_REG_SET (&persistent_obstack); 371 regs_invalidated_by_call_regset = ALLOC_REG_SET (&persistent_obstack);
448 } 372 }
449 else 373 else
450 CLEAR_REG_SET (regs_invalidated_by_call_regset); 374 CLEAR_REG_SET (regs_invalidated_by_call_regset);
451 375 if (!fixed_reg_set_regset)
376 fixed_reg_set_regset = ALLOC_REG_SET (&persistent_obstack);
377 else
378 CLEAR_REG_SET (fixed_reg_set_regset);
379
380 AND_HARD_REG_SET (operand_reg_set, accessible_reg_set);
452 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 381 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
453 { 382 {
383 /* As a special exception, registers whose class is NO_REGS are
384 not accepted by `register_operand'. The reason for this change
385 is to allow the representation of special architecture artifacts
386 (such as a condition code register) without extending the rtl
387 definitions. Since registers of class NO_REGS cannot be used
388 as registers in any case where register classes are examined,
389 it is better to apply this exception in a target-independent way. */
390 if (REGNO_REG_CLASS (i) == NO_REGS)
391 CLEAR_HARD_REG_BIT (operand_reg_set, i);
392
393 /* If a register is too limited to be treated as a register operand,
394 then it should never be allocated to a pseudo. */
395 if (!TEST_HARD_REG_BIT (operand_reg_set, i))
396 {
397 fixed_regs[i] = 1;
398 call_used_regs[i] = 1;
399 }
400
454 /* call_used_regs must include fixed_regs. */ 401 /* call_used_regs must include fixed_regs. */
455 gcc_assert (!fixed_regs[i] || call_used_regs[i]); 402 gcc_assert (!fixed_regs[i] || call_used_regs[i]);
456 #ifdef CALL_REALLY_USED_REGISTERS 403 #ifdef CALL_REALLY_USED_REGISTERS
457 /* call_used_regs must include call_really_used_regs. */ 404 /* call_used_regs must include call_really_used_regs. */
458 gcc_assert (!call_really_used_regs[i] || call_used_regs[i]); 405 gcc_assert (!call_really_used_regs[i] || call_used_regs[i]);
459 #endif 406 #endif
460 407
461 if (fixed_regs[i]) 408 if (fixed_regs[i])
462 SET_HARD_REG_BIT (fixed_reg_set, i); 409 {
410 SET_HARD_REG_BIT (fixed_reg_set, i);
411 SET_REGNO_REG_SET (fixed_reg_set_regset, i);
412 }
463 413
464 if (call_used_regs[i]) 414 if (call_used_regs[i])
465 SET_HARD_REG_BIT (call_used_reg_set, i); 415 SET_HARD_REG_BIT (call_used_reg_set, i);
466 416
467 /* There are a couple of fixed registers that we know are safe to 417 /* There are a couple of fixed registers that we know are safe to
481 SET_HARD_REG_BIT (regs_invalidated_by_call, i); 431 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
482 SET_REGNO_REG_SET (regs_invalidated_by_call_regset, i); 432 SET_REGNO_REG_SET (regs_invalidated_by_call_regset, i);
483 } 433 }
484 else if (i == FRAME_POINTER_REGNUM) 434 else if (i == FRAME_POINTER_REGNUM)
485 ; 435 ;
486 #if !HARD_FRAME_POINTER_IS_FRAME_POINTER 436 else if (!HARD_FRAME_POINTER_IS_FRAME_POINTER
487 else if (i == HARD_FRAME_POINTER_REGNUM) 437 && i == HARD_FRAME_POINTER_REGNUM)
488 ; 438 ;
489 #endif 439 else if (FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
490 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM 440 && i == ARG_POINTER_REGNUM && fixed_regs[i])
491 else if (i == ARG_POINTER_REGNUM && fixed_regs[i])
492 ; 441 ;
493 #endif
494 else if (!PIC_OFFSET_TABLE_REG_CALL_CLOBBERED 442 else if (!PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
495 && i == (unsigned) PIC_OFFSET_TABLE_REGNUM && fixed_regs[i]) 443 && i == (unsigned) PIC_OFFSET_TABLE_REGNUM && fixed_regs[i])
496 ; 444 ;
497 else if (CALL_REALLY_USED_REGNO_P (i)) 445 else if (CALL_REALLY_USED_REGNO_P (i))
498 { 446 {
499 SET_HARD_REG_BIT (regs_invalidated_by_call, i); 447 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
500 SET_REGNO_REG_SET (regs_invalidated_by_call_regset, i); 448 SET_REGNO_REG_SET (regs_invalidated_by_call_regset, i);
501 } 449 }
502 } 450 }
503 451
504 COPY_HARD_REG_SET(call_fixed_reg_set, fixed_reg_set); 452 COPY_HARD_REG_SET (call_fixed_reg_set, fixed_reg_set);
453 COPY_HARD_REG_SET (fixed_nonglobal_reg_set, fixed_reg_set);
505 454
506 /* Preserve global registers if called more than once. */ 455 /* Preserve global registers if called more than once. */
507 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 456 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
508 { 457 {
509 if (global_regs[i]) 458 if (global_regs[i])
517 466
518 memset (have_regs_of_mode, 0, sizeof (have_regs_of_mode)); 467 memset (have_regs_of_mode, 0, sizeof (have_regs_of_mode));
519 memset (contains_reg_of_mode, 0, sizeof (contains_reg_of_mode)); 468 memset (contains_reg_of_mode, 0, sizeof (contains_reg_of_mode));
520 for (m = 0; m < (unsigned int) MAX_MACHINE_MODE; m++) 469 for (m = 0; m < (unsigned int) MAX_MACHINE_MODE; m++)
521 { 470 {
522 HARD_REG_SET ok_regs; 471 HARD_REG_SET ok_regs, ok_regs2;
523 CLEAR_HARD_REG_SET (ok_regs); 472 CLEAR_HARD_REG_SET (ok_regs);
473 CLEAR_HARD_REG_SET (ok_regs2);
524 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++) 474 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
525 if (!fixed_regs [j] && HARD_REGNO_MODE_OK (j, (enum machine_mode) m)) 475 if (!TEST_HARD_REG_BIT (fixed_nonglobal_reg_set, j)
526 SET_HARD_REG_BIT (ok_regs, j); 476 && targetm.hard_regno_mode_ok (j, (machine_mode) m))
477 {
478 SET_HARD_REG_BIT (ok_regs, j);
479 if (!fixed_regs[j])
480 SET_HARD_REG_BIT (ok_regs2, j);
481 }
527 482
528 for (i = 0; i < N_REG_CLASSES; i++) 483 for (i = 0; i < N_REG_CLASSES; i++)
529 if (((unsigned) CLASS_MAX_NREGS ((enum reg_class) i, 484 if ((targetm.class_max_nregs ((reg_class_t) i, (machine_mode) m)
530 (enum machine_mode) m)
531 <= reg_class_size[i]) 485 <= reg_class_size[i])
532 && hard_reg_set_intersect_p (ok_regs, reg_class_contents[i])) 486 && hard_reg_set_intersect_p (ok_regs, reg_class_contents[i]))
533 { 487 {
534 contains_reg_of_mode [i][m] = 1; 488 contains_reg_of_mode[i][m] = 1;
535 have_regs_of_mode [m] = 1; 489 if (hard_reg_set_intersect_p (ok_regs2, reg_class_contents[i]))
490 {
491 have_regs_of_mode[m] = 1;
492 contains_allocatable_reg_of_mode[i][m] = 1;
493 }
536 } 494 }
537 } 495 }
538
539 /* Reset move_cost and friends, making sure we only free shared
540 table entries once. */
541 for (i = 0; i < MAX_MACHINE_MODE; i++)
542 if (move_cost[i])
543 {
544 for (j = 0; j < i && move_cost[i] != move_cost[j]; j++)
545 ;
546 if (i == j)
547 {
548 free (move_cost[i]);
549 free (may_move_in_cost[i]);
550 free (may_move_out_cost[i]);
551 }
552 }
553 memset (move_cost, 0, sizeof move_cost);
554 memset (may_move_in_cost, 0, sizeof may_move_in_cost);
555 memset (may_move_out_cost, 0, sizeof may_move_out_cost);
556 last_mode_for_init_move_cost = -1;
557 } 496 }
558 497
559 /* Compute the table of register modes. 498 /* Compute the table of register modes.
560 These values are used to record death information for individual registers 499 These values are used to record death information for individual registers
561 (as opposed to a multi-register mode). 500 (as opposed to a multi-register mode).
567 { 506 {
568 int i, j; 507 int i, j;
569 508
570 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 509 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
571 for (j = 0; j < MAX_MACHINE_MODE; j++) 510 for (j = 0; j < MAX_MACHINE_MODE; j++)
572 hard_regno_nregs[i][j] = HARD_REGNO_NREGS(i, (enum machine_mode)j); 511 this_target_regs->x_hard_regno_nregs[i][j]
512 = targetm.hard_regno_nregs (i, (machine_mode) j);
573 513
574 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 514 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
575 { 515 {
576 reg_raw_mode[i] = choose_hard_reg_mode (i, 1, false); 516 reg_raw_mode[i] = choose_hard_reg_mode (i, 1, false);
577 517
578 /* If we couldn't find a valid mode, just use the previous mode. 518 /* If we couldn't find a valid mode, just use the previous mode
579 ??? One situation in which we need to do this is on the mips where 519 if it is suitable, otherwise fall back on word_mode. */
580 HARD_REGNO_NREGS (fpreg, [SD]Fmode) returns 2. Ideally we'd like
581 to use DF mode for the even registers and VOIDmode for the odd
582 (for the cpu models where the odd ones are inaccessible). */
583 if (reg_raw_mode[i] == VOIDmode) 520 if (reg_raw_mode[i] == VOIDmode)
584 reg_raw_mode[i] = i == 0 ? word_mode : reg_raw_mode[i-1]; 521 {
522 if (i > 0 && hard_regno_nregs (i, reg_raw_mode[i - 1]) == 1)
523 reg_raw_mode[i] = reg_raw_mode[i - 1];
524 else
525 reg_raw_mode[i] = word_mode;
526 }
585 } 527 }
586 } 528 }
587 529
588 /* Finish initializing the register sets and initialize the register modes. 530 /* Finish initializing the register sets and initialize the register modes.
589 This function might be invoked more than once, if the target has support 531 This function might be invoked more than once, if the target has support
602 reinit_regs (void) 544 reinit_regs (void)
603 { 545 {
604 init_regs (); 546 init_regs ();
605 /* caller_save needs to be re-initialized. */ 547 /* caller_save needs to be re-initialized. */
606 caller_save_initialized_p = false; 548 caller_save_initialized_p = false;
607 ira_init (); 549 if (this_target_rtl->target_specific_initialized)
550 {
551 ira_init ();
552 recog_init ();
553 }
608 } 554 }
609 555
610 /* Initialize some fake stack-frame MEM references for use in 556 /* Initialize some fake stack-frame MEM references for use in
611 memory_move_secondary_cost. */ 557 memory_move_secondary_cost. */
612 void 558 void
613 init_fake_stack_mems (void) 559 init_fake_stack_mems (void)
614 { 560 {
615 int i; 561 int i;
616 562
617 for (i = 0; i < MAX_MACHINE_MODE; i++) 563 for (i = 0; i < MAX_MACHINE_MODE; i++)
618 top_of_stack[i] = gen_rtx_MEM ((enum machine_mode) i, stack_pointer_rtx); 564 top_of_stack[i] = gen_rtx_MEM ((machine_mode) i, stack_pointer_rtx);
619 } 565 }
620 566
621 567
622 /* Compute cost of moving data from a register of class FROM to one of 568 /* Compute cost of moving data from a register of class FROM to one of
623 TO, using MODE. */ 569 TO, using MODE. */
624 570
625 int 571 int
626 register_move_cost (enum machine_mode mode, reg_class_t from, reg_class_t to) 572 register_move_cost (machine_mode mode, reg_class_t from, reg_class_t to)
627 { 573 {
628 return targetm.register_move_cost (mode, from, to); 574 return targetm.register_move_cost (mode, from, to);
629 } 575 }
630 576
631 /* Compute cost of moving registers to/from memory. */ 577 /* Compute cost of moving registers to/from memory. */
578
632 int 579 int
633 memory_move_cost (enum machine_mode mode, enum reg_class rclass, bool in) 580 memory_move_cost (machine_mode mode, reg_class_t rclass, bool in)
634 { 581 {
635 return targetm.memory_move_cost (mode, rclass, in); 582 return targetm.memory_move_cost (mode, rclass, in);
636 } 583 }
637 584
638 /* Compute extra cost of moving registers to/from memory due to reloads. 585 /* Compute extra cost of moving registers to/from memory due to reloads.
639 Only needed if secondary reloads are required for memory moves. */ 586 Only needed if secondary reloads are required for memory moves. */
640 int 587 int
641 memory_move_secondary_cost (enum machine_mode mode, reg_class_t rclass, 588 memory_move_secondary_cost (machine_mode mode, reg_class_t rclass,
642 bool in) 589 bool in)
643 { 590 {
644 reg_class_t altclass; 591 reg_class_t altclass;
645 int partial_cost = 0; 592 int partial_cost = 0;
646 /* We need a memory reference to feed to SECONDARY... macros. */ 593 /* We need a memory reference to feed to SECONDARY... macros. */
673 } 620 }
674 621
675 /* Return a machine mode that is legitimate for hard reg REGNO and large 622 /* Return a machine mode that is legitimate for hard reg REGNO and large
676 enough to save nregs. If we can't find one, return VOIDmode. 623 enough to save nregs. If we can't find one, return VOIDmode.
677 If CALL_SAVED is true, only consider modes that are call saved. */ 624 If CALL_SAVED is true, only consider modes that are call saved. */
678 enum machine_mode 625 machine_mode
679 choose_hard_reg_mode (unsigned int regno ATTRIBUTE_UNUSED, 626 choose_hard_reg_mode (unsigned int regno ATTRIBUTE_UNUSED,
680 unsigned int nregs, bool call_saved) 627 unsigned int nregs, bool call_saved)
681 { 628 {
682 unsigned int /* enum machine_mode */ m; 629 unsigned int /* machine_mode */ m;
683 enum machine_mode found_mode = VOIDmode, mode; 630 machine_mode found_mode = VOIDmode, mode;
684 631
685 /* We first look for the largest integer mode that can be validly 632 /* We first look for the largest integer mode that can be validly
686 held in REGNO. If none, we look for the largest floating-point mode. 633 held in REGNO. If none, we look for the largest floating-point mode.
687 If we still didn't find a valid mode, try CCmode. */ 634 If we still didn't find a valid mode, try CCmode. */
688 635
689 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); 636 FOR_EACH_MODE_IN_CLASS (mode, MODE_INT)
690 mode != VOIDmode; 637 if (hard_regno_nregs (regno, mode) == nregs
691 mode = GET_MODE_WIDER_MODE (mode)) 638 && targetm.hard_regno_mode_ok (regno, mode)
692 if ((unsigned) hard_regno_nregs[regno][mode] == nregs 639 && (!call_saved
693 && HARD_REGNO_MODE_OK (regno, mode) 640 || !targetm.hard_regno_call_part_clobbered (regno, mode))
694 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode))) 641 && GET_MODE_SIZE (mode) > GET_MODE_SIZE (found_mode))
642 found_mode = mode;
643
644 FOR_EACH_MODE_IN_CLASS (mode, MODE_FLOAT)
645 if (hard_regno_nregs (regno, mode) == nregs
646 && targetm.hard_regno_mode_ok (regno, mode)
647 && (!call_saved
648 || !targetm.hard_regno_call_part_clobbered (regno, mode))
649 && GET_MODE_SIZE (mode) > GET_MODE_SIZE (found_mode))
650 found_mode = mode;
651
652 FOR_EACH_MODE_IN_CLASS (mode, MODE_VECTOR_FLOAT)
653 if (hard_regno_nregs (regno, mode) == nregs
654 && targetm.hard_regno_mode_ok (regno, mode)
655 && (!call_saved
656 || !targetm.hard_regno_call_part_clobbered (regno, mode))
657 && GET_MODE_SIZE (mode) > GET_MODE_SIZE (found_mode))
658 found_mode = mode;
659
660 FOR_EACH_MODE_IN_CLASS (mode, MODE_VECTOR_INT)
661 if (hard_regno_nregs (regno, mode) == nregs
662 && targetm.hard_regno_mode_ok (regno, mode)
663 && (!call_saved
664 || !targetm.hard_regno_call_part_clobbered (regno, mode))
665 && GET_MODE_SIZE (mode) > GET_MODE_SIZE (found_mode))
695 found_mode = mode; 666 found_mode = mode;
696 667
697 if (found_mode != VOIDmode) 668 if (found_mode != VOIDmode)
698 return found_mode; 669 return found_mode;
699 670
700 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
701 mode != VOIDmode;
702 mode = GET_MODE_WIDER_MODE (mode))
703 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
704 && HARD_REGNO_MODE_OK (regno, mode)
705 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
706 found_mode = mode;
707
708 if (found_mode != VOIDmode)
709 return found_mode;
710
711 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
712 mode != VOIDmode;
713 mode = GET_MODE_WIDER_MODE (mode))
714 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
715 && HARD_REGNO_MODE_OK (regno, mode)
716 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
717 found_mode = mode;
718
719 if (found_mode != VOIDmode)
720 return found_mode;
721
722 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
723 mode != VOIDmode;
724 mode = GET_MODE_WIDER_MODE (mode))
725 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
726 && HARD_REGNO_MODE_OK (regno, mode)
727 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
728 found_mode = mode;
729
730 if (found_mode != VOIDmode)
731 return found_mode;
732
733 /* Iterate over all of the CCmodes. */ 671 /* Iterate over all of the CCmodes. */
734 for (m = (unsigned int) CCmode; m < (unsigned int) NUM_MACHINE_MODES; ++m) 672 for (m = (unsigned int) CCmode; m < (unsigned int) NUM_MACHINE_MODES; ++m)
735 { 673 {
736 mode = (enum machine_mode) m; 674 mode = (machine_mode) m;
737 if ((unsigned) hard_regno_nregs[regno][mode] == nregs 675 if (hard_regno_nregs (regno, mode) == nregs
738 && HARD_REGNO_MODE_OK (regno, mode) 676 && targetm.hard_regno_mode_ok (regno, mode)
739 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode))) 677 && (!call_saved
678 || !targetm.hard_regno_call_part_clobbered (regno, mode)))
740 return mode; 679 return mode;
741 } 680 }
742 681
743 /* We can't find a mode valid for this register. */ 682 /* We can't find a mode valid for this register. */
744 return VOIDmode; 683 return VOIDmode;
822 } 761 }
823 } 762 }
824 763
825 /* Mark register number I as global. */ 764 /* Mark register number I as global. */
826 void 765 void
827 globalize_reg (int i) 766 globalize_reg (tree decl, int i)
828 { 767 {
768 location_t loc = DECL_SOURCE_LOCATION (decl);
769
829 #ifdef STACK_REGS 770 #ifdef STACK_REGS
830 if (IN_RANGE (i, FIRST_STACK_REG, LAST_STACK_REG)) 771 if (IN_RANGE (i, FIRST_STACK_REG, LAST_STACK_REG))
831 { 772 {
832 error ("stack register used for global register variable"); 773 error ("stack register used for global register variable");
833 return; 774 return;
834 } 775 }
835 #endif 776 #endif
836 777
837 if (fixed_regs[i] == 0 && no_global_reg_vars) 778 if (fixed_regs[i] == 0 && no_global_reg_vars)
838 error ("global register variable follows a function definition"); 779 error_at (loc, "global register variable follows a function definition");
839 780
840 if (global_regs[i]) 781 if (global_regs[i])
841 { 782 {
842 warning (0, "register used for two global register variables"); 783 warning_at (loc, 0,
784 "register of %qD used for multiple global register variables",
785 decl);
786 inform (DECL_SOURCE_LOCATION (global_regs_decl[i]),
787 "conflicts with %qD", global_regs_decl[i]);
843 return; 788 return;
844 } 789 }
845 790
846 if (call_used_regs[i] && ! fixed_regs[i]) 791 if (call_used_regs[i] && ! fixed_regs[i])
847 warning (0, "call-clobbered register used for global register variable"); 792 warning_at (loc, 0, "call-clobbered register used for global register variable");
848 793
849 global_regs[i] = 1; 794 global_regs[i] = 1;
795 global_regs_decl[i] = decl;
850 796
851 /* If we're globalizing the frame pointer, we need to set the 797 /* If we're globalizing the frame pointer, we need to set the
852 appropriate regs_invalidated_by_call bit, even if it's already 798 appropriate regs_invalidated_by_call bit, even if it's already
853 set in fixed_regs. */ 799 set in fixed_regs. */
854 if (i != STACK_POINTER_REGNUM) 800 if (i != STACK_POINTER_REGNUM)
888 It might appear to be more general to have a bitmask of classes here, 834 It might appear to be more general to have a bitmask of classes here,
889 but since it is recommended that there be a class corresponding to the 835 but since it is recommended that there be a class corresponding to the
890 union of most major pair of classes, that generality is not required. */ 836 union of most major pair of classes, that generality is not required. */
891 char altclass; 837 char altclass;
892 838
893 /* coverclass is a register class that IRA uses for allocating 839 /* allocnoclass is a register class that IRA uses for allocating
894 the pseudo. */ 840 the pseudo. */
895 char coverclass; 841 char allocnoclass;
896 }; 842 };
897 843
898 /* Record preferences of each pseudo. This is available after RA is 844 /* Record preferences of each pseudo. This is available after RA is
899 run. */ 845 run. */
900 static struct reg_pref *reg_pref; 846 static struct reg_pref *reg_pref;
901 847
902 /* Current size of reg_info. */ 848 /* Current size of reg_info. */
903 static int reg_info_size; 849 static int reg_info_size;
850 /* Max_reg_num still last resize_reg_info call. */
851 static int max_regno_since_last_resize;
904 852
905 /* Return the reg_class in which pseudo reg number REGNO is best allocated. 853 /* Return the reg_class in which pseudo reg number REGNO is best allocated.
906 This function is sometimes called before the info has been computed. 854 This function is sometimes called before the info has been computed.
907 When that happens, just return GENERAL_REGS, which is innocuous. */ 855 When that happens, just return GENERAL_REGS, which is innocuous. */
908 enum reg_class 856 enum reg_class
909 reg_preferred_class (int regno) 857 reg_preferred_class (int regno)
910 { 858 {
911 if (reg_pref == 0) 859 if (reg_pref == 0)
912 return GENERAL_REGS; 860 return GENERAL_REGS;
913 861
862 gcc_assert (regno < reg_info_size);
914 return (enum reg_class) reg_pref[regno].prefclass; 863 return (enum reg_class) reg_pref[regno].prefclass;
915 } 864 }
916 865
917 enum reg_class 866 enum reg_class
918 reg_alternate_class (int regno) 867 reg_alternate_class (int regno)
919 { 868 {
920 if (reg_pref == 0) 869 if (reg_pref == 0)
921 return ALL_REGS; 870 return ALL_REGS;
922 871
872 gcc_assert (regno < reg_info_size);
923 return (enum reg_class) reg_pref[regno].altclass; 873 return (enum reg_class) reg_pref[regno].altclass;
924 } 874 }
925 875
926 /* Return the reg_class which is used by IRA for its allocation. */ 876 /* Return the reg_class which is used by IRA for its allocation. */
927 enum reg_class 877 enum reg_class
928 reg_cover_class (int regno) 878 reg_allocno_class (int regno)
929 { 879 {
930 if (reg_pref == 0) 880 if (reg_pref == 0)
931 return NO_REGS; 881 return NO_REGS;
932 882
933 return (enum reg_class) reg_pref[regno].coverclass; 883 gcc_assert (regno < reg_info_size);
884 return (enum reg_class) reg_pref[regno].allocnoclass;
934 } 885 }
935 886
936 887
937 888
938 /* Allocate space for reg info. */ 889 /* Allocate space for reg info and initilize it. */
939 static void 890 static void
940 allocate_reg_info (void) 891 allocate_reg_info (void)
941 { 892 {
942 reg_info_size = max_reg_num (); 893 int i;
894
895 max_regno_since_last_resize = max_reg_num ();
896 reg_info_size = max_regno_since_last_resize * 3 / 2 + 1;
943 gcc_assert (! reg_pref && ! reg_renumber); 897 gcc_assert (! reg_pref && ! reg_renumber);
944 reg_renumber = XNEWVEC (short, reg_info_size); 898 reg_renumber = XNEWVEC (short, reg_info_size);
945 reg_pref = XCNEWVEC (struct reg_pref, reg_info_size); 899 reg_pref = XCNEWVEC (struct reg_pref, reg_info_size);
946 memset (reg_renumber, -1, reg_info_size * sizeof (short)); 900 memset (reg_renumber, -1, reg_info_size * sizeof (short));
947 } 901 for (i = 0; i < reg_info_size; i++)
948 902 {
949 903 reg_pref[i].prefclass = GENERAL_REGS;
950 /* Resize reg info. The new elements will be uninitialized. Return 904 reg_pref[i].altclass = ALL_REGS;
951 TRUE if new elements (for new pseudos) were added. */ 905 reg_pref[i].allocnoclass = GENERAL_REGS;
906 }
907 }
908
909
910 /* Resize reg info. The new elements will be initialized. Return TRUE
911 if new pseudos were added since the last call. */
952 bool 912 bool
953 resize_reg_info (void) 913 resize_reg_info (void)
954 { 914 {
955 int old; 915 int old, i;
916 bool change_p;
956 917
957 if (reg_pref == NULL) 918 if (reg_pref == NULL)
958 { 919 {
959 allocate_reg_info (); 920 allocate_reg_info ();
960 return true; 921 return true;
961 } 922 }
962 if (reg_info_size == max_reg_num ()) 923 change_p = max_regno_since_last_resize != max_reg_num ();
963 return false; 924 max_regno_since_last_resize = max_reg_num ();
925 if (reg_info_size >= max_reg_num ())
926 return change_p;
964 old = reg_info_size; 927 old = reg_info_size;
965 reg_info_size = max_reg_num (); 928 reg_info_size = max_reg_num () * 3 / 2 + 1;
966 gcc_assert (reg_pref && reg_renumber); 929 gcc_assert (reg_pref && reg_renumber);
967 reg_renumber = XRESIZEVEC (short, reg_renumber, reg_info_size); 930 reg_renumber = XRESIZEVEC (short, reg_renumber, reg_info_size);
968 reg_pref = XRESIZEVEC (struct reg_pref, reg_pref, reg_info_size); 931 reg_pref = XRESIZEVEC (struct reg_pref, reg_pref, reg_info_size);
969 memset (reg_pref + old, -1, 932 memset (reg_pref + old, -1,
970 (reg_info_size - old) * sizeof (struct reg_pref)); 933 (reg_info_size - old) * sizeof (struct reg_pref));
971 memset (reg_renumber + old, -1, (reg_info_size - old) * sizeof (short)); 934 memset (reg_renumber + old, -1, (reg_info_size - old) * sizeof (short));
935 for (i = old; i < reg_info_size; i++)
936 {
937 reg_pref[i].prefclass = GENERAL_REGS;
938 reg_pref[i].altclass = ALL_REGS;
939 reg_pref[i].allocnoclass = GENERAL_REGS;
940 }
972 return true; 941 return true;
973 } 942 }
974 943
975 944
976 /* Free up the space allocated by allocate_reg_info. */ 945 /* Free up the space allocated by allocate_reg_info. */
995 reginfo_init (void) 964 reginfo_init (void)
996 { 965 {
997 if (df) 966 if (df)
998 df_compute_regs_ever_live (true); 967 df_compute_regs_ever_live (true);
999 968
1000 /* This prevents dump_flow_info from losing if called 969 /* This prevents dump_reg_info from losing if called
1001 before reginfo is run. */ 970 before reginfo is run. */
1002 reg_pref = NULL; 971 reg_pref = NULL;
972 reg_info_size = max_regno_since_last_resize = 0;
1003 /* No more global register variables may be declared. */ 973 /* No more global register variables may be declared. */
1004 no_global_reg_vars = 1; 974 no_global_reg_vars = 1;
1005 return 1; 975 return 1;
1006 } 976 }
1007 977
1008 struct rtl_opt_pass pass_reginfo_init = 978 namespace {
1009 { 979
1010 { 980 const pass_data pass_data_reginfo_init =
1011 RTL_PASS, 981 {
1012 "reginfo", /* name */ 982 RTL_PASS, /* type */
1013 NULL, /* gate */ 983 "reginfo", /* name */
1014 reginfo_init, /* execute */ 984 OPTGROUP_NONE, /* optinfo_flags */
1015 NULL, /* sub */ 985 TV_NONE, /* tv_id */
1016 NULL, /* next */ 986 0, /* properties_required */
1017 0, /* static_pass_number */ 987 0, /* properties_provided */
1018 TV_NONE, /* tv_id */ 988 0, /* properties_destroyed */
1019 0, /* properties_required */ 989 0, /* todo_flags_start */
1020 0, /* properties_provided */ 990 0, /* todo_flags_finish */
1021 0, /* properties_destroyed */
1022 0, /* todo_flags_start */
1023 0 /* todo_flags_finish */
1024 }
1025 }; 991 };
1026 992
993 class pass_reginfo_init : public rtl_opt_pass
994 {
995 public:
996 pass_reginfo_init (gcc::context *ctxt)
997 : rtl_opt_pass (pass_data_reginfo_init, ctxt)
998 {}
999
1000 /* opt_pass methods: */
1001 virtual unsigned int execute (function *) { return reginfo_init (); }
1002
1003 }; // class pass_reginfo_init
1004
1005 } // anon namespace
1006
1007 rtl_opt_pass *
1008 make_pass_reginfo_init (gcc::context *ctxt)
1009 {
1010 return new pass_reginfo_init (ctxt);
1011 }
1012
1027 1013
1028 1014
1029 /* Set up preferred, alternate, and cover classes for REGNO as 1015 /* Set up preferred, alternate, and allocno classes for REGNO as
1030 PREFCLASS, ALTCLASS, and COVERCLASS. */ 1016 PREFCLASS, ALTCLASS, and ALLOCNOCLASS. */
1031 void 1017 void
1032 setup_reg_classes (int regno, 1018 setup_reg_classes (int regno,
1033 enum reg_class prefclass, enum reg_class altclass, 1019 enum reg_class prefclass, enum reg_class altclass,
1034 enum reg_class coverclass) 1020 enum reg_class allocnoclass)
1035 { 1021 {
1036 if (reg_pref == NULL) 1022 if (reg_pref == NULL)
1037 return; 1023 return;
1038 gcc_assert (reg_info_size == max_reg_num ()); 1024 gcc_assert (reg_info_size >= max_reg_num ());
1039 reg_pref[regno].prefclass = prefclass; 1025 reg_pref[regno].prefclass = prefclass;
1040 reg_pref[regno].altclass = altclass; 1026 reg_pref[regno].altclass = altclass;
1041 reg_pref[regno].coverclass = coverclass; 1027 reg_pref[regno].allocnoclass = allocnoclass;
1042 } 1028 }
1043 1029
1044 1030
1045 /* This is the `regscan' pass of the compiler, run just before cse and 1031 /* This is the `regscan' pass of the compiler, run just before cse and
1046 again just before loop. It finds the first and last use of each 1032 again just before loop. It finds the first and last use of each
1047 pseudo-register. */ 1033 pseudo-register. */
1048 1034
1049 static void reg_scan_mark_refs (rtx, rtx); 1035 static void reg_scan_mark_refs (rtx, rtx_insn *);
1050 1036
1051 void 1037 void
1052 reg_scan (rtx f, unsigned int nregs ATTRIBUTE_UNUSED) 1038 reg_scan (rtx_insn *f, unsigned int nregs ATTRIBUTE_UNUSED)
1053 { 1039 {
1054 rtx insn; 1040 rtx_insn *insn;
1055 1041
1056 timevar_push (TV_REG_SCAN); 1042 timevar_push (TV_REG_SCAN);
1057 1043
1058 for (insn = f; insn; insn = NEXT_INSN (insn)) 1044 for (insn = f; insn; insn = NEXT_INSN (insn))
1059 if (INSN_P (insn)) 1045 if (INSN_P (insn))
1070 /* X is the expression to scan. INSN is the insn it appears in. 1056 /* X is the expression to scan. INSN is the insn it appears in.
1071 NOTE_FLAG is nonzero if X is from INSN's notes rather than its body. 1057 NOTE_FLAG is nonzero if X is from INSN's notes rather than its body.
1072 We should only record information for REGs with numbers 1058 We should only record information for REGs with numbers
1073 greater than or equal to MIN_REGNO. */ 1059 greater than or equal to MIN_REGNO. */
1074 static void 1060 static void
1075 reg_scan_mark_refs (rtx x, rtx insn) 1061 reg_scan_mark_refs (rtx x, rtx_insn *insn)
1076 { 1062 {
1077 enum rtx_code code; 1063 enum rtx_code code;
1078 rtx dest; 1064 rtx dest;
1079 rtx note; 1065 rtx note;
1080 1066
1082 return; 1068 return;
1083 code = GET_CODE (x); 1069 code = GET_CODE (x);
1084 switch (code) 1070 switch (code)
1085 { 1071 {
1086 case CONST: 1072 case CONST:
1087 case CONST_INT: 1073 CASE_CONST_ANY:
1088 case CONST_DOUBLE:
1089 case CONST_FIXED:
1090 case CONST_VECTOR:
1091 case CC0: 1074 case CC0:
1092 case PC: 1075 case PC:
1093 case SYMBOL_REF: 1076 case SYMBOL_REF:
1094 case LABEL_REF: 1077 case LABEL_REF:
1095 case ADDR_VEC: 1078 case ADDR_VEC:
1103 if (XEXP (x, 1)) 1086 if (XEXP (x, 1))
1104 reg_scan_mark_refs (XEXP (x, 1), insn); 1087 reg_scan_mark_refs (XEXP (x, 1), insn);
1105 break; 1088 break;
1106 1089
1107 case INSN_LIST: 1090 case INSN_LIST:
1091 case INT_LIST:
1108 if (XEXP (x, 1)) 1092 if (XEXP (x, 1))
1109 reg_scan_mark_refs (XEXP (x, 1), insn); 1093 reg_scan_mark_refs (XEXP (x, 1), insn);
1110 break; 1094 break;
1111 1095
1112 case CLOBBER: 1096 case CLOBBER:
1116 1100
1117 case SET: 1101 case SET:
1118 /* Count a set of the destination if it is a register. */ 1102 /* Count a set of the destination if it is a register. */
1119 for (dest = SET_DEST (x); 1103 for (dest = SET_DEST (x);
1120 GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART 1104 GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
1121 || GET_CODE (dest) == ZERO_EXTEND; 1105 || GET_CODE (dest) == ZERO_EXTRACT;
1122 dest = XEXP (dest, 0)) 1106 dest = XEXP (dest, 0))
1123 ; 1107 ;
1124 1108
1125 /* If this is setting a pseudo from another pseudo or the sum of a 1109 /* If this is setting a pseudo from another pseudo or the sum of a
1126 pseudo and a constant integer and the other pseudo is known to be 1110 pseudo and a constant integer and the other pseudo is known to be
1170 REG_POINTER (SET_DEST (x)) = 1; 1154 REG_POINTER (SET_DEST (x)) = 1;
1171 1155
1172 /* If this is setting a register from a register or from a simple 1156 /* If this is setting a register from a register or from a simple
1173 conversion of a register, propagate REG_EXPR. */ 1157 conversion of a register, propagate REG_EXPR. */
1174 if (REG_P (dest) && !REG_ATTRS (dest)) 1158 if (REG_P (dest) && !REG_ATTRS (dest))
1175 { 1159 set_reg_attrs_from_value (dest, SET_SRC (x));
1176 rtx src = SET_SRC (x); 1160
1177 1161 /* fall through */
1178 while (GET_CODE (src) == SIGN_EXTEND
1179 || GET_CODE (src) == ZERO_EXTEND
1180 || GET_CODE (src) == TRUNCATE
1181 || (GET_CODE (src) == SUBREG && subreg_lowpart_p (src)))
1182 src = XEXP (src, 0);
1183
1184 set_reg_attrs_from_value (dest, src);
1185 }
1186
1187 /* ... fall through ... */
1188 1162
1189 default: 1163 default:
1190 { 1164 {
1191 const char *fmt = GET_RTX_FORMAT (code); 1165 const char *fmt = GET_RTX_FORMAT (code);
1192 int i; 1166 int i;
1227 || hard_reg_set_intersect_p (reg_class_contents[(int) c1], 1201 || hard_reg_set_intersect_p (reg_class_contents[(int) c1],
1228 reg_class_contents[(int) c2])); 1202 reg_class_contents[(int) c2]));
1229 } 1203 }
1230 1204
1231 1205
1206 inline hashval_t
1207 simplifiable_subregs_hasher::hash (const simplifiable_subreg *value)
1208 {
1209 return value->shape.unique_id ();
1210 }
1211
1212 inline bool
1213 simplifiable_subregs_hasher::equal (const simplifiable_subreg *value,
1214 const subreg_shape *compare)
1215 {
1216 return value->shape == *compare;
1217 }
1218
1219 inline simplifiable_subreg::simplifiable_subreg (const subreg_shape &shape_in)
1220 : shape (shape_in)
1221 {
1222 CLEAR_HARD_REG_SET (simplifiable_regs);
1223 }
1224
1225 /* Return the set of hard registers that are able to form the subreg
1226 described by SHAPE. */
1227
1228 const HARD_REG_SET &
1229 simplifiable_subregs (const subreg_shape &shape)
1230 {
1231 if (!this_target_hard_regs->x_simplifiable_subregs)
1232 this_target_hard_regs->x_simplifiable_subregs
1233 = new hash_table <simplifiable_subregs_hasher> (30);
1234 simplifiable_subreg **slot
1235 = (this_target_hard_regs->x_simplifiable_subregs
1236 ->find_slot_with_hash (&shape, shape.unique_id (), INSERT));
1237
1238 if (!*slot)
1239 {
1240 simplifiable_subreg *info = new simplifiable_subreg (shape);
1241 for (unsigned int i = 0; i < FIRST_PSEUDO_REGISTER; ++i)
1242 if (targetm.hard_regno_mode_ok (i, shape.inner_mode)
1243 && simplify_subreg_regno (i, shape.inner_mode, shape.offset,
1244 shape.outer_mode) >= 0)
1245 SET_HARD_REG_BIT (info->simplifiable_regs, i);
1246 *slot = info;
1247 }
1248 return (*slot)->simplifiable_regs;
1249 }
1232 1250
1233 /* Passes for keeping and updating info about modes of registers 1251 /* Passes for keeping and updating info about modes of registers
1234 inside subregisters. */ 1252 inside subregisters. */
1235 1253
1236 #ifdef CANNOT_CHANGE_MODE_CLASS 1254 static HARD_REG_SET **valid_mode_changes;
1237 1255 static obstack valid_mode_changes_obstack;
1238 static bitmap invalid_mode_changes; 1256
1257 /* Restrict the choice of register for SUBREG_REG (SUBREG) based
1258 on information about SUBREG.
1259
1260 If PARTIAL_DEF, SUBREG is a partial definition of a multipart inner
1261 register and we want to ensure that the other parts of the inner
1262 register are correctly preserved. If !PARTIAL_DEF we need to
1263 ensure that SUBREG itself can be formed. */
1239 1264
1240 static void 1265 static void
1241 record_subregs_of_mode (rtx subreg, bitmap subregs_of_mode) 1266 record_subregs_of_mode (rtx subreg, bool partial_def)
1242 { 1267 {
1243 enum machine_mode mode;
1244 unsigned int regno; 1268 unsigned int regno;
1245 1269
1246 if (!REG_P (SUBREG_REG (subreg))) 1270 if (!REG_P (SUBREG_REG (subreg)))
1247 return; 1271 return;
1248 1272
1249 regno = REGNO (SUBREG_REG (subreg)); 1273 regno = REGNO (SUBREG_REG (subreg));
1250 mode = GET_MODE (subreg);
1251
1252 if (regno < FIRST_PSEUDO_REGISTER) 1274 if (regno < FIRST_PSEUDO_REGISTER)
1253 return; 1275 return;
1254 1276
1255 if (bitmap_set_bit (subregs_of_mode, 1277 subreg_shape shape (shape_of_subreg (subreg));
1256 regno * NUM_MACHINE_MODES + (unsigned int) mode)) 1278 if (partial_def)
1257 { 1279 {
1258 unsigned int rclass; 1280 /* The number of independently-accessible SHAPE.outer_mode values
1259 for (rclass = 0; rclass < N_REG_CLASSES; rclass++) 1281 in SHAPE.inner_mode is GET_MODE_SIZE (SHAPE.inner_mode) / SIZE.
1260 if (!bitmap_bit_p (invalid_mode_changes, 1282 We need to check that the assignment will preserve all the other
1261 regno * N_REG_CLASSES + rclass) 1283 SIZE-byte chunks in the inner register besides the one that
1262 && CANNOT_CHANGE_MODE_CLASS (PSEUDO_REGNO_MODE (regno), 1284 includes SUBREG.
1263 mode, (enum reg_class) rclass)) 1285
1264 bitmap_set_bit (invalid_mode_changes, 1286 In practice it is enough to check whether an equivalent
1265 regno * N_REG_CLASSES + rclass); 1287 SHAPE.inner_mode value in an adjacent SIZE-byte chunk can be formed.
1288 If the underlying registers are small enough, both subregs will
1289 be valid. If the underlying registers are too large, one of the
1290 subregs will be invalid.
1291
1292 This relies on the fact that we've already been passed
1293 SUBREG with PARTIAL_DEF set to false. */
1294 unsigned int size = MAX (REGMODE_NATURAL_SIZE (shape.inner_mode),
1295 GET_MODE_SIZE (shape.outer_mode));
1296 gcc_checking_assert (size < GET_MODE_SIZE (shape.inner_mode));
1297 if (shape.offset >= size)
1298 shape.offset -= size;
1299 else
1300 shape.offset += size;
1301 }
1302
1303 if (valid_mode_changes[regno])
1304 AND_HARD_REG_SET (*valid_mode_changes[regno],
1305 simplifiable_subregs (shape));
1306 else
1307 {
1308 valid_mode_changes[regno]
1309 = XOBNEW (&valid_mode_changes_obstack, HARD_REG_SET);
1310 COPY_HARD_REG_SET (*valid_mode_changes[regno],
1311 simplifiable_subregs (shape));
1266 } 1312 }
1267 } 1313 }
1268 1314
1269 /* Call record_subregs_of_mode for all the subregs in X. */ 1315 /* Call record_subregs_of_mode for all the subregs in X. */
1270 static void 1316 static void
1271 find_subregs_of_mode (rtx x, bitmap subregs_of_mode) 1317 find_subregs_of_mode (rtx x)
1272 { 1318 {
1273 enum rtx_code code = GET_CODE (x); 1319 enum rtx_code code = GET_CODE (x);
1274 const char * const fmt = GET_RTX_FORMAT (code); 1320 const char * const fmt = GET_RTX_FORMAT (code);
1275 int i; 1321 int i;
1276 1322
1277 if (code == SUBREG) 1323 if (code == SUBREG)
1278 record_subregs_of_mode (x, subregs_of_mode); 1324 record_subregs_of_mode (x, false);
1279 1325
1280 /* Time for some deep diving. */ 1326 /* Time for some deep diving. */
1281 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 1327 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1282 { 1328 {
1283 if (fmt[i] == 'e') 1329 if (fmt[i] == 'e')
1284 find_subregs_of_mode (XEXP (x, i), subregs_of_mode); 1330 find_subregs_of_mode (XEXP (x, i));
1285 else if (fmt[i] == 'E') 1331 else if (fmt[i] == 'E')
1286 { 1332 {
1287 int j; 1333 int j;
1288 for (j = XVECLEN (x, i) - 1; j >= 0; j--) 1334 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1289 find_subregs_of_mode (XVECEXP (x, i, j), subregs_of_mode); 1335 find_subregs_of_mode (XVECEXP (x, i, j));
1290 } 1336 }
1291 } 1337 }
1292 } 1338 }
1293 1339
1294 void 1340 void
1295 init_subregs_of_mode (void) 1341 init_subregs_of_mode (void)
1296 { 1342 {
1297 basic_block bb; 1343 basic_block bb;
1298 rtx insn; 1344 rtx_insn *insn;
1299 bitmap_obstack srom_obstack; 1345
1300 bitmap subregs_of_mode; 1346 gcc_obstack_init (&valid_mode_changes_obstack);
1301 1347 valid_mode_changes = XCNEWVEC (HARD_REG_SET *, max_reg_num ());
1302 gcc_assert (invalid_mode_changes == NULL); 1348
1303 invalid_mode_changes = BITMAP_ALLOC (NULL); 1349 FOR_EACH_BB_FN (bb, cfun)
1304 bitmap_obstack_initialize (&srom_obstack);
1305 subregs_of_mode = BITMAP_ALLOC (&srom_obstack);
1306
1307 FOR_EACH_BB (bb)
1308 FOR_BB_INSNS (bb, insn) 1350 FOR_BB_INSNS (bb, insn)
1309 if (NONDEBUG_INSN_P (insn)) 1351 if (NONDEBUG_INSN_P (insn))
1310 find_subregs_of_mode (PATTERN (insn), subregs_of_mode); 1352 {
1311 1353 find_subregs_of_mode (PATTERN (insn));
1312 BITMAP_FREE (subregs_of_mode); 1354 df_ref def;
1313 bitmap_obstack_release (&srom_obstack); 1355 FOR_EACH_INSN_DEF (def, insn)
1314 } 1356 if (DF_REF_FLAGS_IS_SET (def, DF_REF_PARTIAL)
1315 1357 && read_modify_subreg_p (DF_REF_REG (def)))
1316 /* Return 1 if REGNO has had an invalid mode change in CLASS from FROM 1358 record_subregs_of_mode (DF_REF_REG (def), true);
1317 mode. */ 1359 }
1318 bool 1360 }
1319 invalid_mode_change_p (unsigned int regno, 1361
1320 enum reg_class rclass) 1362 const HARD_REG_SET *
1321 { 1363 valid_mode_changes_for_regno (unsigned int regno)
1322 return bitmap_bit_p (invalid_mode_changes, 1364 {
1323 regno * N_REG_CLASSES + (unsigned) rclass); 1365 return valid_mode_changes[regno];
1324 } 1366 }
1325 1367
1326 void 1368 void
1327 finish_subregs_of_mode (void) 1369 finish_subregs_of_mode (void)
1328 { 1370 {
1329 BITMAP_FREE (invalid_mode_changes); 1371 XDELETEVEC (valid_mode_changes);
1330 } 1372 obstack_free (&valid_mode_changes_obstack, NULL);
1331 #else 1373 }
1332 void 1374
1333 init_subregs_of_mode (void) 1375 /* Free all data attached to the structure. This isn't a destructor because
1334 { 1376 we don't want to run on exit. */
1335 } 1377
1336 void 1378 void
1337 finish_subregs_of_mode (void) 1379 target_hard_regs::finalize ()
1338 { 1380 {
1339 } 1381 delete x_simplifiable_subregs;
1340 1382 }
1341 #endif /* CANNOT_CHANGE_MODE_CLASS */