CbC/CbC_gcc: gcc/rtl.def comparison

comparison gcc/rtl.def @ 111:04ced10e8804

gcc 7

author	kono
date	Fri, 27 Oct 2017 22:46:09 +0900
parents	f6334be47118
children	84e7813d76e9

comparison

equal deleted inserted replaced

-:561a7518be6b
+:04ced10e8804
 /* This file contains the definitions and documentation for the
 Register Transfer Expressions (rtx's) that make up the
 Register Transfer Language (rtl) used in the Back End of the GNU compiler.
-Copyright (C) 1987, 1988, 1992, 1994, 1995, 1997, 1998, 1999, 2000, 2004,
+Copyright (C) 1987-2017 Free Software Foundation, Inc.
-2005, 2006, 2007, 2008, 2009, 2010
-Free Software Foundation, Inc.
 This file is part of GCC.
 GCC is free software; you can redistribute it and/or modify it under
 the terms of the GNU General Public License as published by the Free
 RTX_BIN_ARITH
 an rtx code for a non-commutative binary operation (e.g., MINUS, DIV)
 RTX_BITFIELD_OPS
 an rtx code for a bit-field operation (ZERO_EXTRACT, SIGN_EXTRACT)
 RTX_INSN
-an rtx code for a machine insn (INSN, JUMP_INSN, CALL_INSN)
+an rtx code for a machine insn (INSN, JUMP_INSN, CALL_INSN) or
+	 data that will be output as assembly pseudo-ops (DEBUG_INSN)
 RTX_MATCH
 an rtx code for something that matches in insns (e.g, MATCH_DUP)
 RTX_AUTOINC
 an rtx code for autoincrement addressing modes (e.g. POST_DEC)
 RTX_EXTRA
 value zero.  */
 DEF_RTL_EXPR(UNKNOWN, "UnKnown", "*", RTX_EXTRA)
 /* Used in the cselib routines to describe a value.  Objects of this
 kind are only allocated in cselib.c, in an alloc pool instead of in
-GC memory.  The only operand of a VALUE is a cselib_val_struct.
+GC memory.  The only operand of a VALUE is a cselib_val.
 var-tracking requires this to have a distinct integral value from
 DECL codes in trees.  */
 DEF_RTL_EXPR(VALUE, "value", "0", RTX_OBJ)
 /* The RTL generated for a DEBUG_EXPR_DECL.  It links back to the
 /* ---------------------------------------------------------------------
 Expressions used in constructing lists.
 --------------------------------------------------------------------- */
-/* a linked list of expressions */
+/* A linked list of expressions.  */
 DEF_RTL_EXPR(EXPR_LIST, "expr_list", "ee", RTX_EXTRA)
-/* a linked list of instructions.
+/* A linked list of instructions.
 The insns are represented in print by their uids.  */
 DEF_RTL_EXPR(INSN_LIST, "insn_list", "ue", RTX_EXTRA)
-/* SEQUENCE appears in the result of a `gen_...' function
+/* A linked list of integers.  */
-for a DEFINE_EXPAND that wants to make several insns.
+DEF_RTL_EXPR(INT_LIST, "int_list", "ie", RTX_EXTRA)
-Its elements are the bodies of the insns that should be made.
-`emit_insn' takes the SEQUENCE apart and makes separate insns.  */
+/* SEQUENCE is used in late passes of the compiler to group insns for
+one reason or another.
+For example, after delay slot filling, branch instructions with filled
+delay slots are represented as a SEQUENCE of length 1 + n_delay_slots,
+with the branch instruction in XEXPVEC(seq, 0, 0) and the instructions
+occupying the delay slots in the remaining XEXPVEC slots.
+Another place where a SEQUENCE may appear, is in REG_FRAME_RELATED_EXPR
+notes, to express complex operations that are not obvious from the insn
+to which the REG_FRAME_RELATED_EXPR note is attached.  In this usage of
+SEQUENCE, the sequence vector slots do not hold real instructions but
+only pseudo-instructions that can be translated to DWARF CFA expressions.
+Some back ends also use SEQUENCE to group insns in bundles.
+Much of the compiler infrastructure is not prepared to handle SEQUENCE
+objects.  Only passes after pass_free_cfg are expected to handle them.  */
 DEF_RTL_EXPR(SEQUENCE, "sequence", "E", RTX_EXTRA)
-/* Refers to the address of its argument.  This is only used in alias.c.  */
+/* Represents a non-global base address.  This is only used in alias.c.  */
-DEF_RTL_EXPR(ADDRESS, "address", "e", RTX_MATCH)
+DEF_RTL_EXPR(ADDRESS, "address", "i", RTX_EXTRA)
 /* ----------------------------------------------------------------------
 Expression types used for things in the instruction chain.
-All formats must start with "iuu" to handle the chain.
+All formats must start with "uu" to handle the chain.
 Each insn expression holds an rtl instruction and its semantics
 during back-end processing.
-See macros's in "rtl.h" for the meaning of each rtx->u.fld[].
+See macros in "rtl.h" for the meaning of each rtx->u.fld[].
 ---------------------------------------------------------------------- */
 /* An annotation for variable assignment tracking.  */
-DEF_RTL_EXPR(DEBUG_INSN, "debug_insn", "iuuBeiie", RTX_INSN)
+DEF_RTL_EXPR(DEBUG_INSN, "debug_insn", "uuBeiie", RTX_INSN)
 /* An instruction that cannot jump.  */
-DEF_RTL_EXPR(INSN, "insn", "iuuBeiie", RTX_INSN)
+DEF_RTL_EXPR(INSN, "insn", "uuBeiie", RTX_INSN)
 /* An instruction that can possibly jump.
 Fields ( rtx->u.fld[] ) have exact same meaning as INSN's.  */
-DEF_RTL_EXPR(JUMP_INSN, "jump_insn", "iuuBeiie0", RTX_INSN)
+DEF_RTL_EXPR(JUMP_INSN, "jump_insn", "uuBeiie0", RTX_INSN)
 /* An instruction that can possibly call a subroutine
 but which will not change which instruction comes next
 in the current function.
 Field ( rtx->u.fld[8] ) is CALL_INSN_FUNCTION_USAGE.
 All other fields ( rtx->u.fld[] ) have exact same meaning as INSN's.  */
-DEF_RTL_EXPR(CALL_INSN, "call_insn", "iuuBeiiee", RTX_INSN)
+DEF_RTL_EXPR(CALL_INSN, "call_insn", "uuBeiiee", RTX_INSN)
+/* Placeholder for tablejump JUMP_INSNs.  The pattern of this kind
+of rtx is always either an ADDR_VEC or an ADDR_DIFF_VEC.  These
+placeholders do not appear as real instructions inside a basic
+block, but are considered active_insn_p instructions for historical
+reasons, when jump table data was represented with JUMP_INSNs.  */
+DEF_RTL_EXPR(JUMP_TABLE_DATA, "jump_table_data", "uuBe0000", RTX_INSN)
 /* A marker that indicates that control will not flow through.  */
-DEF_RTL_EXPR(BARRIER, "barrier", "iuu00000", RTX_EXTRA)
+DEF_RTL_EXPR(BARRIER, "barrier", "uu00000", RTX_EXTRA)
 /* Holds a label that is followed by instructions.
 Operand:
-4: is used in jump.c for the use-count of the label.
+3: is used in jump.c for the use-count of the label.
-5: is used in the sh backend.
+4: is used in the sh backend.
-6: is a number that is unique in the entire compilation.
+5: is a number that is unique in the entire compilation.
-7: is the user-given name of the label, if any.  */
+6: is the user-given name of the label, if any.  */
-DEF_RTL_EXPR(CODE_LABEL, "code_label", "iuuB00is", RTX_EXTRA)
+DEF_RTL_EXPR(CODE_LABEL, "code_label", "uuB00is", RTX_EXTRA)
 /* Say where in the code a source line starts, for symbol table's sake.
 Operand:
-4: note-specific data
+3: note-specific data
-5: enum insn_note
+4: enum insn_note
-6: unique number if insn_note == note_insn_deleted_label.  */
+5: unique number if insn_note == note_insn_deleted_label.  */
-DEF_RTL_EXPR(NOTE, "note", "iuuB0ni", RTX_EXTRA)
+DEF_RTL_EXPR(NOTE, "note", "uuB0ni", RTX_EXTRA)
 /* ----------------------------------------------------------------------
 Top level constituents of INSN, JUMP_INSN and CALL_INSN.
 ---------------------------------------------------------------------- */
 DEF_RTL_EXPR(UNSPEC, "unspec", "Ei", RTX_EXTRA)
 /* Similar, but a volatile operation and one which may trap.  */
 DEF_RTL_EXPR(UNSPEC_VOLATILE, "unspec_volatile", "Ei", RTX_EXTRA)
-/* Vector of addresses, stored as full words.  */
+/* ----------------------------------------------------------------------
-/* Each element is a LABEL_REF to a CODE_LABEL whose address we want.  */
+Table jump addresses.
+---------------------------------------------------------------------- */
+/* Vector of addresses, stored as full words.
+Each element is a LABEL_REF to a CODE_LABEL whose address we want.  */
 DEF_RTL_EXPR(ADDR_VEC, "addr_vec", "E", RTX_EXTRA)
 /* Vector of address differences X0 - BASE, X1 - BASE, ...
 First operand is BASE; the vector contains the X's.
 The machine mode of this rtx says how much space to leave
 offset_unsigned: true iff offsets have to be treated as unsigned.
 scale: scaling that is necessary to make offsets fit into the mode.
 The third, fourth and fifth operands are only valid when
 CASE_VECTOR_SHORTEN_MODE is defined, and only in an optimizing
-compilations.  */
+compilation.  */
 DEF_RTL_EXPR(ADDR_DIFF_VEC, "addr_diff_vec", "eEee0", RTX_EXTRA)
 /* Memory prefetch, with attributes supported on some targets.
 Operand 1 is the address of the memory to fetch.
 Operand 2 is 1 for a write access, 0 otherwise.
 /* Return from a subroutine.  */
 DEF_RTL_EXPR(RETURN, "return", "", RTX_EXTRA)
+/* Like RETURN, but truly represents only a function return, while
+RETURN may represent an insn that also performs other functions
+of the function epilogue.  Like RETURN, this may also occur in
+conditional jumps.  */
+DEF_RTL_EXPR(SIMPLE_RETURN, "simple_return", "", RTX_EXTRA)
 /* Special for EH return from subroutine.  */
 DEF_RTL_EXPR(EH_RETURN, "eh_return", "", RTX_EXTRA)
 /* Conditional trap.
 ---------------------------------------------------------------------- */
 /* numeric integer constant */
 DEF_RTL_EXPR(CONST_INT, "const_int", "w", RTX_CONST_OBJ)
+/* numeric integer constant */
+DEF_RTL_EXPR(CONST_WIDE_INT, "const_wide_int", "", RTX_CONST_OBJ)
 /* fixed-point constant */
 DEF_RTL_EXPR(CONST_FIXED, "const_fixed", "www", RTX_CONST_OBJ)
-/* numeric floating point constant.
+/* numeric floating point or integer constant.  If the mode is
-Operands hold the value.  They are all 'w' and there may be from 2 to 6;
+VOIDmode it is an int otherwise it has a floating point mode and a
-see real.h.  */
+floating point value.  Operands hold the value.  They are all 'w'
+and there may be from 2 to 6; see real.h.  */
 DEF_RTL_EXPR(CONST_DOUBLE, "const_double", CONST_DOUBLE_FORMAT, RTX_CONST_OBJ)
 /* Describes a vector constant.  */
 DEF_RTL_EXPR(CONST_VECTOR, "const_vector", "E", RTX_CONST_OBJ)
 DEF_RTL_EXPR(PC, "pc", "", RTX_OBJ)
 /* A register.  The "operand" is the register number, accessed with
 the REGNO macro.  If this number is less than FIRST_PSEUDO_REGISTER
 than a hardware register is being referred to.  The second operand
-holds the original register number - this will be different for a
+points to a reg_attrs structure.
-pseudo register that got turned into a hard register.  The third
-operand points to a reg_attrs structure.
 This rtx needs to have as many (or more) fields as a MEM, since we
 can change REG rtx's into MEMs during reload.  */
-DEF_RTL_EXPR(REG, "reg", "i00", RTX_OBJ)
+DEF_RTL_EXPR(REG, "reg", "r", RTX_OBJ)
 /* A scratch register.  This represents a register used only within a
-single insn.  It will be turned into a REG during register allocation
+single insn.  It will be replaced by a REG during register allocation
 or reload unless the constraint indicates that the register won't be
-needed, in which case it can remain a SCRATCH.  This code is
+needed, in which case it can remain a SCRATCH.  */
-marked as having one operand so it can be turned into a REG.  */
+DEF_RTL_EXPR(SCRATCH, "scratch", "", RTX_OBJ)
-DEF_RTL_EXPR(SCRATCH, "scratch", "0", RTX_OBJ)
 /* A reference to a part of another value.  The first operand is the
 complete value and the second is the byte offset of the selected part.   */
 DEF_RTL_EXPR(SUBREG, "subreg", "ei", RTX_EXTRA)
 The operand is a CODE_LABEL found in the insn chain.  */
 DEF_RTL_EXPR(LABEL_REF, "label_ref", "u", RTX_CONST_OBJ)
 /* Reference to a named label:
 Operand 0: label name
-Operand 1: flags (see SYMBOL_FLAG_* in rtl.h)
+Operand 1: tree from which this symbol is derived, or null.
-Operand 2: tree from which this symbol is derived, or null.
 This is either a DECL node, or some kind of constant.  */
-DEF_RTL_EXPR(SYMBOL_REF, "symbol_ref", "s00", RTX_CONST_OBJ)
+DEF_RTL_EXPR(SYMBOL_REF, "symbol_ref", "s0", RTX_CONST_OBJ)
 /* The condition code register is represented, in our imagination,
 as a register holding a value that can be compared to zero.
 In fact, the machine has already compared them and recorded the
 results; but instructions that look at the condition code
 /* Find first bit that is set.
 Value is 1 + number of trailing zeros in the arg.,
 or 0 if arg is 0.  */
 DEF_RTL_EXPR(FFS, "ffs", "e", RTX_UNARY)
+/* Count number of leading redundant sign bits (number of leading
+sign bits minus one).  */
+DEF_RTL_EXPR(CLRSB, "clrsb", "e", RTX_UNARY)
 /* Count leading zeros.  */
 DEF_RTL_EXPR(CLZ, "clz", "e", RTX_UNARY)
 /* Count trailing zeros.  */
 DEF_RTL_EXPR(CTZ, "ctz", "e", RTX_UNARY)
 /* Floating point multiply/add combined instruction.  */
 DEF_RTL_EXPR(FMA, "fma", "eee", RTX_TERNARY)
 /* Information about the variable and its location.  */
-/* Changed 'te' to 'tei'; the 'i' field is for recording
+DEF_RTL_EXPR(VAR_LOCATION, "var_location", "te", RTX_EXTRA)
-initialization status of variables.  */
-DEF_RTL_EXPR(VAR_LOCATION, "var_location", "tei", RTX_EXTRA)
 /* Used in VAR_LOCATION for a pointer to a decl that is no longer
 addressable.  */
 DEF_RTL_EXPR(DEBUG_IMPLICIT_PTR, "debug_implicit_ptr", "t", RTX_OBJ)
+/* Represents value that argument had on function entry.  The
+single argument is the DECL_INCOMING_RTL of the corresponding
+parameter.  */
+DEF_RTL_EXPR(ENTRY_VALUE, "entry_value", "0", RTX_OBJ)
+/* Used in VAR_LOCATION for a reference to a parameter that has
+been optimized away completely.  */
+DEF_RTL_EXPR(DEBUG_PARAMETER_REF, "debug_parameter_ref", "t", RTX_OBJ)
 /* All expressions from this point forward appear only in machine
 descriptions.  */
 #ifdef GENERATOR_FILE
 same syntax as genextract/genrecog's location strings: 0-9 for
 XEXP (op, n), a-z for XVECEXP (op, 0, n); each character applies to
 the result of the one before it.  */
 DEF_RTL_EXPR(MATCH_CODE, "match_code", "ss", RTX_MATCH)
-/* Appears only in define_predicate/define_special_predicate
+/* Used to inject a C conditional expression into an .md file.  It can
-expressions.  The argument is a C expression to be injected at this
+appear in a predicate definition or an attribute expression.  */
-point in the predicate formula.  */
 DEF_RTL_EXPR(MATCH_TEST, "match_test", "s", RTX_MATCH)
 /* Insn (and related) definitions.  */
 /* Definition of the pattern for one kind of instruction.
 	This may not test any operands.
 4th operand: Extra C code to execute before generating the insns.
 	This might, for example, create some RTX's and store them in
 	elements of `recog_data.operand' for use by the vector of
 	insn-patterns.
-	(`operands' is an alias here for `recog_data.operand').  */
+	(`operands' is an alias here for `recog_data.operand').
-DEF_RTL_EXPR(DEFINE_EXPAND, "define_expand", "sEss", RTX_EXTRA)
+5th: optionally, a vector of attributes for this expand.  */
+DEF_RTL_EXPR(DEFINE_EXPAND, "define_expand", "sEssV", RTX_EXTRA)
 /* Define a requirement for delay slots.
 1st operand: Condition involving insn attributes that, if true,
 	        indicates that the insn requires the number of delay slots
 		shown.
 Operand:
 0: The predicate pattern.  The top-level form should match a
 relational operator.  Operands should have only one alternative.
 1: A C expression giving an additional condition for recognizing
 the generated pattern.
-2: A template or C code to produce assembler output.  */
+2: A template or C code to produce assembler output.
-DEF_RTL_EXPR(DEFINE_COND_EXEC, "define_cond_exec", "Ess", RTX_EXTRA)
+3: A vector of attributes to append to the resulting cond_exec insn.  */
+DEF_RTL_EXPR(DEFINE_COND_EXEC, "define_cond_exec", "EssV", RTX_EXTRA)
 /* Definition of an operand predicate.  The difference between
 DEFINE_PREDICATE and DEFINE_SPECIAL_PREDICATE is that genrecog will
 not warn about a match_operand with no mode if it has a predicate
 defined with DEFINE_SPECIAL_PREDICATE.
 CONST_DOUBLE.
 Do not use ival/hval/lval/rval if op is not the appropriate kind of
 RTL object.  */
 DEF_RTL_EXPR(DEFINE_CONSTRAINT, "define_constraint", "sse", RTX_EXTRA)
 DEF_RTL_EXPR(DEFINE_MEMORY_CONSTRAINT, "define_memory_constraint", "sse", RTX_EXTRA)
+DEF_RTL_EXPR(DEFINE_SPECIAL_MEMORY_CONSTRAINT, "define_special_memory_constraint", "sse", RTX_EXTRA)
 DEF_RTL_EXPR(DEFINE_ADDRESS_CONSTRAINT, "define_address_constraint", "sse", RTX_EXTRA)
 /* Constructions for CPU pipeline description described by NDFAs.  */
 /* A conditional expression which is true if the specified flag is
 true for the insn being scheduled in reorg.
 genattr.c defines the following flags which can be tested by
-(attr_flag "foo") expressions in eligible_for_delay.
+(attr_flag "foo") expressions in eligible_for_delay: forward, backward.  */
-forward, backward, very_likely, likely, very_unlikely, and unlikely.  */
 DEF_RTL_EXPR (ATTR_FLAG, "attr_flag", "s", RTX_EXTRA)
 /* General conditional. The first operand is a vector composed of pairs of
 expressions.  The first element of each pair is evaluated, in turn.
 The value of the conditional is the second expression of the first pair
 whose first expression evaluates nonzero.  If none of the expressions is
 true, the second operand will be used as the value of the conditional.  */
 DEF_RTL_EXPR(COND, "cond", "Ee", RTX_EXTRA)
+/* Definition of a pattern substitution meta operation on a DEFINE_EXPAND
+or a DEFINE_INSN.  Automatically generates new instances of DEFINE_INSNs
+that match the substitution pattern.
+Operand:
+0: The name of the substitition template.
+1: Input template to match to see if a substitution is applicable.
+2: A C expression giving an additional condition for the generated
+new define_expand or define_insn.
+3: Output tempalate to generate via substitution.
+Within a DEFINE_SUBST template, the meaning of some RTL expressions is
+different from their usual interpretation: a MATCH_OPERAND matches any
+expression tree with matching machine mode or with VOIDmode.  Likewise,
+MATCH_OP_DUP and MATCH_DUP match more liberally in a DEFINE_SUBST than
+in other RTL expressions.  MATCH_OPERATOR matches all common operators
+but also UNSPEC, UNSPEC_VOLATILE, and MATCH_OPERATORS from the input
+DEFINE_EXPAND or DEFINE_INSN.  */
+DEF_RTL_EXPR(DEFINE_SUBST, "define_subst", "sEsE", RTX_EXTRA)
+/* Substitution attribute to apply a DEFINE_SUBST to a pattern.
+Operand:
+0: The name of the subst-attribute.
+1: The name of the DEFINE_SUBST to be applied for this attribute.
+2: String to substitute for the subst-attribute name in the pattern
+name, for the case that the DEFINE_SUBST is not applied (i.e. the
+unmodified version of the pattern).
+3: String to substitute for the subst-attribute name in the pattern
+name, for the case that the DEFINE_SUBST is applied to the patten.
+The use of DEFINE_SUBST and DEFINE_SUBST_ATTR is explained in the
+GCC internals manual, under "RTL Templates Transformations".  */
+DEF_RTL_EXPR(DEFINE_SUBST_ATTR, "define_subst_attr", "ssss", RTX_EXTRA)
 #endif /* GENERATOR_FILE */
 /*
 Local variables:
 mode:c

Mercurial > hg > CbC > CbC_gcc

comparison gcc/rtl.def @ 111:04ced10e8804