CbC/CbC_gcc: gcc/sel-sched.c comparison

comparison gcc/sel-sched.c @ 111:04ced10e8804

gcc 7

author	kono
date	Fri, 27 Oct 2017 22:46:09 +0900
parents	f6334be47118
children	84e7813d76e9

comparison

equal deleted inserted replaced

-:561a7518be6b
+:04ced10e8804
 /* Instruction scheduling pass.  Selective scheduler and pipeliner.
-Copyright (C) 2006, 2007, 2008, 2009, 2010, 2011
+Copyright (C) 2006-2017 Free Software Foundation, Inc.
-Free Software Foundation, Inc.
 This file is part of GCC.
 GCC is free software; you can redistribute it and/or modify it under
 the terms of the GNU General Public License as published by the Free
 <http://www.gnu.org/licenses/>.  */
 #include "config.h"
 #include "system.h"
 #include "coretypes.h"
-#include "tm.h"
+#include "backend.h"
-#include "rtl-error.h"
+#include "tree.h"
+#include "rtl.h"
+#include "df.h"
+#include "memmodel.h"
 #include "tm_p.h"
-#include "hard-reg-set.h"
 #include "regs.h"
-#include "function.h"
+#include "cfgbuild.h"
-#include "flags.h"
 #include "insn-config.h"
 #include "insn-attr.h"
-#include "except.h"
-#include "recog.h"
 #include "params.h"
 #include "target.h"
-#include "output.h"
-#include "timevar.h"
-#include "tree-pass.h"
 #include "sched-int.h"
-#include "ggc.h"
-#include "tree.h"
-#include "vec.h"
-#include "langhooks.h"
 #include "rtlhooks-def.h"
-#include "output.h"
+#include "ira.h"
-#include "emit-rtl.h"
+#include "ira-int.h"
+#include "rtl-iter.h"
 #ifdef INSN_SCHEDULING
+#include "regset.h"
+#include "cfgloop.h"
 #include "sel-sched-ir.h"
 #include "sel-sched-dump.h"
 #include "sel-sched.h"
 #include "dbgcnt.h"
 struct rtx_search_arg
 {
 /* What we are searching for.  */
 rtx x;
-/* The occurence counter.  */
+/* The occurrence counter.  */
 int n;
 };
 typedef struct rtx_search_arg *rtx_search_arg_p;
 /* An UID of expr_vliw which is to be moved up.  If we find other exprs,
 they are to be removed.  */
 int uid;
-#ifdef ENABLE_CHECKING
 /* This is initialized to the insn on which the driver stopped its traversal.  */
 insn_t failed_insn;
-#endif
 /* True if we scheduled an insn with different register.  */
 bool was_renamed;
 };
 typedef struct fur_static_params *fur_static_params_p;
 typedef struct cmpd_local_params *cmpd_local_params_p;
 typedef struct moveop_static_params *moveop_static_params_p;
-/* Set of hooks and parameters that determine behaviour specific to
+/* Set of hooks and parameters that determine behavior specific to
 move_op or find_used_regs functions.  */
 struct code_motion_path_driver_info_def
 {
 /* Called on enter to the basic block.  */
 int (*on_enter) (insn_t, cmpd_local_params_p, void *, bool);
 /* Number of insns scheduled in current region.  */
 static int num_insns_scheduled;
 /* A vector of expressions is used to be able to sort them.  */
-DEF_VEC_P(expr_t);
+static vec<expr_t> vec_av_set;
-DEF_VEC_ALLOC_P(expr_t,heap);
-static VEC(expr_t, heap) *vec_av_set = NULL;
 /* A vector of vinsns is used to hold temporary lists of vinsns.  */
-DEF_VEC_P(vinsn_t);
+typedef vec<vinsn_t> vinsn_vec_t;
-DEF_VEC_ALLOC_P(vinsn_t,heap);
-typedef VEC(vinsn_t, heap) *vinsn_vec_t;
 /* This vector has the exprs which may still present in av_sets, but actually
 can't be moved up due to bookkeeping created during code motion to another
 fence.  See comment near the call to update_and_record_unavailable_insns
 for the detailed explanations.  */
-static vinsn_vec_t vec_bookkeeping_blocked_vinsns = NULL;
+static vinsn_vec_t vec_bookkeeping_blocked_vinsns = vinsn_vec_t ();
 /* This vector has vinsns which are scheduled with renaming on the first fence
 and then seen on the second.  For expressions with such vinsns, target
 availability information may be wrong.  */
-static vinsn_vec_t vec_target_unavailable_vinsns = NULL;
+static vinsn_vec_t vec_target_unavailable_vinsns = vinsn_vec_t ();
 /* Vector to store temporary nops inserted in move_op to prevent removal
 of empty bbs.  */
-DEF_VEC_P(insn_t);
+static vec<insn_t> vec_temp_moveop_nops;
-DEF_VEC_ALLOC_P(insn_t,heap);
-static VEC(insn_t, heap) *vec_temp_moveop_nops = NULL;
 /* These bitmaps record original instructions scheduled on the current
 iteration and bookkeeping copies created by them.  */
 static bitmap current_originators = NULL;
 static bitmap current_copies = NULL;
 static void
 advance_one_cycle (fence_t fence)
 {
 unsigned i;
 int cycle;
-rtx insn;
+rtx_insn *insn;
 advance_state (FENCE_STATE (fence));
 cycle = ++FENCE_CYCLE (fence);
 FENCE_ISSUED_INSNS (fence) = 0;
 FENCE_STARTS_CYCLE_P (fence) = 1;
 can_issue_more = issue_rate;
 FENCE_ISSUE_MORE (fence) = can_issue_more;
-for (i = 0; VEC_iterate (rtx, FENCE_EXECUTING_INSNS (fence), i, insn); )
+for (i = 0; vec_safe_iterate (FENCE_EXECUTING_INSNS (fence), i, &insn); )
 {
 if (INSN_READY_CYCLE (insn) < cycle)
 {
 remove_from_deps (FENCE_DC (fence), insn);
-VEC_unordered_remove (rtx, FENCE_EXECUTING_INSNS (fence), i);
+FENCE_EXECUTING_INSNS (fence)->unordered_remove (i);
 continue;
 }
 i++;
 }
 if (sched_verbose >= 2)
 }
 /* Returns true when SUCC in a fallthru bb of INSN, possibly
 skipping empty basic blocks.  */
 static bool
-in_fallthru_bb_p (rtx insn, rtx succ)
+in_fallthru_bb_p (rtx_insn *insn, rtx succ)
 {
 basic_block bb = BLOCK_FOR_INSN (insn);
 edge e;
 if (bb == BLOCK_FOR_INSN (succ))
 static void
 extract_new_fences_from (flist_t old_fences, flist_tail_t new_fences,
 			 int orig_max_seqno)
 {
 bool was_here_p = false;
-insn_t insn = NULL_RTX;
+insn_t insn = NULL;
 insn_t succ;
 succ_iterator si;
 ilist_iterator ii;
 fence_t fence = FLIST_FENCE (old_fences);
 basic_block bb;
 && REG_P (INSN_RHS (insn)))
 return true;
 return false;
 }
-/* Substitute all occurences of INSN's destination in EXPR' vinsn with INSN's
+/* Substitute all occurrences of INSN's destination in EXPR' vinsn with INSN's
 source (if INSN is eligible for substitution).  Returns TRUE if
 substitution was actually performed, FALSE otherwise.  Substitution might
 be not performed because it's either EXPR' vinsn doesn't contain INSN's
 destination or the resulting insn is invalid for the target machine.
 When UNDO is true, perform unsubstitution instead (the difference is in
 old = undo ? INSN_RHS (insn) : INSN_LHS (insn);
 /* Substitute if INSN has a form of x:=y and LHS(INSN) occurs in *VI.  */
 if (rtx_ok_for_substitution_p (old, *where))
 {
-rtx new_insn;
+rtx_insn *new_insn;
 rtx *where_replace;
 /* We should copy these rtxes before substitution.  */
 new_rtx = copy_rtx (undo ? INSN_LHS (insn) : INSN_RHS (insn));
 new_insn = create_copy_of_insn_rtx (VINSN_INSN_RTX (*vi));
 				create_vinsn_from_insn_rtx (new_insn, false));
 	  /* Do not allow clobbering the address register of speculative
 insns.  */
 	  if ((EXPR_SPEC_DONE_DS (expr) & SPECULATIVE)
-&& bitmap_bit_p (VINSN_REG_USES (EXPR_VINSN (expr)),
+&& register_unavailable_p (VINSN_REG_USES (EXPR_VINSN (expr)),
-			       expr_dest_regno (expr)))
+					 expr_dest_reg (expr)))
 	    EXPR_TARGET_AVAILABLE (expr) = false;
 	  return true;
 	}
 else
 }
 else
 return false;
 }
-/* Helper function for count_occurences_equiv.  */
-static int
-count_occurrences_1 (rtx *cur_rtx, void *arg)
-{
-rtx_search_arg_p p = (rtx_search_arg_p) arg;
-/* The last param FOR_GCSE is true, because otherwise it performs excessive
-substitutions like
-	r8 = r33
-	r16 = r33
-for the last insn it presumes r33 equivalent to r8, so it changes it to
-r33.  Actually, there's no change, but it spoils debugging.  */
-if (exp_equiv_p (*cur_rtx, p->x, 0, true))
-{
-/* Bail out if we occupy more than one register.  */
-if (REG_P (*cur_rtx)
-&& HARD_REGISTER_P (*cur_rtx)
-&& hard_regno_nregs[REGNO(*cur_rtx)][GET_MODE (*cur_rtx)] > 1)
-{
-p->n = 0;
-return 1;
-}
-p->n++;
-/* Do not traverse subexprs.  */
-return -1;
-}
-if (GET_CODE (*cur_rtx) == SUBREG
-&& REG_P (p->x)
-&& (!REG_P (SUBREG_REG (*cur_rtx))
-	  || REGNO (SUBREG_REG (*cur_rtx)) == REGNO (p->x)))
-{
-/* ??? Do not support substituting regs inside subregs.  In that case,
-simplify_subreg will be called by validate_replace_rtx, and
-unsubstitution will fail later.  */
-p->n = 0;
-return 1;
-}
-/* Continue search.  */
-return 0;
-}
 /* Return the number of places WHAT appears within WHERE.
 Bail out when we found a reference occupying several hard registers.  */
 static int
-count_occurrences_equiv (rtx what, rtx where)
+count_occurrences_equiv (const_rtx what, const_rtx where)
 {
-struct rtx_search_arg arg;
+int count = 0;
+subrtx_iterator::array_type array;
-arg.x = what;
+FOR_EACH_SUBRTX (iter, array, where, NONCONST)
-arg.n = 0;
+{
+const_rtx x = *iter;
-for_each_rtx (&where, &count_occurrences_1, (void *) &arg);
+if (REG_P (x) && REGNO (x) == REGNO (what))
+	{
-return arg.n;
+	  /* Bail out if mode is different or more than one register is
+	     used.  */
+	  if (GET_MODE (x) != GET_MODE (what) || REG_NREGS (x) > 1)
+	    return 0;
+	  count += 1;
+	}
+else if (GET_CODE (x) == SUBREG
+	       && (!REG_P (SUBREG_REG (x))
+		   || REGNO (SUBREG_REG (x)) == REGNO (what)))
+	/* ??? Do not support substituting regs inside subregs.  In that case,
+	   simplify_subreg will be called by validate_replace_rtx, and
+	   unsubstitution will fail later.  */
+	return 0;
+}
+return count;
 }
 /* Returns TRUE if WHAT is found in WHERE rtx tree.  */
 static bool
 rtx_ok_for_substitution_p (rtx what, rtx where)
 /* Functions to support register renaming.  */
 /* Substitute VI's set source with REGNO.  Returns newly created pattern
 that has REGNO as its source.  */
-static rtx
+static rtx_insn *
 create_insn_rtx_with_rhs (vinsn_t vi, rtx rhs_rtx)
 {
 rtx lhs_rtx;
 rtx pattern;
-rtx insn_rtx;
+rtx_insn *insn_rtx;
 lhs_rtx = copy_rtx (VINSN_LHS (vi));
-pattern = gen_rtx_SET (VOIDmode, lhs_rtx, rhs_rtx);
+pattern = gen_rtx_SET (lhs_rtx, rhs_rtx);
 insn_rtx = create_insn_rtx_from_pattern (pattern, NULL_RTX);
 return insn_rtx;
 }
 static bool
 replace_src_with_reg_ok_p (insn_t insn, rtx new_src_reg)
 {
 vinsn_t vi = INSN_VINSN (insn);
-enum machine_mode mode;
+machine_mode mode;
 rtx dst_loc;
 bool res;
 gcc_assert (VINSN_SEPARABLE_P (vi));
 return res;
 }
 /* Create a pattern with rhs of VI and lhs of LHS_RTX.  */
-static rtx
+static rtx_insn *
 create_insn_rtx_with_lhs (vinsn_t vi, rtx lhs_rtx)
 {
 rtx rhs_rtx;
 rtx pattern;
-rtx insn_rtx;
+rtx_insn *insn_rtx;
 rhs_rtx = copy_rtx (VINSN_RHS (vi));
-pattern = gen_rtx_SET (VOIDmode, lhs_rtx, rhs_rtx);
+pattern = gen_rtx_SET (lhs_rtx, rhs_rtx);
 insn_rtx = create_insn_rtx_from_pattern (pattern, NULL_RTX);
 return insn_rtx;
 }
 /* Substitute lhs in the given expression EXPR for the register with number
 NEW_REGNO.  SET_DEST may be arbitrary rtx, not only register.  */
 static void
 replace_dest_with_reg_in_expr (expr_t expr, rtx new_reg)
 {
-rtx insn_rtx;
+rtx_insn *insn_rtx;
 vinsn_t vinsn;
 insn_rtx = create_insn_rtx_with_lhs (EXPR_VINSN (expr), new_reg);
 vinsn = create_vinsn_from_insn_rtx (insn_rtx, false);
 Returns NO_REGS for call insns because some targets have constraints on
 destination register of a call insn.
 Code adopted from regrename.c::build_def_use.  */
 static enum reg_class
-get_reg_class (rtx insn)
+get_reg_class (rtx_insn *insn)
 {
-int alt, i, n_ops;
+int i, n_ops;
-extract_insn (insn);
+extract_constrain_insn (insn);
-if (! constrain_operands (1))
+preprocess_constraints (insn);
-fatal_insn_not_found (insn);
-preprocess_constraints ();
-alt = which_alternative;
 n_ops = recog_data.n_operands;
-for (i = 0; i < n_ops; ++i)
+const operand_alternative *op_alt = which_op_alt ();
-{
-int matches = recog_op_alt[i][alt].matches;
-if (matches >= 0)
-	recog_op_alt[i][alt].cl = recog_op_alt[matches][alt].cl;
-}
 if (asm_noperands (PATTERN (insn)) > 0)
 {
 for (i = 0; i < n_ops; i++)
 	if (recog_data.operand_type[i] == OP_OUT)
 	  {
 	    rtx *loc = recog_data.operand_loc[i];
 	    rtx op = *loc;
-	    enum reg_class cl = recog_op_alt[i][alt].cl;
+	    enum reg_class cl = alternative_class (op_alt, i);
 	    if (REG_P (op)
 		&& REGNO (op) == ORIGINAL_REGNO (op))
 	      continue;
 else if (!CALL_P (insn))
 {
 for (i = 0; i < n_ops + recog_data.n_dups; i++)
 {
 	 int opn = i < n_ops ? i : recog_data.dup_num[i - n_ops];
-	 enum reg_class cl = recog_op_alt[opn][alt].cl;
+	 enum reg_class cl = alternative_class (op_alt, opn);
 	 if (recog_data.operand_type[opn] == OP_OUT ||
 	     recog_data.operand_type[opn] == OP_INOUT)
 	   return cl;
 }
 may result in returning NO_REGS, cause flags is written implicitly through
 CMP insn, which has no OP_OUT | OP_INOUT operands.  */
 return NO_REGS;
 }
-#ifdef HARD_REGNO_RENAME_OK
 /* Calculate HARD_REGNO_RENAME_OK data for REGNO.  */
 static void
 init_hard_regno_rename (int regno)
 {
 int cur_reg;
 if (HARD_REGNO_RENAME_OK (regno, cur_reg))
 SET_HARD_REG_BIT (sel_hrd.regs_for_rename[regno], cur_reg);
 }
 }
-#endif
 /* A wrapper around HARD_REGNO_RENAME_OK that will look into the hard regs
 data first.  */
 static inline bool
 sel_hard_regno_rename_ok (int from ATTRIBUTE_UNUSED, int to ATTRIBUTE_UNUSED)
 {
-#ifdef HARD_REGNO_RENAME_OK
 /* Check whether this is all calculated.  */
 if (TEST_HARD_REG_BIT (sel_hrd.regs_for_rename[from], from))
 return TEST_HARD_REG_BIT (sel_hrd.regs_for_rename[from], to);
 init_hard_regno_rename (from);
 return TEST_HARD_REG_BIT (sel_hrd.regs_for_rename[from], to);
-#else
-return true;
-#endif
 }
 /* Calculate set of registers that are capable of holding MODE.  */
 static void
-init_regs_for_mode (enum machine_mode mode)
+init_regs_for_mode (machine_mode mode)
 {
 int cur_reg;
 CLEAR_HARD_REG_SET (sel_hrd.regs_for_mode[mode]);
 CLEAR_HARD_REG_SET (sel_hrd.regs_for_call_clobbered[mode]);
 for (cur_reg = 0; cur_reg < FIRST_PSEUDO_REGISTER; cur_reg++)
 {
-int nregs = hard_regno_nregs[cur_reg][mode];
+int nregs;
 int i;
+/* See whether it accepts all modes that occur in
+original insns.  */
+if (!targetm.hard_regno_mode_ok (cur_reg, mode))
+continue;
+nregs = hard_regno_nregs (cur_reg, mode);
 for (i = nregs - 1; i >= 0; --i)
 if (fixed_regs[cur_reg + i]
 || global_regs[cur_reg + i]
 /* Can't use regs which aren't saved by
 	       it affects aliasing globally and invalidates all AV sets.  */
 	    || get_reg_base_value (cur_reg + i)
 #ifdef LEAF_REGISTERS
 /* We can't use a non-leaf register if we're in a
 leaf function.  */
-|| (current_function_is_leaf
+|| (crtl->is_leaf
 && !LEAF_REGISTERS[cur_reg + i])
 #endif
 )
 break;
 if (i >= 0)
 continue;
-/* See whether it accepts all modes that occur in
+if (targetm.hard_regno_call_part_clobbered (cur_reg, mode))
-original insns.  */
-if (! HARD_REGNO_MODE_OK (cur_reg, mode))
-continue;
-if (HARD_REGNO_CALL_PART_CLOBBERED (cur_reg, mode))
 SET_HARD_REG_BIT (sel_hrd.regs_for_call_clobbered[mode],
 cur_reg);
 /* If the CUR_REG passed all the checks above,
 then it's ok.  */
 static void
 mark_unavailable_hard_regs (def_t def, struct reg_rename *reg_rename_p,
 regset used_regs ATTRIBUTE_UNUSED)
 {
-enum machine_mode mode;
+machine_mode mode;
 enum reg_class cl = NO_REGS;
 rtx orig_dest;
 unsigned cur_reg, regno;
 hard_reg_set_iterator hrsi;
 /* Stop if the original register is one of the fixed_regs, global_regs or
 frame pointer, or we could not discover its class.  */
 if (fixed_regs[regno]
 || global_regs[regno]
-#if !HARD_FRAME_POINTER_IS_FRAME_POINTER
+|| (!HARD_FRAME_POINTER_IS_FRAME_POINTER && frame_pointer_needed
-|| (frame_pointer_needed && regno == HARD_FRAME_POINTER_REGNUM)
+	  && regno == HARD_FRAME_POINTER_REGNUM)
-#else
+|| (HARD_FRAME_POINTER_IS_FRAME_POINTER && frame_pointer_needed
-|| (frame_pointer_needed && regno == FRAME_POINTER_REGNUM)
+	  && regno == FRAME_POINTER_REGNUM)
-#endif
 || (reload_completed && cl == NO_REGS))
 {
 SET_HARD_REG_SET (reg_rename_p->unavailable_hard_regs);
 /* Give a chance for original register, if it isn't in used_regs.  */
 /* If something allocated on stack in this function, mark frame pointer
 register unavailable, considering also modes.
 FIXME: it is enough to do this once per all original defs.  */
 if (frame_pointer_needed)
 {
-int i;
+add_to_hard_reg_set (&reg_rename_p->unavailable_hard_regs,
+			   Pmode, FRAME_POINTER_REGNUM);
-for (i = hard_regno_nregs[FRAME_POINTER_REGNUM][Pmode]; i--;)
-	SET_HARD_REG_BIT (reg_rename_p->unavailable_hard_regs,
+if (!HARD_FRAME_POINTER_IS_FRAME_POINTER)
-FRAME_POINTER_REGNUM + i);
+add_to_hard_reg_set (&reg_rename_p->unavailable_hard_regs,
+			     Pmode, HARD_FRAME_POINTER_REGNUM);
-#if !HARD_FRAME_POINTER_IS_FRAME_POINTER
-for (i = hard_regno_nregs[HARD_FRAME_POINTER_REGNUM][Pmode]; i--;)
-	SET_HARD_REG_BIT (reg_rename_p->unavailable_hard_regs,
-HARD_FRAME_POINTER_REGNUM + i);
-#endif
 }
 #ifdef STACK_REGS
 /* For the stack registers the presence of FIRST_STACK_REG in USED_REGS
 is equivalent to as if all stack regs were in this set.
 AND_HARD_REG_SET (reg_rename_p->available_for_renaming,
 sel_hrd.regs_for_mode[mode]);
 /* Exclude registers that are partially call clobbered.  */
 if (def->crosses_call
-&& ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode))
+&& !targetm.hard_regno_call_part_clobbered (regno, mode))
 AND_COMPL_HARD_REG_SET (reg_rename_p->available_for_renaming,
 sel_hrd.regs_for_call_clobbered[mode]);
 /* Leave only those that are ok to rename.  */
 EXECUTE_IF_SET_IN_HARD_REG_SET (reg_rename_p->available_for_renaming,
 0, cur_reg, hrsi)
 {
 int nregs;
 int i;
-nregs = hard_regno_nregs[cur_reg][mode];
+nregs = hard_regno_nregs (cur_reg, mode);
 gcc_assert (nregs > 0);
 for (i = nregs - 1; i >= 0; --i)
 if (! sel_hard_regno_rename_ok (regno + i, cur_reg + i))
 break;
 struct reg_rename *reg_rename_p,
 def_list_t original_insns, bool *is_orig_reg_p_ptr)
 {
 int best_new_reg;
 unsigned cur_reg;
-enum machine_mode mode = VOIDmode;
+machine_mode mode = VOIDmode;
 unsigned regno, i, n;
 hard_reg_set_iterator hrsi;
 def_list_iterator di;
 def_t def;
 if (mode == VOIDmode)
 mode = GET_MODE (orig_dest);
 gcc_assert (mode == GET_MODE (orig_dest));
 regno = REGNO (orig_dest);
-for (i = 0, n = hard_regno_nregs[regno][mode]; i < n; i++)
+for (i = 0, n = REG_NREGS (orig_dest); i < n; i++)
 if (TEST_HARD_REG_BIT (hard_regs_used, regno + i))
 break;
 /* All hard registers are available.  */
 if (i == n)
 EXECUTE_IF_SET_IN_HARD_REG_SET (reg_rename_p->available_for_renaming,
 0, cur_reg, hrsi)
 if (! TEST_HARD_REG_BIT (hard_regs_used, cur_reg))
 {
 	/* Check that all hard regs for mode are available.  */
-	for (i = 1, n = hard_regno_nregs[cur_reg][mode]; i < n; i++)
+	for (i = 1, n = hard_regno_nregs (cur_reg, mode); i < n; i++)
 	  if (TEST_HARD_REG_BIT (hard_regs_used, cur_reg + i)
 	      || !TEST_HARD_REG_BIT (reg_rename_p->available_for_renaming,
 				     cur_reg + i))
 	    break;
 struct reg_rename *reg_rename_p,
 def_list_t original_insns, bool *is_orig_reg_p_ptr)
 {
 def_list_iterator i;
 def_t def;
-enum machine_mode mode = VOIDmode;
+machine_mode mode = VOIDmode;
 bool bad_hard_regs = false;
 /* We should not use this after reload.  */
 gcc_assert (!reload_completed);
 mode = GET_MODE (dest);
 else
 gcc_assert (mode == GET_MODE (dest));
 orig_regno = REGNO (dest);
-if (!REGNO_REG_SET_P (used_regs, orig_regno))
+/* Check that nothing in used_regs intersects with orig_regno.  When
-{
+	 we have a hard reg here, still loop over hard_regno_nregs.  */
-if (orig_regno < FIRST_PSEUDO_REGISTER)
+if (HARD_REGISTER_NUM_P (orig_regno))
-{
+	{
-gcc_assert (df_regs_ever_live_p (orig_regno));
+	  int j, n;
+	  for (j = 0, n = REG_NREGS (dest); j < n; j++)
-/* For hard registers, we have to check hardware imposed
+	    if (REGNO_REG_SET_P (used_regs, orig_regno + j))
-limitations (frame/stack registers, calls crossed).  */
+	      break;
-if (!TEST_HARD_REG_BIT (reg_rename_p->unavailable_hard_regs,
+	  if (j < n)
-orig_regno))
+	    continue;
-		{
+	}
-		  /* Don't let register cross a call if it doesn't already
+else
-		     cross one.  This condition is written in accordance with
+	{
-		     that in sched-deps.c sched_analyze_reg().  */
+	  if (REGNO_REG_SET_P (used_regs, orig_regno))
-		  if (!reg_rename_p->crosses_call
+	    continue;
-		      || REG_N_CALLS_CROSSED (orig_regno) > 0)
+	}
-		    return gen_rtx_REG (mode, orig_regno);
+if (HARD_REGISTER_NUM_P (orig_regno))
-		}
+	{
+	  gcc_assert (df_regs_ever_live_p (orig_regno));
-bad_hard_regs = true;
-}
+	  /* For hard registers, we have to check hardware imposed
-else
+	     limitations (frame/stack registers, calls crossed).  */
-return dest;
+	  if (!TEST_HARD_REG_BIT (reg_rename_p->unavailable_hard_regs,
-}
+				  orig_regno))
-}
+	    {
+	      /* Don't let register cross a call if it doesn't already
+		 cross one.  This condition is written in accordance with
+		 that in sched-deps.c sched_analyze_reg().  */
+	      if (!reg_rename_p->crosses_call
+		  || REG_N_CALLS_CROSSED (orig_regno) > 0)
+		return gen_rtx_REG (mode, orig_regno);
+	    }
+	  bad_hard_regs = true;
+	}
+else
+	return dest;
+}
 *is_orig_reg_p_ptr = false;
 /* We had some original hard registers that couldn't be used.
 Those were likely special.  Don't try to create a pseudo.  */
 static void
 verify_target_availability (expr_t expr, regset used_regs,
 			    struct reg_rename *reg_rename_p)
 {
 unsigned n, i, regno;
-enum machine_mode mode;
+machine_mode mode;
 bool target_available, live_available, hard_available;
 if (!REG_P (EXPR_LHS (expr)) || EXPR_TARGET_AVAILABLE (expr) < 0)
 return;
 regno = expr_dest_regno (expr);
 mode = GET_MODE (EXPR_LHS (expr));
 target_available = EXPR_TARGET_AVAILABLE (expr) == 1;
-n = reload_completed ? hard_regno_nregs[regno][mode] : 1;
+n = HARD_REGISTER_NUM_P (regno) ? hard_regno_nregs (regno, mode) : 1;
 live_available = hard_available = true;
 for (i = 0; i < n; i++)
 {
 if (bitmap_bit_p (used_regs, regno + i))
 CLEAR_HARD_REG_SET (reg_rename_data.unavailable_hard_regs);
 collect_unavailable_regs_from_bnds (expr, bnds, used_regs, &reg_rename_data,
 				      &original_insns);
-#ifdef ENABLE_CHECKING
 /* If after reload, make sure we're working with hard regs here.  */
-if (reload_completed)
+if (flag_checking && reload_completed)
 {
 reg_set_iterator rsi;
 unsigned i;
 EXECUTE_IF_SET_IN_REG_SET (used_regs, FIRST_PSEUDO_REGISTER, i, rsi)
 gcc_unreachable ();
 }
-#endif
 if (EXPR_SEPARABLE_P (expr))
 {
 rtx best_reg = NULL_RTX;
 /* Check that we have computed availability of a target register
 ORIG_INSN is the original non-speculative insn in the stream.  */
 static insn_t
 create_speculation_check (expr_t c_expr, ds_t check_ds, insn_t orig_insn)
 {
 rtx check_pattern;
-rtx insn_rtx;
+rtx_insn *insn_rtx;
 insn_t insn;
 basic_block recovery_block;
-rtx label;
+rtx_insn *label;
 /* Create a recovery block if target is going to emit branchy check, or if
 ORIG_INSN was speculative already.  */
 if (targetm.sched.needs_block_p (check_ds)
 || EXPR_SPEC_DONE_DS (INSN_EXPR (orig_insn)) != 0)
 label = BB_HEAD (recovery_block);
 }
 else
 {
 recovery_block = NULL;
-label = NULL_RTX;
+label = NULL;
 }
 /* Get pattern of the check.  */
 check_pattern = targetm.sched.gen_spec_check (EXPR_INSN_RTX (c_expr), label,
 						check_ds);
 return insn;
 }
 /* True when INSN is a "regN = regN" copy.  */
 static bool
-identical_copy_p (rtx insn)
+identical_copy_p (rtx_insn *insn)
 {
 rtx lhs, rhs, pat;
 pat = PATTERN (insn);
 }
 /* Undo all transformations on *AV_PTR that were done when
 moving through INSN.  */
 static void
-undo_transformations (av_set_t *av_ptr, rtx insn)
+undo_transformations (av_set_t *av_ptr, rtx_insn *insn)
 {
 av_set_iterator av_iter;
 expr_t expr;
 av_set_t new_set = NULL;
 if (index >= 0)
 {
 expr_history_def *phist;
-phist = VEC_index (expr_history_def,
+phist = &EXPR_HISTORY_OF_CHANGES (expr)[index];
-EXPR_HISTORY_OF_CHANGES (expr),
-index);
 switch (phist->type)
 {
 case TRANS_SPECULATION:
 {
 sel_print ("would create bookkeeping block: ");
 return TRUE;
 }
+/* Return true when the conflict with newly created implicit clobbers
+between EXPR and THROUGH_INSN is found because of renaming.  */
+static bool
+implicit_clobber_conflict_p (insn_t through_insn, expr_t expr)
+{
+HARD_REG_SET temp;
+rtx_insn *insn;
+rtx reg, rhs, pat;
+hard_reg_set_iterator hrsi;
+unsigned regno;
+bool valid;
+/* Make a new pseudo register.  */
+reg = gen_reg_rtx (GET_MODE (EXPR_LHS (expr)));
+max_regno = max_reg_num ();
+maybe_extend_reg_info_p ();
+/* Validate a change and bail out early.  */
+insn = EXPR_INSN_RTX (expr);
+validate_change (insn, &SET_DEST (PATTERN (insn)), reg, true);
+valid = verify_changes (0);
+cancel_changes (0);
+if (!valid)
+{
+if (sched_verbose >= 6)
+	sel_print ("implicit clobbers failed validation, ");
+return true;
+}
+/* Make a new insn with it.  */
+rhs = copy_rtx (VINSN_RHS (EXPR_VINSN (expr)));
+pat = gen_rtx_SET (reg, rhs);
+start_sequence ();
+insn = emit_insn (pat);
+end_sequence ();
+/* Calculate implicit clobbers.  */
+extract_insn (insn);
+preprocess_constraints (insn);
+alternative_mask prefrred = get_preferred_alternatives (insn);
+ira_implicitly_set_insn_hard_regs (&temp, prefrred);
+AND_COMPL_HARD_REG_SET (temp, ira_no_alloc_regs);
+/* If any implicit clobber registers intersect with regular ones in
+through_insn, we have a dependency and thus bail out.  */
+EXECUTE_IF_SET_IN_HARD_REG_SET (temp, 0, regno, hrsi)
+{
+vinsn_t vi = INSN_VINSN (through_insn);
+if (bitmap_bit_p (VINSN_REG_SETS (vi), regno)
+	  || bitmap_bit_p (VINSN_REG_CLOBBERS (vi), regno)
+	  || bitmap_bit_p (VINSN_REG_USES (vi), regno))
+	return true;
+}
+return false;
+}
 /* Modifies EXPR so it can be moved through the THROUGH_INSN,
 performing necessary transformations.  Record the type of transformation
 made in PTRANS_TYPE, when it is not NULL.  When INSIDE_INSN_GROUP,
 permit all dependencies except true ones, and try to remove those
 too via forward substitution.  All cases when a non-eliminable
 Anyways, we should mark that the original register is
 unavailable.  */
 if (!enable_schedule_as_rhs_p || !EXPR_SEPARABLE_P (expr))
 return MOVEUP_EXPR_NULL;
+/* When renaming a hard register to a pseudo before reload, extra
+	 dependencies can occur from the implicit clobbers of the insn.
+	 Filter out such cases here.  */
+if (!reload_completed && REG_P (EXPR_LHS (expr))
+	  && HARD_REGISTER_P (EXPR_LHS (expr))
+	  && implicit_clobber_conflict_p (through_insn, expr))
+	{
+	  if (sched_verbose >= 6)
+	    sel_print ("implicit clobbers conflict detected, ");
+	  return MOVEUP_EXPR_NULL;
+	}
 EXPR_TARGET_AVAILABLE (expr) = false;
 was_target_conflict = true;
 as_rhs = true;
 }
 dump_expr (expr);
 sel_print (" through %d: ", INSN_UID (insn));
 }
 if (DEBUG_INSN_P (EXPR_INSN_RTX (expr))
+&& BLOCK_FOR_INSN (EXPR_INSN_RTX (expr))
 && (sel_bb_head (BLOCK_FOR_INSN (EXPR_INSN_RTX (expr)))
 	  == EXPR_INSN_RTX (expr)))
 /* Don't use cached information for debug insns that are heads of
 basic blocks.  */;
 else if (try_bitmap_cache (expr, insn, inside_insn_group, &res))
 sel_print ("\n");
 if (sinfo->succs_ok_n != sinfo->all_succs_n)
 sel_print ("real successors num: %d\n", sinfo->all_succs_n);
 }
-/* Add insn to to the tail of current path.  */
+/* Add insn to the tail of current path.  */
 ilist_add (&p, insn);
-FOR_EACH_VEC_ELT (rtx, sinfo->succs_ok, is, succ)
+FOR_EACH_VEC_ELT (sinfo->succs_ok, is, succ)
 {
 av_set_t succ_set;
 /* We will edit SUCC_SET and EXPR_SPEC field of its elements.  */
 succ_set = compute_av_set_inside_bb (succ, p, ws, true);
 av_set_split_usefulness (succ_set,
-VEC_index (int, sinfo->probs_ok, is),
+sinfo->probs_ok[is],
 sinfo->all_prob);
 if (sinfo->all_succs_n > 1)
 	{
 /* Find EXPR'es that came from *all* successors and save them
 }
 /* Check liveness restrictions via hard way when there are more than
 two successors.  */
 if (sinfo->succs_ok_n > 2)
-FOR_EACH_VEC_ELT (rtx, sinfo->succs_ok, is, succ)
+FOR_EACH_VEC_ELT (sinfo->succs_ok, is, succ)
 {
 basic_block succ_bb = BLOCK_FOR_INSN (succ);
 gcc_assert (BB_LV_SET_VALID_P (succ_bb));
 mark_unavailable_targets (av1, BB_AV_SET (succ_bb),
 BB_LV_SET (succ_bb));
 }
 /* Finally, check liveness restrictions on paths leaving the region.  */
 if (sinfo->all_succs_n > sinfo->succs_ok_n)
-FOR_EACH_VEC_ELT (rtx, sinfo->succs_other, is, succ)
+FOR_EACH_VEC_ELT (sinfo->succs_other, is, succ)
 mark_unavailable_targets
 (av1, NULL, BB_LV_SET (BLOCK_FOR_INSN (succ)));
 if (sinfo->all_succs_n > 1)
 {
 return lv;
 }
 /* Update liveness sets for INSN.  */
 static inline void
-update_liveness_on_insn (rtx insn)
+update_liveness_on_insn (rtx_insn *insn)
 {
 ignore_first = true;
 compute_live (insn);
 }
 /* Compute liveness below INSN and write it into REGS.  */
 static inline void
-compute_live_below_insn (rtx insn, regset regs)
+compute_live_below_insn (rtx_insn *insn, regset regs)
 {
-rtx succ;
+rtx_insn *succ;
 succ_iterator si;
 FOR_EACH_SUCC_1 (succ, si, insn, SUCCS_ALL)
 IOR_REG_SET (regs, compute_live (succ));
 }
 /* Update the data gathered in av and lv sets starting from INSN.  */
 static void
-update_data_sets (rtx insn)
+update_data_sets (rtx_insn *insn)
 {
 update_liveness_on_insn (insn);
 if (sel_bb_head_p (insn))
 {
 gcc_assert (AV_LEVEL (insn) != 0);
 /* Filter speculative insns from AV_PTR if we don't want them.  */
 static void
 process_spec_exprs (av_set_t *av_ptr)
 {
-bool try_data_p = true;
-bool try_control_p = true;
 expr_t expr;
 av_set_iterator si;
 if (spec_info == NULL)
 return;
 		  && (ds & DATA_SPEC)
 		  && (ds & CONTROL_SPEC))))
 {
 av_set_iter_remove (&si);
 continue;
-}
-if ((spec_info->flags & PREFER_NON_DATA_SPEC)
-&& !(ds & BEGIN_DATA))
-try_data_p = false;
-if ((spec_info->flags & PREFER_NON_CONTROL_SPEC)
-&& !(ds & BEGIN_CONTROL))
-try_control_p = false;
-}
-FOR_EACH_EXPR_1 (expr, si, av_ptr)
-{
-ds_t ds;
-ds = EXPR_SPEC_DONE_DS (expr);
-if (ds & SPECULATIVE)
-{
-if ((ds & BEGIN_DATA) && !try_data_p)
-/* We don't want any data speculative instructions right
-now.  */
-av_set_iter_remove (&si);
-if ((ds & BEGIN_CONTROL) && !try_control_p)
-/* We don't want any control speculative instructions right
-now.  */
-av_set_iter_remove (&si);
 }
 }
 }
 /* Search for any use-like insns in AV_PTR and decide on scheduling
 }
 return NULL;
 }
-/* Lookup EXPR in VINSN_VEC and return TRUE if found.  */
+/* Lookup EXPR in VINSN_VEC and return TRUE if found.  Also check patterns from
+EXPR's history of changes.  */
 static bool
 vinsn_vec_has_expr_p (vinsn_vec_t vinsn_vec, expr_t expr)
 {
-vinsn_t vinsn;
+vinsn_t vinsn, expr_vinsn;
 int n;
+unsigned i;
-FOR_EACH_VEC_ELT (vinsn_t, vinsn_vec, n, vinsn)
-if (VINSN_SEPARABLE_P (vinsn))
+/* Start with checking expr itself and then proceed with all the old forms
-{
+of expr taken from its history vector.  */
-if (vinsn_equal_p (vinsn, EXPR_VINSN (expr)))
+for (i = 0, expr_vinsn = EXPR_VINSN (expr);
-return true;
+expr_vinsn;
-}
+expr_vinsn = (i < EXPR_HISTORY_OF_CHANGES (expr).length ()
-else
+		     ? EXPR_HISTORY_OF_CHANGES (expr)[i++].old_expr_vinsn
-{
+		     : NULL))
-/* For non-separable instructions, the blocking insn can have
+FOR_EACH_VEC_ELT (vinsn_vec, n, vinsn)
-another pattern due to substitution, and we can't choose
+if (VINSN_SEPARABLE_P (vinsn))
-different register as in the above case.  Check all registers
+	{
-being written instead.  */
+	  if (vinsn_equal_p (vinsn, expr_vinsn))
-if (bitmap_intersect_p (VINSN_REG_SETS (vinsn),
+	    return true;
-VINSN_REG_SETS (EXPR_VINSN (expr))))
+	}
-return true;
+else
-}
+	{
+	  /* For non-separable instructions, the blocking insn can have
+	     another pattern due to substitution, and we can't choose
+	     different register as in the above case.  Check all registers
+	     being written instead.  */
+	  if (bitmap_intersect_p (VINSN_REG_SETS (vinsn),
+				  VINSN_REG_SETS (expr_vinsn)))
+	    return true;
+	}
 return false;
 }
-#ifdef ENABLE_CHECKING
 /* Return true if either of expressions from ORIG_OPS can be blocked
 by previously created bookkeeping code.  STATIC_PARAMS points to static
 parameters of move_op.  */
 static bool
 av_set_could_be_blocked_by_bookkeeping_p (av_set_t orig_ops, void *static_params)
 /* Expressions in ORIG_OPS may have wrong destination register due to
 renaming.  Check with the right register instead.  */
 if (sparams->dest && REG_P (sparams->dest))
 {
-unsigned regno = REGNO (sparams->dest);
+rtx reg = sparams->dest;
 vinsn_t failed_vinsn = INSN_VINSN (sparams->failed_insn);
-if (bitmap_bit_p (VINSN_REG_SETS (failed_vinsn), regno)
+if (register_unavailable_p (VINSN_REG_SETS (failed_vinsn), reg)
-	  || bitmap_bit_p (VINSN_REG_USES (failed_vinsn), regno)
+	  || register_unavailable_p (VINSN_REG_USES (failed_vinsn), reg)
-	  || bitmap_bit_p (VINSN_REG_CLOBBERS (failed_vinsn), regno))
+	  || register_unavailable_p (VINSN_REG_CLOBBERS (failed_vinsn), reg))
 	return true;
 }
 return false;
 }
-#endif
 /* Clear VINSN_VEC and detach vinsns.  */
 static void
 vinsn_vec_clear (vinsn_vec_t *vinsn_vec)
 {
-unsigned len = VEC_length (vinsn_t, *vinsn_vec);
+unsigned len = vinsn_vec->length ();
 if (len > 0)
 {
 vinsn_t vinsn;
 int n;
-FOR_EACH_VEC_ELT (vinsn_t, *vinsn_vec, n, vinsn)
+FOR_EACH_VEC_ELT (*vinsn_vec, n, vinsn)
 vinsn_detach (vinsn);
-VEC_block_remove (vinsn_t, *vinsn_vec, 0, len);
+vinsn_vec->block_remove (0, len);
 }
 }
 /* Add the vinsn of EXPR to the VINSN_VEC.  */
 static void
 vinsn_vec_add (vinsn_vec_t *vinsn_vec, expr_t expr)
 {
 vinsn_attach (EXPR_VINSN (expr));
-VEC_safe_push (vinsn_t, heap, *vinsn_vec, EXPR_VINSN (expr));
+vinsn_vec->safe_push (EXPR_VINSN (expr));
 }
 /* Free the vector representing blocked expressions.  */
 static void
-vinsn_vec_free (vinsn_vec_t *vinsn_vec)
+vinsn_vec_free (vinsn_vec_t &vinsn_vec)
 {
-if (*vinsn_vec)
+vinsn_vec.release ();
-VEC_free (vinsn_t, heap, *vinsn_vec);
 }
 /* Increase EXPR_PRIORITY_ADJ for INSN by AMOUNT.  */
 void sel_add_to_insn_priority (rtx insn, int amount)
 already scheduled.  */
 if (av == NULL)
 return false;
 /* Empty vector from the previous stuff.  */
-if (VEC_length (expr_t, vec_av_set) > 0)
+if (vec_av_set.length () > 0)
-VEC_block_remove (expr_t, vec_av_set, 0, VEC_length (expr_t, vec_av_set));
+vec_av_set.block_remove (0, vec_av_set.length ());
 /* Turn the set into a vector for sorting and call sel_target_adjust_priority
 for each insn.  */
-gcc_assert (VEC_empty (expr_t, vec_av_set));
+gcc_assert (vec_av_set.is_empty ());
 FOR_EACH_EXPR (expr, si, av)
 {
-VEC_safe_push (expr_t, heap, vec_av_set, expr);
+vec_av_set.safe_push (expr);
 gcc_assert (EXPR_PRIORITY_ADJ (expr) == 0 || *pneed_stall);
 /* Adjust priority using target backend hook.  */
 sel_target_adjust_priority (expr);
 }
 /* Sort the vector.  */
-VEC_qsort (expr_t, vec_av_set, sel_rank_for_schedule);
+vec_av_set.qsort (sel_rank_for_schedule);
 /* We record maximal priority of insns in av set for current instruction
 group.  */
 if (FENCE_STARTS_CYCLE_P (fence))
 av_max_prio = est_ticks_till_branch = INT_MIN;
 /* Filter out inappropriate expressions.  Loop's direction is reversed to
-visit "best" instructions first.  We assume that VEC_unordered_remove
+visit "best" instructions first.  We assume that vec::unordered_remove
 moves last element in place of one being deleted.  */
-for (n = VEC_length (expr_t, vec_av_set) - 1, stalled = 0; n >= 0; n--)
+for (n = vec_av_set.length () - 1, stalled = 0; n >= 0; n--)
 {
-expr_t expr = VEC_index (expr_t, vec_av_set, n);
+expr_t expr = vec_av_set[n];
 insn_t insn = EXPR_INSN_RTX (expr);
 signed char target_available;
 bool is_orig_reg_p = true;
 int need_cycles, new_prio;
+bool fence_insn_p = INSN_UID (insn) == INSN_UID (FENCE_INSN (fence));
 /* Don't allow any insns other than from SCHED_GROUP if we have one.  */
 if (FENCE_SCHED_NEXT (fence) && insn != FENCE_SCHED_NEXT (fence))
 {
-VEC_unordered_remove (expr_t, vec_av_set, n);
+vec_av_set.unordered_remove (n);
 continue;
 }
 /* Set number of sched_next insns (just in case there
 could be several).  */
 FIXME: try to minimize calls to this.  */
 target_available = EXPR_TARGET_AVAILABLE (expr);
 /* If insn was already scheduled on the current fence,
 	 set TARGET_AVAILABLE to -1 no matter what expr's attribute says.  */
-if (vinsn_vec_has_expr_p (vec_target_unavailable_vinsns, expr))
+if (vinsn_vec_has_expr_p (vec_target_unavailable_vinsns, expr)
+	  && !fence_insn_p)
 	target_available = -1;
 /* If the availability of the EXPR is invalidated by the insertion of
 	 bookkeeping earlier, make sure that we won't choose this expr for
 	 scheduling if it's not separable, and if it is separable, then
 	 we have to recompute the set of available registers for it.  */
 if (vinsn_vec_has_expr_p (vec_bookkeeping_blocked_vinsns, expr))
 	{
-VEC_unordered_remove (expr_t, vec_av_set, n);
+vec_av_set.unordered_remove (n);
 if (sched_verbose >= 4)
 sel_print ("Expr %d is blocked by bookkeeping inserted earlier\n",
 INSN_UID (insn));
 continue;
 }
 else if (/* Non-separable instruction will never
 get another register. */
 (target_available == false
 && !EXPR_SEPARABLE_P (expr))
 /* Don't try to find a register for low-priority expression.  */
-|| (int) VEC_length (expr_t, vec_av_set) - 1 - n >= max_insns_to_rename
+|| (int) vec_av_set.length () - 1 - n >= max_insns_to_rename
 /* ??? FIXME: Don't try to rename data speculation.  */
 || (EXPR_SPEC_DONE_DS (expr) & BEGIN_DATA)
 || ! find_best_reg_for_expr (expr, bnds, &is_orig_reg_p))
 {
-VEC_unordered_remove (expr_t, vec_av_set, n);
+vec_av_set.unordered_remove (n);
 if (sched_verbose >= 4)
 sel_print ("Expr %d has no suitable target register\n",
 INSN_UID (insn));
-continue;
+	  /* A fence insn should not get here.  */
+	  gcc_assert (!fence_insn_p);
+	  continue;
 }
+/* At this point a fence insn should always be available.  */
+gcc_assert (!fence_insn_p
+		  || INSN_UID (FENCE_INSN (fence)) == INSN_UID (EXPR_INSN_RTX (expr)));
 /* Filter expressions that need to be renamed or speculated when
 	 pipelining, because compensating register copies or speculation
 	 checks are likely to be placed near the beginning of the loop,
 	 causing a stall.  */
 	     renaming/speculation to be successful.  */
 	  int need_n_ticks_till_branch = sel_vinsn_cost (EXPR_VINSN (expr));
 	  if ((int) current_loop_nest->ninsns < 9)
 	    {
-	      VEC_unordered_remove (expr_t, vec_av_set, n);
+	      vec_av_set.unordered_remove (n);
 	      if (sched_verbose >= 4)
 		sel_print ("Pipelining expr %d will likely cause stall\n",
 			   INSN_UID (insn));
 	      continue;
 	    }
 	  if ((int) current_loop_nest->ninsns - num_insns_scheduled
 	      < need_n_ticks_till_branch * issue_rate / 2
 	      && est_ticks_till_branch < need_n_ticks_till_branch)
 	     {
-	       VEC_unordered_remove (expr_t, vec_av_set, n);
+	       vec_av_set.unordered_remove (n);
 	       if (sched_verbose >= 4)
 		 sel_print ("Pipelining expr %d will likely cause stall\n",
 			    INSN_UID (insn));
 	       continue;
 	     }
 if (sel_insn_is_speculation_check (insn)
 	  && EXPR_PRIORITY (expr) < av_max_prio)
 	{
 stalled++;
 min_need_stall = min_need_stall < 0 ? 1 : MIN (min_need_stall, 1);
-VEC_unordered_remove (expr_t, vec_av_set, n);
+vec_av_set.unordered_remove (n);
 	  if (sched_verbose >= 4)
 	    sel_print ("Delaying speculation check %d until its first use\n",
 		       INSN_UID (insn));
 	  continue;
 	}
 	    {
 	      stalled++;
 	      min_need_stall = (min_need_stall < 0
 				? need_cycles
 				: MIN (min_need_stall, need_cycles));
-	      VEC_unordered_remove (expr_t, vec_av_set, n);
+	      vec_av_set.unordered_remove (n);
 	      if (sched_verbose >= 4)
 		sel_print ("Expr %d is not ready until cycle %d (cached)\n",
 			   INSN_UID (insn),
 			   FENCE_READY_TICKS (fence)[INSN_UID (insn)]);
 stalled++;
 min_need_stall = (min_need_stall < 0
 ? need_cycles
 : MIN (min_need_stall, need_cycles));
-VEC_unordered_remove (expr_t, vec_av_set, n);
+vec_av_set.unordered_remove (n);
 if (sched_verbose >= 4)
 sel_print ("Expr %d is not ready yet until cycle %d\n",
 INSN_UID (insn),
 FENCE_READY_TICKS (fence)[INSN_UID (insn)]);
 /* Clear SCHED_NEXT.  */
 if (FENCE_SCHED_NEXT (fence))
 {
 gcc_assert (sched_next_worked == 1);
-FENCE_SCHED_NEXT (fence) = NULL_RTX;
+FENCE_SCHED_NEXT (fence) = NULL;
 }
 /* No need to stall if this variable was not initialized.  */
 if (min_need_stall < 0)
 min_need_stall = 0;
-if (VEC_empty (expr_t, vec_av_set))
+if (vec_av_set.is_empty ())
 {
 /* We need to set *pneed_stall here, because later we skip this code
 when ready list is empty.  */
 *pneed_stall = min_need_stall;
 return false;
 }
 else
 gcc_assert (min_need_stall == 0);
 /* Sort the vector.  */
-VEC_qsort (expr_t, vec_av_set, sel_rank_for_schedule);
+vec_av_set.qsort (sel_rank_for_schedule);
 if (sched_verbose >= 4)
 {
 sel_print ("Total ready exprs: %d, stalled: %d\n",
-VEC_length (expr_t, vec_av_set), stalled);
+vec_av_set.length (), stalled);
-sel_print ("Sorted av set (%d): ", VEC_length (expr_t, vec_av_set));
+sel_print ("Sorted av set (%d): ", vec_av_set.length ());
-FOR_EACH_VEC_ELT (expr_t, vec_av_set, n, expr)
+FOR_EACH_VEC_ELT (vec_av_set, n, expr)
 dump_expr (expr);
 sel_print ("\n");
 }
 *pneed_stall = 0;
 {
 int n;
 expr_t expr;
 /* Allocate and fill the ready list from the sorted vector.  */
-ready.n_ready = VEC_length (expr_t, vec_av_set);
+ready.n_ready = vec_av_set.length ();
 ready.first = ready.n_ready - 1;
 gcc_assert (ready.n_ready > 0);
 if (ready.n_ready > max_issue_size)
 {
 max_issue_size = ready.n_ready;
 sched_extend_ready_list (ready.n_ready);
 }
-FOR_EACH_VEC_ELT (expr_t, vec_av_set, n, expr)
+FOR_EACH_VEC_ELT (vec_av_set, n, expr)
 {
 vinsn_t vi = EXPR_VINSN (expr);
 insn_t insn = VINSN_INSN_RTX (vi);
 ready_try[n] = 0;
 /* Ensure that ready list and vec_av_set are in line with each other,
 i.e. vec_av_set[i] == ready_element (&ready, i).  */
 if (issue_more && ran_hook)
 {
 int i, j, n;
-rtx *arr = ready.vec;
+rtx_insn **arr = ready.vec;
-expr_t *vec = VEC_address (expr_t, vec_av_set);
+expr_t *vec = vec_av_set.address ();
 for (i = 0, n = ready.n_ready; i < n; i++)
 if (EXPR_INSN_RTX (vec[i]) != arr[i])
 {
-expr_t tmp;
 for (j = i; j < n; j++)
 if (EXPR_INSN_RTX (vec[j]) == arr[i])
 break;
 gcc_assert (j < n);
-tmp = vec[i];
+	    std::swap (vec[i], vec[j]);
-vec[i] = vec[j];
-vec[j] = tmp;
 }
 }
 return issue_more;
 }
-/* Return an EXPR correponding to INDEX element of ready list, if
+/* Return an EXPR corresponding to INDEX element of ready list, if
 FOLLOW_READY_ELEMENT is true (i.e., an expr of
 ready_element (&ready, INDEX) will be returned), and to INDEX element of
 ready.vec otherwise.  */
 static inline expr_t
 find_expr_for_ready (int index, bool follow_ready_element)
 expr_t expr;
 int real_index;
 real_index = follow_ready_element ? ready.first - index : index;
-expr = VEC_index (expr_t, vec_av_set, real_index);
+expr = vec_av_set[real_index];
 gcc_assert (ready.vec[real_index] == EXPR_INSN_RTX (expr));
 return expr;
 }
 insn = ready_element (&ready, i);
 if (! have_hook || i == 0)
 r = 0;
 else
-r = !targetm.sched.first_cycle_multipass_dfa_lookahead_guard (insn);
+r = targetm.sched.first_cycle_multipass_dfa_lookahead_guard (insn, i);
 gcc_assert (INSN_CODE (insn) >= 0);
 /* Only insns with ready_try = 0 can get here
 from fill_ready_list.  */
 /* Call the rest of the hooks after the choice was made.  Return
 the number of insns that still can be issued given that the current
 number is ISSUE_MORE.  FENCE and BEST_INSN are the current fence
 and the insn chosen for scheduling, respectively.  */
 static int
-invoke_aftermath_hooks (fence_t fence, rtx best_insn, int issue_more)
+invoke_aftermath_hooks (fence_t fence, rtx_insn *best_insn, int issue_more)
 {
 gcc_assert (INSN_P (best_insn));
 /* First, call dfa_new_cycle, and then variable_issue, if available.  */
 sel_dfa_new_cycle (best_insn, fence);
 issue_more =
 targetm.sched.variable_issue (sched_dump, sched_verbose, best_insn,
 issue_more);
 memcpy (FENCE_STATE (fence), curr_state, dfa_state_size);
 }
-else if (GET_CODE (PATTERN (best_insn)) != USE
+else if (!DEBUG_INSN_P (best_insn)
-&& GET_CODE (PATTERN (best_insn)) != CLOBBER)
+	   && GET_CODE (PATTERN (best_insn)) != USE
+	   && GET_CODE (PATTERN (best_insn)) != CLOBBER)
 issue_more--;
 return issue_more;
 }
 /* Estimate the cost of issuing INSN on DFA state STATE.  */
 static int
-estimate_insn_cost (rtx insn, state_t state)
+estimate_insn_cost (rtx_insn *insn, state_t state)
 {
 static state_t temp = NULL;
 int cost;
 if (!temp)
 /* Return the cost of issuing EXPR on the FENCE as estimated by DFA.
 This function properly handles ASMs, USEs etc.  */
 static int
 get_expr_cost (expr_t expr, fence_t fence)
 {
-rtx insn = EXPR_INSN_RTX (expr);
+rtx_insn *insn = EXPR_INSN_RTX (expr);
 if (recog_memoized (insn) < 0)
 {
 if (!FENCE_STARTS_CYCLE_P (fence)
 	  && INSN_ASM_P (insn))
 {
 basic_block candidate_block = NULL;
 edge e;
 /* Loop over edges from E1 to E2, inclusive.  */
-for (e = e1; !lax || e->dest != EXIT_BLOCK_PTR; e = EDGE_SUCC (e->dest, 0))
+for (e = e1; !lax || e->dest != EXIT_BLOCK_PTR_FOR_FN (cfun); e =
+EDGE_SUCC (e->dest, 0))
 {
 if (EDGE_COUNT (e->dest->preds) == 2)
 	{
 	  if (candidate_block == NULL)
 	    candidate_block = (EDGE_PRED (e->dest, 0) == e
 new_bb = sched_split_block (bb, NULL);
 /* Move note_list from the upper bb.  */
 gcc_assert (BB_NOTE_LIST (new_bb) == NULL_RTX);
 BB_NOTE_LIST (new_bb) = BB_NOTE_LIST (bb);
-BB_NOTE_LIST (bb) = NULL_RTX;
+BB_NOTE_LIST (bb) = NULL;
 gcc_assert (e2->dest == bb);
 /* Skip block for bookkeeping copy when leaving E1->src.  */
 if (e1->flags & EDGE_FALLTHRU)
 insn_t last;
 if (DEBUG_INSN_P (insn)
 	  && single_succ_p (new_bb)
 	  && (succ = single_succ (new_bb))
-	  && succ != EXIT_BLOCK_PTR
+	  && succ != EXIT_BLOCK_PTR_FOR_FN (cfun)
 	  && DEBUG_INSN_P ((last = sel_bb_end (new_bb))))
 	{
 	  while (insn != last && (DEBUG_INSN_P (insn) || NOTE_P (insn)))
 	    insn = NEXT_INSN (insn);
 	  if (insn == last)
 	    {
 	      sel_global_bb_info_def gbi;
 	      sel_region_bb_info_def rbi;
-	      int i;
 	      if (sched_verbose >= 2)
 		sel_print ("Swapping block ids %i and %i\n",
 			   new_bb->index, succ->index);
-	      i = new_bb->index;
+	      std::swap (new_bb->index, succ->index);
-	      new_bb->index = succ->index;
-	      succ->index = i;
+	      SET_BASIC_BLOCK_FOR_FN (cfun, new_bb->index, new_bb);
+	      SET_BASIC_BLOCK_FOR_FN (cfun, succ->index, succ);
-	      SET_BASIC_BLOCK (new_bb->index, new_bb);
-	      SET_BASIC_BLOCK (succ->index, succ);
 	      memcpy (&gbi, SEL_GLOBAL_BB_INFO (new_bb), sizeof (gbi));
 	      memcpy (SEL_GLOBAL_BB_INFO (new_bb), SEL_GLOBAL_BB_INFO (succ),
 		      sizeof (gbi));
 	      memcpy (SEL_GLOBAL_BB_INFO (succ), &gbi, sizeof (gbi));
 	      memcpy (&rbi, SEL_REGION_BB_INFO (new_bb), sizeof (rbi));
 	      memcpy (SEL_REGION_BB_INFO (new_bb), SEL_REGION_BB_INFO (succ),
 		      sizeof (rbi));
 	      memcpy (SEL_REGION_BB_INFO (succ), &rbi, sizeof (rbi));
-	      i = BLOCK_TO_BB (new_bb->index);
+	      std::swap (BLOCK_TO_BB (new_bb->index),
-	      BLOCK_TO_BB (new_bb->index) = BLOCK_TO_BB (succ->index);
+			 BLOCK_TO_BB (succ->index));
-	      BLOCK_TO_BB (succ->index) = i;
+	      std::swap (CONTAINING_RGN (new_bb->index),
-	      i = CONTAINING_RGN (new_bb->index);
+			 CONTAINING_RGN (succ->index));
-	      CONTAINING_RGN (new_bb->index) = CONTAINING_RGN (succ->index);
-	      CONTAINING_RGN (succ->index) = i;
+	      for (int i = 0; i < current_nr_blocks; i++)
-	      for (i = 0; i < current_nr_blocks; i++)
 		if (BB_TO_BLOCK (i) == succ->index)
 		  BB_TO_BLOCK (i) = new_bb->index;
 		else if (BB_TO_BLOCK (i) == new_bb->index)
 		  BB_TO_BLOCK (i) = succ->index;
 	      if (sched_verbose >= 4)
 		sel_print ("Swapping code labels %i and %i\n",
 			   CODE_LABEL_NUMBER (BB_HEAD (new_bb)),
 			   CODE_LABEL_NUMBER (BB_HEAD (succ)));
-	      i = CODE_LABEL_NUMBER (BB_HEAD (new_bb));
+	      std::swap (CODE_LABEL_NUMBER (BB_HEAD (new_bb)),
-	      CODE_LABEL_NUMBER (BB_HEAD (new_bb))
+			 CODE_LABEL_NUMBER (BB_HEAD (succ)));
-		= CODE_LABEL_NUMBER (BB_HEAD (succ));
-	      CODE_LABEL_NUMBER (BB_HEAD (succ)) = i;
 	    }
 	}
 }
 return bb;
 }
 /* Return insn after which we must insert bookkeeping code for path(s) incoming
-into E2->dest, except from E1->src.  */
+into E2->dest, except from E1->src.  If the returned insn immediately
+precedes a fence, assign that fence to *FENCE_TO_REWIND.  */
 static insn_t
-find_place_for_bookkeeping (edge e1, edge e2)
+find_place_for_bookkeeping (edge e1, edge e2, fence_t *fence_to_rewind)
 {
 insn_t place_to_insert;
 /* Find a basic block that can hold bookkeeping.  If it can be found, do not
 create new basic block, but insert bookkeeping there.  */
 basic_block book_block = find_block_for_bookkeeping (e1, e2, FALSE);
 	 bookkeeping, this causes scheduling differences between debug
 	 and non-debug compilations, for the block would have been
 	 removed already.  */
 if (DEBUG_INSN_P (place_to_insert))
 	{
-	  rtx insn = sel_bb_head (book_block);
+	  rtx_insn *insn = sel_bb_head (book_block);
 	  while (insn != place_to_insert &&
 		 (DEBUG_INSN_P (insn) || NOTE_P (insn)))
 	    insn = NEXT_INSN (insn);
 {
 if (sched_verbose >= 9)
 	sel_print ("Pre-existing bookkeeping block is %i\n", book_block->index);
 }
-/* If basic block ends with a jump, insert bookkeeping code right before it.  */
+*fence_to_rewind = NULL;
+/* If basic block ends with a jump, insert bookkeeping code right before it.
+Notice if we are crossing a fence when taking PREV_INSN.  */
 if (INSN_P (place_to_insert) && control_flow_insn_p (place_to_insert))
-place_to_insert = PREV_INSN (place_to_insert);
+{
+*fence_to_rewind = flist_lookup (fences, place_to_insert);
+place_to_insert = PREV_INSN (place_to_insert);
+}
 return place_to_insert;
 }
 /* Find a proper seqno for bookkeeing insn inserted at PLACE_TO_INSERT
 for JOIN_POINT.   */
 static int
 find_seqno_for_bookkeeping (insn_t place_to_insert, insn_t join_point)
 {
 int seqno;
-rtx next;
 /* Check if we are about to insert bookkeeping copy before a jump, and use
 jump's seqno for the copy; otherwise, use JOIN_POINT's seqno.  */
-next = NEXT_INSN (place_to_insert);
+rtx_insn *next = NEXT_INSN (place_to_insert);
 if (INSN_P (next)
 && JUMP_P (next)
 && BLOCK_FOR_INSN (next) == BLOCK_FOR_INSN (place_to_insert))
 {
 gcc_assert (INSN_SCHED_TIMES (next) == 0);
 /* Insert bookkeeping copy of C_EXPS's insn after PLACE_TO_INSERT, assigning
 NEW_SEQNO to it.  Return created insn.  */
 static insn_t
 emit_bookkeeping_insn (insn_t place_to_insert, expr_t c_expr, int new_seqno)
 {
-rtx new_insn_rtx = create_copy_of_insn_rtx (EXPR_INSN_RTX (c_expr));
+rtx_insn *new_insn_rtx = create_copy_of_insn_rtx (EXPR_INSN_RTX (c_expr));
 vinsn_t new_vinsn
 = create_vinsn_from_insn_rtx (new_insn_rtx,
 				  VINSN_UNIQUE_P (EXPR_VINSN (c_expr)));
 generate_bookkeeping_insn (expr_t c_expr, edge e1, edge e2)
 {
 insn_t join_point, place_to_insert, new_insn;
 int new_seqno;
 bool need_to_exchange_data_sets;
+fence_t fence_to_rewind;
 if (sched_verbose >= 4)
 sel_print ("Generating bookkeeping insn (%d->%d)\n", e1->src->index,
 	       e2->dest->index);
 join_point = sel_bb_head (e2->dest);
-place_to_insert = find_place_for_bookkeeping (e1, e2);
+place_to_insert = find_place_for_bookkeeping (e1, e2, &fence_to_rewind);
-if (!place_to_insert)
-return NULL;
 new_seqno = find_seqno_for_bookkeeping (place_to_insert, join_point);
 need_to_exchange_data_sets
 = sel_bb_empty_p (BLOCK_FOR_INSN (place_to_insert));
 new_insn = emit_bookkeeping_insn (place_to_insert, c_expr, new_seqno);
+if (fence_to_rewind)
+FENCE_INSN (fence_to_rewind) = new_insn;
 /* When inserting bookkeeping insn in new block, av sets should be
 following: old basic block (that now holds bookkeeping) data sets are
 the same as was before generation of bookkeeping, and new basic block
 (that now hold all other insns of old basic block) data sets are
 if (!control_flow_insn_p (EXPR_INSN_RTX (expr))
 	  && (!bookkeeping_p || VINSN_UNIQUE_P (EXPR_VINSN (expr)))
 	  && (EXPR_SPEC (expr)
 	      || !EXPR_ORIG_BB_INDEX (expr)
 	      || !dominated_by_p (CDI_DOMINATORS,
-				  BASIC_BLOCK (EXPR_ORIG_BB_INDEX (expr)),
+				  BASIC_BLOCK_FOR_FN (cfun,
+						      EXPR_ORIG_BB_INDEX (expr)),
 				  BLOCK_FOR_INSN (FENCE_INSN (fence)))))
 	{
 if (sched_verbose >= 4)
 sel_print ("Expr %d removed because it would need bookkeeping, which "
 "cannot be created\n", INSN_UID (EXPR_INSN_RTX (expr)));
 (p8)  mov [r14]=r23
 NOTE BASIC BLOCK:
 ...
 */
 static void
-move_cond_jump (rtx insn, bnd_t bnd)
+move_cond_jump (rtx_insn *insn, bnd_t bnd)
 {
 edge ft_edge;
 basic_block block_from, block_next, block_new, block_bnd, bb;
-rtx next, prev, link, head;
+rtx_insn *next, *prev, *link, *head;
 block_from = BLOCK_FOR_INSN (insn);
 block_bnd = BLOCK_FOR_INSN (BND_TO (bnd));
 prev = BND_TO (bnd);
-#ifdef ENABLE_CHECKING
 /* Moving of jump should not cross any other jumps or beginnings of new
 basic blocks.  The only exception is when we move a jump through
 mutually exclusive insns along fallthru edges.  */
-if (block_from != block_bnd)
+if (flag_checking && block_from != block_bnd)
 {
 bb = block_from;
 for (link = PREV_INSN (insn); link != PREV_INSN (prev);
 link = PREV_INSN (link))
 {
 gcc_assert (single_pred (bb) == BLOCK_FOR_INSN (link));
 bb = BLOCK_FOR_INSN (link);
 }
 }
 }
-#endif
 /* Jump is moved to the boundary.  */
 next = PREV_INSN (insn);
 BND_TO (bnd) = insn;
 /* Move all instructions except INSN to BLOCK_NEW.  */
 bb = block_bnd;
 head = BB_HEAD (block_new);
 while (bb != block_from->next_bb)
 {
-rtx from, to;
+rtx_insn *from, *to;
 from = bb == block_bnd ? prev : sel_bb_head (bb);
 to = bb == block_from ? next : sel_bb_end (bb);
 /* The jump being moved can be the first insn in the block.
 In this case we don't have to move anything in this block.  */
 remove_temp_moveop_nops (bool full_tidying)
 {
 int i;
 insn_t insn;
-FOR_EACH_VEC_ELT (insn_t, vec_temp_moveop_nops, i, insn)
+FOR_EACH_VEC_ELT (vec_temp_moveop_nops, i, insn)
 {
 gcc_assert (INSN_NOP_P (insn));
 return_nop_to_pool (insn, full_tidying);
 }
 /* Empty the vector.  */
-if (VEC_length (insn_t, vec_temp_moveop_nops) > 0)
+if (vec_temp_moveop_nops.length () > 0)
-VEC_block_remove (insn_t, vec_temp_moveop_nops, 0,
+vec_temp_moveop_nops.block_remove (0, vec_temp_moveop_nops.length ());
-		      VEC_length (insn_t, vec_temp_moveop_nops));
 }
 /* Records the maximal UID before moving up an instruction.  Used for
 distinguishing between bookkeeping copies and original insns.  */
 static int max_uid_before_move_op = 0;
 /* Move nop to previous block.  */
 static void ATTRIBUTE_UNUSED
 move_nop_to_previous_block (insn_t nop, basic_block prev_bb)
 {
-insn_t prev_insn, next_insn, note;
+insn_t prev_insn, next_insn;
 gcc_assert (sel_bb_head_p (nop)
 && prev_bb == BLOCK_FOR_INSN (nop)->prev_bb);
-note = bb_note (BLOCK_FOR_INSN (nop));
+rtx_note *note = bb_note (BLOCK_FOR_INSN (nop));
 prev_insn = sel_bb_end (prev_bb);
 next_insn = NEXT_INSN (nop);
 gcc_assert (prev_insn != NULL_RTX
 && PREV_INSN (note) == prev_insn);
-NEXT_INSN (prev_insn) = nop;
+SET_NEXT_INSN (prev_insn) = nop;
-PREV_INSN (nop) = prev_insn;
+SET_PREV_INSN (nop) = prev_insn;
-PREV_INSN (note) = nop;
+SET_PREV_INSN (note) = nop;
-NEXT_INSN (note) = next_insn;
+SET_NEXT_INSN (note) = next_insn;
-NEXT_INSN (nop) = note;
+SET_NEXT_INSN (nop) = note;
-PREV_INSN (next_insn) = note;
+SET_PREV_INSN (next_insn) = note;
 BB_END (prev_bb) = nop;
 BLOCK_FOR_INSN (nop) = prev_bb;
 }
 bool asm_p;
 /* First, reflect that something is scheduled on this fence.  */
 asm_p = advance_state_on_fence (fence, insn);
 FENCE_LAST_SCHEDULED_INSN (fence) = insn;
-VEC_safe_push (rtx, gc, FENCE_EXECUTING_INSNS (fence), insn);
+vec_safe_push (FENCE_EXECUTING_INSNS (fence), insn);
 if (SCHED_GROUP_P (insn))
 {
 FENCE_SCHED_NEXT (fence) = INSN_SCHED_NEXT (insn);
 SCHED_GROUP_P (insn) = 0;
 }
 else
-FENCE_SCHED_NEXT (fence) = NULL_RTX;
+FENCE_SCHED_NEXT (fence) = NULL;
 if (INSN_UID (insn) < FENCE_READY_TICKS_SIZE (fence))
 FENCE_READY_TICKS (fence) [INSN_UID (insn)] = 0;
 /* Set instruction scheduling info.  This will be used in bundling,
 pipelining, tick computations etc.  */
 /* Do while we can add any operation to the current group.  */
 do
 {
 blist_t *bnds_tailp1, *bndsp;
 expr_t expr_vliw;
-int need_stall;
+int need_stall = false;
 int was_stall = 0, scheduled_insns = 0;
 int max_insns = pipelining_p ? issue_rate : 2 * issue_rate;
 int max_stall = pipelining_p ? 1 : 3;
 bool last_insn_was_debug = false;
 bool was_debug_bb_end_p = false;
 update_and_record_unavailable_insns (basic_block book_block)
 {
 av_set_iterator i;
 av_set_t old_av_set = NULL;
 expr_t cur_expr;
-rtx bb_end = sel_bb_end (book_block);
+rtx_insn *bb_end = sel_bb_end (book_block);
 /* First, get correct liveness in the bookkeeping block.  The problem is
 the range between the bookeeping insn and the end of block.  */
 update_liveness_on_insn (bb_end);
 if (control_flow_insn_p (bb_end))
 /* In this case, we can just turn off the E_T_A bit, but we can't
 represent this information with the current vector.  */
 || EXPR_TARGET_AVAILABLE (new_expr)
 		 != EXPR_TARGET_AVAILABLE (cur_expr))
 	    /* Unfortunately, the below code could be also fired up on
-	       separable insns.
+	       separable insns, e.g. when moving insns through the new
-	       FIXME: add an example of how this could happen.  */
+	       speculation check as in PR 53701.  */
 vinsn_vec_add (&vec_bookkeeping_blocked_vinsns, cur_expr);
 }
 av_set_clear (&old_av_set);
 }
 }
 /* Track bookkeeping copies created, insns scheduled, and blocks for
 rescheduling when INSN is found by move_op.  */
 static void
-track_scheduled_insns_and_blocks (rtx insn)
+track_scheduled_insns_and_blocks (rtx_insn *insn)
 {
 /* Even if this insn can be a copy that will be removed during current move_op,
 we still need to count it as an originator.  */
 bitmap_set_bit (current_originators, INSN_UID (insn));
 }
 /* Emit a register-register copy for INSN if needed.  Return true if
 emitted one.  PARAMS is the move_op static parameters.  */
 static bool
-maybe_emit_renaming_copy (rtx insn,
+maybe_emit_renaming_copy (rtx_insn *insn,
 moveop_static_params_p params)
 {
 bool insn_emitted  = false;
 rtx cur_reg;
 /* Emit a speculative check for INSN speculated as EXPR if needed.
 Return true if we've  emitted one.  PARAMS is the move_op static
 parameters.  */
 static bool
-maybe_emit_speculative_check (rtx insn, expr_t expr,
+maybe_emit_speculative_check (rtx_insn *insn, expr_t expr,
 moveop_static_params_p params)
 {
 bool insn_emitted = false;
 insn_t x;
 ds_t check_ds;
 /* Handle transformations that leave an insn in place of original
 insn such as renaming/speculation.  Return true if one of such
 transformations actually happened, and we have emitted this insn.  */
 static bool
-handle_emitting_transformations (rtx insn, expr_t expr,
+handle_emitting_transformations (rtx_insn *insn, expr_t expr,
 moveop_static_params_p params)
 {
 bool insn_emitted = false;
 insn_emitted = maybe_emit_renaming_copy (insn, params);
 /* If INSN is the only insn in the basic block (not counting JUMP,
 which may be a jump to next insn, and DEBUG_INSNs), we want to
 leave a NOP there till the return to fill_insns.  */
 static bool
-need_nop_to_preserve_insn_bb (rtx insn)
+need_nop_to_preserve_insn_bb (rtx_insn *insn)
 {
 insn_t bb_head, bb_end, bb_next, in_next;
 basic_block bb = BLOCK_FOR_INSN (insn);
 bb_head = sel_bb_head (bb);
 }
 /* Remove INSN from stream.  When ONLY_DISCONNECT is true, its data
 is not removed but reused when INSN is re-emitted.  */
 static void
-remove_insn_from_stream (rtx insn, bool only_disconnect)
+remove_insn_from_stream (rtx_insn *insn, bool only_disconnect)
 {
 /* If there's only one insn in the BB, make sure that a nop is
 inserted into it, so the basic block won't disappear when we'll
 delete INSN below with sel_remove_insn. It should also survive
 till the return to fill_insns.  */
 if (need_nop_to_preserve_insn_bb (insn))
 {
 insn_t nop = get_nop_from_pool (insn);
 gcc_assert (INSN_NOP_P (nop));
-VEC_safe_push (insn_t, heap, vec_temp_moveop_nops, nop);
+vec_temp_moveop_nops.safe_push (nop);
 }
 sel_remove_insn (insn, only_disconnect, false);
 }
 static void
 move_op_orig_expr_found (insn_t insn, expr_t expr,
 cmpd_local_params_p lparams ATTRIBUTE_UNUSED,
 void *static_params)
 {
-bool only_disconnect, insn_emitted;
+bool only_disconnect;
 moveop_static_params_p params = (moveop_static_params_p) static_params;
 copy_expr_onside (params->c_expr, INSN_EXPR (insn));
 track_scheduled_insns_and_blocks (insn);
-insn_emitted = handle_emitting_transformations (insn, expr, params);
+handle_emitting_transformations (insn, expr, params);
-only_disconnect = (params->uid == INSN_UID (insn)
+only_disconnect = params->uid == INSN_UID (insn);
-&& ! insn_emitted  && ! EXPR_WAS_CHANGED (expr));
 /* Mark that we've disconnected an insn.  */
 if (only_disconnect)
 params->uid = -1;
 remove_insn_from_stream (insn, only_disconnect);
 move_op_orig_expr_not_found (insn_t insn, av_set_t orig_ops ATTRIBUTE_UNUSED,
 			    void *static_params)
 {
 moveop_static_params_p sparams = (moveop_static_params_p) static_params;
-#ifdef ENABLE_CHECKING
 sparams->failed_insn = insn;
-#endif
 /* If we're scheduling separate expr, in order to generate correct code
 we need to stop the search at bookkeeping code generated with the
 same destination register or memory.  */
 if (lhs_of_insn_equals_to_dest_p (insn, sparams->dest))
 code_motion_process_successors (insn_t insn, av_set_t orig_ops,
 ilist_t path, void *static_params)
 {
 int res = 0;
 succ_iterator succ_i;
-rtx succ;
+insn_t succ;
 basic_block bb;
 int old_index;
 unsigned old_succs;
 struct cmpd_local_params lparams;
 res = b;
 else if (b == -1 && res != 1)
 res = b;
 /* We have simplified the control flow below this point.  In this case,
-the iterator becomes invalid.  We need to try again.  */
+the iterator becomes invalid.  We need to try again.
+	 If we have removed the insn itself, it could be only an
+	 unconditional jump.  Thus, do not rescan but break immediately --
+	 we have already visited the only successor block.  */
+if (!BLOCK_FOR_INSN (insn))
+	{
+	  if (sched_verbose >= 6)
+	    sel_print ("Not doing rescan: already visited the only successor"
+		       " of block %d\n", old_index);
+	  break;
+	}
 if (BLOCK_FOR_INSN (insn)->index != old_index
 || EDGE_COUNT (bb->succs) != old_succs)
-goto rescan;
+{
-}
+	  if (sched_verbose >= 6)
+	    sel_print ("Rescan: CFG was simplified below insn %d, block %d\n",
-#ifdef ENABLE_CHECKING
+		       INSN_UID (insn), BLOCK_FOR_INSN (insn)->index);
+insn = sel_bb_end (BLOCK_FOR_INSN (insn));
+goto rescan;
+}
+}
 /* Here, RES==1 if original expr was found at least for one of the
 successors.  After the loop, RES may happen to have zero value
 only if at some point the expr searched is present in av_set, but is
 not found below.  In most cases, this situation is an error.
 The exception is when the original operation is blocked by
 bookkeeping generated for another fence or for another path in current
 move_op.  */
-gcc_assert (res == 1
+gcc_checking_assert (res == 1
-	      || (res == 0
+		       || (res == 0
-		  && av_set_could_be_blocked_by_bookkeeping_p (orig_ops,
+			    && av_set_could_be_blocked_by_bookkeeping_p (orig_ops, static_params))
-							       static_params))
+		       || res == -1);
-	      || res == -1);
-#endif
 /* Merge data, clean up, etc.  */
 if (res != -1 && code_motion_path_driver_info->after_merge_succs)
 code_motion_path_driver_info->after_merge_succs (&lparams, static_params);
 if (bitmap_bit_p (code_motion_visited_blocks, bb->index))
 {
 /* We have already found an original operation on this branch, do not
 go any further and just return TRUE here.  If we don't stop here,
-function can have exponential behaviour even on the small code
+function can have exponential behavior even on the small code
 with many different paths (e.g. with data speculation and
 recovery blocks).  */
 if (sched_verbose >= 6)
 sel_print ("Block %d already visited in this traversal\n", bb->index);
 if (code_motion_path_driver_info->on_enter)
 static_params, false);
 orig_ops = av_set_copy (orig_ops);
 /* Filter the orig_ops set.  */
 if (AV_SET_VALID_P (insn))
-av_set_intersect (&orig_ops, AV_SET (insn));
+av_set_code_motion_filter (&orig_ops, AV_SET (insn));
 /* If no more original ops, return immediately.  */
 if (!orig_ops)
 {
 if (sched_verbose >= 6)
 /* Here INSN either points to the insn before the original insn (may be
 bb_note, if original insn was a bb_head) or to the bb_end.  */
 if (!expr)
 {
 int res;
+rtx_insn *last_insn = PREV_INSN (insn);
+bool added_to_path;
 gcc_assert (insn == sel_bb_end (bb));
 /* Add bb tail to PATH (but it doesn't make any sense if it's a bb_head -
 	 it's already in PATH then).  */
 if (insn != first_insn)
-	ilist_add (&path, insn);
+	{
+	  ilist_add (&path, insn);
+	  added_to_path = true;
+	}
+else
+added_to_path = false;
 /* Process_successors should be able to find at least one
 	 successor for which code_motion_path_driver returns TRUE.  */
 res = code_motion_process_successors (insn, orig_ops,
 path, static_params);
+/* Jump in the end of basic block could have been removed or replaced
+during code_motion_process_successors, so recompute insn as the
+last insn in bb.  */
+if (NEXT_INSN (last_insn) != insn)
+{
+insn = sel_bb_end (bb);
+first_insn = sel_bb_head (bb);
+}
 /* Remove bb tail from path.  */
-if (insn != first_insn)
+if (added_to_path)
 	ilist_remove (&path);
 if (res != 1)
 	{
 	  /* This is the case when one of the original expr is no longer available
 /* This should be the very last operation as at bb head we could change
 the numbering by creating bookkeeping blocks.  */
 if (removed_last_insn)
 insn = PREV_INSN (insn);
-bitmap_set_bit (code_motion_visited_blocks, BLOCK_FOR_INSN (insn)->index);
+/* If we have simplified the control flow and removed the first jump insn,
+there's no point in marking this block in the visited blocks bitmap.  */
+if (BLOCK_FOR_INSN (insn))
+bitmap_set_bit (code_motion_visited_blocks, BLOCK_FOR_INSN (insn)->index);
 return true;
 }
 /* Move up the operations from ORIG_OPS set traversing the dag starting
 from INSN.  PATH represents the edges traversed so far.
 move_op (insn_t insn, av_set_t orig_ops, expr_t expr_vliw,
 rtx dest, expr_t c_expr, bool *should_move)
 {
 struct moveop_static_params sparams;
 struct cmpd_local_params lparams;
-bool res;
+int res;
 /* Init params for code_motion_path_driver.  */
 sparams.dest = dest;
 sparams.c_expr = c_expr;
 sparams.uid = INSN_UID (EXPR_INSN_RTX (expr_vliw));
-#ifdef ENABLE_CHECKING
 sparams.failed_insn = NULL;
-#endif
 sparams.was_renamed = false;
 lparams.e1 = NULL;
 /* We haven't visited any blocks yet.  */
 bitmap_clear (code_motion_visited_blocks);
 /* Set appropriate hooks and data.  */
 code_motion_path_driver_info = &move_op_hooks;
 res = code_motion_path_driver (insn, orig_ops, NULL, &lparams, &sparams);
+gcc_assert (res != -1);
 if (sparams.was_renamed)
 EXPR_WAS_RENAMED (expr_vliw) = true;
 *should_move = (sparams.uid == -1);
 Clear visited blocks from BLOCKS_TO_RESCHEDULE.  */
 static void
 init_seqno_1 (basic_block bb, sbitmap visited_bbs, bitmap blocks_to_reschedule)
 {
 int bbi = BLOCK_TO_BB (bb->index);
-insn_t insn, note = bb_note (bb);
+insn_t insn;
 insn_t succ_insn;
 succ_iterator si;
-SET_BIT (visited_bbs, bbi);
+rtx_note *note = bb_note (bb);
+bitmap_set_bit (visited_bbs, bbi);
 if (blocks_to_reschedule)
 bitmap_clear_bit (blocks_to_reschedule, bb->index);
 FOR_EACH_SUCC_1 (succ_insn, si, BB_END (bb),
 		   SUCCS_NORMAL | SUCCS_SKIP_TO_LOOP_EXITS)
 basic_block succ = BLOCK_FOR_INSN (succ_insn);
 int succ_bbi = BLOCK_TO_BB (succ->index);
 gcc_assert (in_current_region_p (succ));
-if (!TEST_BIT (visited_bbs, succ_bbi))
+if (!bitmap_bit_p (visited_bbs, succ_bbi))
 	{
 	  gcc_assert (succ_bbi > bbi);
 	  init_seqno_1 (succ, visited_bbs, blocks_to_reschedule);
 	}
 for (insn = BB_END (bb); insn != note; insn = PREV_INSN (insn))
 INSN_SEQNO (insn) = cur_seqno--;
 }
-/* Initialize seqnos for the current region.  NUMBER_OF_INSNS is the number
+/* Initialize seqnos for the current region.  BLOCKS_TO_RESCHEDULE contains
-of instructions in the region, BLOCKS_TO_RESCHEDULE contains blocks on
+blocks on which we're rescheduling when pipelining, FROM is the block where
-which we're rescheduling when pipelining, FROM is the block where
 traversing region begins (it may not be the head of the region when
 pipelining, but the head of the loop instead).
 Returns the maximal seqno found.  */
 static int
-init_seqno (int number_of_insns, bitmap blocks_to_reschedule, basic_block from)
+init_seqno (bitmap blocks_to_reschedule, basic_block from)
 {
-sbitmap visited_bbs;
 bitmap_iterator bi;
 unsigned bbi;
-visited_bbs = sbitmap_alloc (current_nr_blocks);
+auto_sbitmap visited_bbs (current_nr_blocks);
 if (blocks_to_reschedule)
 {
-sbitmap_ones (visited_bbs);
+bitmap_ones (visited_bbs);
 EXECUTE_IF_SET_IN_BITMAP (blocks_to_reschedule, 0, bbi, bi)
 {
 	  gcc_assert (BLOCK_TO_BB (bbi) < current_nr_blocks);
-RESET_BIT (visited_bbs, BLOCK_TO_BB (bbi));
+bitmap_clear_bit (visited_bbs, BLOCK_TO_BB (bbi));
 	}
 }
 else
 {
-sbitmap_zero (visited_bbs);
+bitmap_clear (visited_bbs);
 from = EBB_FIRST_BB (0);
 }
-cur_seqno = number_of_insns > 0 ? number_of_insns : sched_max_luid - 1;
+cur_seqno = sched_max_luid - 1;
 init_seqno_1 (from, visited_bbs, blocks_to_reschedule);
-gcc_assert (cur_seqno == 0 || number_of_insns == 0);
+/* cur_seqno may be positive if the number of instructions is less than
-sbitmap_free (visited_bbs);
+sched_max_luid - 1 (when rescheduling or if some instructions have been
+removed by the call to purge_empty_blocks in sel_sched_region_1).  */
+gcc_assert (cur_seqno >= 0);
 return sched_max_luid - 1;
 }
 /* Initialize scheduling parameters for current region.  */
 static void
 {
 enable_schedule_as_rhs_p = 1;
 bookkeeping_p = 1;
 pipelining_p = (bookkeeping_p
 && (flag_sel_sched_pipelining != 0)
-		  && current_loop_nest != NULL);
+		  && current_loop_nest != NULL
+		  && loop_has_exit_edges (current_loop_nest));
 max_insns_to_rename = PARAM_VALUE (PARAM_SELSCHED_INSNS_TO_RENAME);
 max_ws = MAX_WS;
 }
 /* Return true if all basic blocks of current region are empty.  */
 static bool
 current_region_empty_p (void)
 {
 int i;
 for (i = 0; i < current_nr_blocks; i++)
-if (! sel_bb_empty_p (BASIC_BLOCK (BB_TO_BLOCK (i))))
+if (! sel_bb_empty_p (BASIC_BLOCK_FOR_FN (cfun, BB_TO_BLOCK (i))))
 return false;
 return true;
 }
 /* Prepare and verify loop nest for pipelining.  */
 static void
-setup_current_loop_nest (int rgn)
+setup_current_loop_nest (int rgn, bb_vec_t *bbs)
 {
 current_loop_nest = get_loop_nest_for_rgn (rgn);
 if (!current_loop_nest)
 return;
 /* If this loop has any saved loop preheaders from nested loops,
 add these basic blocks to the current region.  */
-sel_add_loop_preheaders ();
+sel_add_loop_preheaders (bbs);
 /* Check that we're starting with a valid information.  */
 gcc_assert (loop_latch_edge (current_loop_nest));
 gcc_assert (LOOP_MARKED_FOR_PIPELINING_P (current_loop_nest));
 }
 do region initialization here so the region can be bundled correctly,
 but we'll skip the scheduling in sel_sched_region ().  */
 if (current_region_empty_p ())
 return true;
+bbs.create (current_nr_blocks);
+for (i = 0; i < current_nr_blocks; i++)
+bbs.quick_push (BASIC_BLOCK_FOR_FN (cfun, BB_TO_BLOCK (i)));
+sel_init_bbs (bbs);
 if (flag_sel_sched_pipelining)
-setup_current_loop_nest (rgn);
+setup_current_loop_nest (rgn, &bbs);
 sel_setup_region_sched_flags ();
-bbs = VEC_alloc (basic_block, heap, current_nr_blocks);
-for (i = 0; i < current_nr_blocks; i++)
-VEC_quick_push (basic_block, bbs, BASIC_BLOCK (BB_TO_BLOCK (i)));
-sel_init_bbs (bbs, NULL);
 /* Initialize luids and dependence analysis which both sel-sched and haifa
 need.  */
-sched_init_luids (bbs, NULL, NULL, NULL);
+sched_init_luids (bbs);
 sched_deps_init (false);
 /* Initialize haifa data.  */
 rgn_setup_sched_infos ();
 sel_set_sched_flags ();
-haifa_init_h_i_d (bbs, NULL, NULL, NULL);
+haifa_init_h_i_d (bbs);
 sel_compute_priorities (rgn);
 init_deps_global ();
 /* Main initialization.  */
 sel_setup_sched_infos ();
 sel_init_global_and_expr (bbs);
-VEC_free (basic_block, heap, bbs);
+bbs.release ();
 blocks_to_reschedule = BITMAP_ALLOC (NULL);
 /* Init correct liveness sets on each instruction of a single-block loop.
 This is the only situation when we can't update liveness when calling
 compute_live for the first insn of the loop.  */
 if (current_loop_nest)
 {
-int header = (sel_is_loop_preheader_p (BASIC_BLOCK (BB_TO_BLOCK (0)))
+int header =
-? 1
+	(sel_is_loop_preheader_p (BASIC_BLOCK_FOR_FN (cfun, BB_TO_BLOCK (0)))
-: 0);
+	 ? 1
+	 : 0);
 if (current_nr_blocks == header + 1)
 update_liveness_on_insn
-(sel_bb_head (BASIC_BLOCK (BB_TO_BLOCK (header))));
+(sel_bb_head (BASIC_BLOCK_FOR_FN (cfun, BB_TO_BLOCK (header))));
 }
 /* Set hooks so that no newly generated insn will go out unnoticed.  */
 sel_register_cfg_hooks ();
 {
 int i;
 for (i = 0; i < current_nr_blocks; i++)
 {
-basic_block bb = BASIC_BLOCK (BB_TO_BLOCK (i));
+basic_block bb = BASIC_BLOCK_FOR_FN (cfun, BB_TO_BLOCK (i));
-rtx insn;
+rtx_insn *insn;
 FOR_BB_INSNS (bb, insn)
 	if (INSN_P (insn))
 	  {
 	    expr_t expr = INSN_EXPR (insn);
 this EBB in SCHEDULED_BLOCKS and appropriately filling in HEAD, TAIL,
 PREV_HEAD, and NEXT_TAIL fields of CURRENT_SCHED_INFO structure.  */
 static void
 find_ebb_boundaries (basic_block bb, bitmap scheduled_blocks)
 {
-insn_t head, tail;
+rtx_insn *head, *tail;
 basic_block bb1 = bb;
 if (sched_verbose >= 2)
 sel_print ("Finishing schedule in bbs: ");
 do
 }
 }
 if (real_insn)
 	{
+	  static state_t temp = NULL;
+	  if (!temp)
+	    temp = xmalloc (dfa_state_size);
+	  memcpy (temp, curr_state, dfa_state_size);
 	  cost = state_transition (curr_state, insn);
-	  issued_insns++;
+	  if (memcmp (temp, curr_state, dfa_state_size))
+	    issued_insns++;
 if (sched_verbose >= 2)
 	    {
 	      sel_print ("scheduled insn %d, clock %d\n", INSN_UID (insn),
 			 haifa_clock + 1);
 	{
 	  targetm.sched.finish (sched_dump, sched_verbose);
 	  /* Extend luids so that insns generated by the target will
 	     get zero luid.  */
-	  sched_init_luids (NULL, NULL, NULL, NULL);
+	  sched_extend_luids ();
 	}
 }
 BITMAP_FREE (scheduled_blocks);
 }
 simplify_changed_insns ();
 sched_finish_ready_list ();
 free_nop_pool ();
 /* Free the vectors.  */
-if (vec_av_set)
+vec_av_set.release ();
-VEC_free (expr_t, heap, vec_av_set);
 BITMAP_FREE (current_copies);
 BITMAP_FREE (current_originators);
 BITMAP_FREE (code_motion_visited_blocks);
-vinsn_vec_free (&vec_bookkeeping_blocked_vinsns);
+vinsn_vec_free (vec_bookkeeping_blocked_vinsns);
-vinsn_vec_free (&vec_target_unavailable_vinsns);
+vinsn_vec_free (vec_target_unavailable_vinsns);
 /* If LV_SET of the region head should be updated, do it now because
 there will be no other chance.  */
 {
 succ_iterator si;
 free_nop_vinsn ();
 finish_deps_global ();
 sched_finish_luids ();
+h_d_i_d.release ();
 sel_finish_bbs ();
 BITMAP_FREE (blocks_to_reschedule);
 sel_unregister_cfg_hooks ();
 else if (*max_seqno < seqno)
 *max_seqno = seqno;
 }
 }
-/* Calculate new fences from FENCES.  */
+/* Calculate new fences from FENCES.  Write the current time to PTIME.  */
 static flist_t
-calculate_new_fences (flist_t fences, int orig_max_seqno)
+calculate_new_fences (flist_t fences, int orig_max_seqno, int *ptime)
 {
 flist_t old_fences = fences;
 struct flist_tail_def _new_fences, *new_fences = &_new_fences;
+int max_time = 0;
 flist_tail_init (new_fences);
 for (; fences; fences = FLIST_NEXT (fences))
 {
 fence_t fence = FLIST_FENCE (fences);
 move_fence_to_fences (fences, new_fences);
 }
 }
 else
 extract_new_fences_from (fences, new_fences, orig_max_seqno);
+max_time = MAX (max_time, FENCE_CYCLE (fence));
 }
 flist_clear (&old_fences);
+*ptime = max_time;
 return FLIST_TAIL_HEAD (new_fences);
 }
 /* Update seqnos of insns given by PSCHEDULED_INSNS.  MIN_SEQNO and MAX_SEQNO
 are the miminum and maximum seqnos of the group, HIGHEST_SEQNO_IN_USE is
 of scheduling.  */
 static void
 sel_sched_region_2 (int orig_max_seqno)
 {
 int highest_seqno_in_use = orig_max_seqno;
+int max_time = 0;
 stat_bookkeeping_copies = 0;
 stat_insns_needed_bookkeeping = 0;
 stat_renamed_scheduled = 0;
 stat_substitutions_total = 0;
 ilist_t scheduled_insns = NULL;
 ilist_t *scheduled_insns_tailp = &scheduled_insns;
 find_min_max_seqno (fences, &min_seqno, &max_seqno);
 schedule_on_fences (fences, max_seqno, &scheduled_insns_tailp);
-fences = calculate_new_fences (fences, orig_max_seqno);
+fences = calculate_new_fences (fences, orig_max_seqno, &max_time);
 highest_seqno_in_use = update_seqnos_and_stage (min_seqno, max_seqno,
 highest_seqno_in_use,
 &scheduled_insns);
 }
 if (sched_verbose >= 1)
-sel_print ("Scheduled %d bookkeeping copies, %d insns needed "
+{
-"bookkeeping, %d insns renamed, %d insns substituted\n",
+sel_print ("Total scheduling time: %d cycles\n", max_time);
-stat_bookkeeping_copies,
+sel_print ("Scheduled %d bookkeeping copies, %d insns needed "
-stat_insns_needed_bookkeeping,
+		 "bookkeeping, %d insns renamed, %d insns substituted\n",
-stat_renamed_scheduled,
+		 stat_bookkeeping_copies,
-stat_substitutions_total);
+		 stat_insns_needed_bookkeeping,
+		 stat_renamed_scheduled,
+		 stat_substitutions_total);
+}
 }
 /* Schedule a region.  When pipelining, search for possibly never scheduled
 bookkeeping code and schedule it.  Reschedule pipelined code without
 pipelining after.  */
 static void
 sel_sched_region_1 (void)
 {
-int number_of_insns;
 int orig_max_seqno;
-/* Remove empty blocks that might be in the region from the beginning.
+/* Remove empty blocks that might be in the region from the beginning.  */
-We need to do save sched_max_luid before that, as it actually shows
-the number of insns in the region, and purge_empty_blocks can
-alter it.  */
-number_of_insns = sched_max_luid - 1;
 purge_empty_blocks ();
-orig_max_seqno = init_seqno (number_of_insns, NULL, NULL);
+orig_max_seqno = init_seqno (NULL, NULL);
 gcc_assert (orig_max_seqno >= 1);
 /* When pipelining outer loops, create fences on the loop header,
 not preheader.  */
 fences = NULL;
 if (bitmap_bit_p (blocks_to_reschedule, bb->index))
 {
 flist_tail_init (new_fences);
-orig_max_seqno = init_seqno (0, blocks_to_reschedule, bb);
+orig_max_seqno = init_seqno (blocks_to_reschedule, bb);
 /* Mark BB as head of the new ebb.  */
 bitmap_set_bit (forced_ebb_heads, bb->index);
 gcc_assert (fences == NULL);
 void
 run_selective_scheduling (void)
 {
 int rgn;
-if (n_basic_blocks == NUM_FIXED_BLOCKS)
+if (n_basic_blocks_for_fn (cfun) == NUM_FIXED_BLOCKS)
 return;
 sel_global_init ();
 for (rgn = 0; rgn < nr_regions; rgn++)

Mercurial > hg > CbC > CbC_gcc

comparison gcc/sel-sched.c @ 111:04ced10e8804