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comparison gcc/config/s390/constraints.md @ 145:1830386684a0

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gcc-9.2.0
author anatofuz
date Thu, 13 Feb 2020 11:34:05 +0900
parents 84e7813d76e9
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131:84e7813d76e9 145:1830386684a0
1 ;; Constraints definitions belonging to the gcc backend for IBM S/390. 1 ;; Constraints definitions belonging to the gcc backend for IBM S/390.
2 ;; Copyright (C) 2006-2018 Free Software Foundation, Inc. 2 ;; Copyright (C) 2006-2020 Free Software Foundation, Inc.
3 ;; Written by Wolfgang Gellerich, using code and information found in 3 ;; Written by Wolfgang Gellerich, using code and information found in
4 ;; files s390.md, s390.h, and s390.c. 4 ;; files s390.md, s390.h, and s390.c.
5 ;; 5 ;;
6 ;; This file is part of GCC. 6 ;; This file is part of GCC.
7 ;; 7 ;;
35 ;; jxx: contiguous bitmask of 0 or 1 in all vector elements 35 ;; jxx: contiguous bitmask of 0 or 1 in all vector elements
36 ;; jyy: constant consisting of byte chunks being either 0 or 0xff 36 ;; jyy: constant consisting of byte chunks being either 0 or 0xff
37 ;; jKK: constant vector with all elements having the same value and 37 ;; jKK: constant vector with all elements having the same value and
38 ;; matching K constraint 38 ;; matching K constraint
39 ;; jm6: An integer operand with the lowest order 6 bits all ones. 39 ;; jm6: An integer operand with the lowest order 6 bits all ones.
40 ;; jdd: A constant operand that fits into the data section.
40 ;; t -- Access registers 36 and 37. 41 ;; t -- Access registers 36 and 37.
41 ;; v -- Vector registers v0-v31. 42 ;; v -- Vector registers v0-v31.
42 ;; C -- A signed 8-bit constant (-128..127) 43 ;; C -- A signed 8-bit constant (-128..127)
43 ;; D -- An unsigned 16-bit constant (0..65535) 44 ;; D -- An unsigned 16-bit constant (0..65535)
44 ;; G -- Const double zero operand 45 ;; G -- Const double zero operand
87 ;; Y -- Address style operand without index. 88 ;; Y -- Address style operand without index.
88 ;; ZQ -- Pointer without index register and with short displacement. 89 ;; ZQ -- Pointer without index register and with short displacement.
89 ;; ZR -- Pointer with index register and short displacement. 90 ;; ZR -- Pointer with index register and short displacement.
90 ;; ZS -- Pointer without index register but with long displacement. 91 ;; ZS -- Pointer without index register but with long displacement.
91 ;; ZT -- Pointer with index register and long displacement. 92 ;; ZT -- Pointer with index register and long displacement.
93 ;; ZL -- LARL operand when in 64-bit mode, otherwise nothing.
92 ;; 94 ;;
93 ;; 95 ;;
94 96
95 97
96 ;; 98 ;;
198 200
199 ;; Simply check for base + offset style operands. Reload will take 201 ;; Simply check for base + offset style operands. Reload will take
200 ;; care of making sure we have a proper base register. 202 ;; care of making sure we have a proper base register.
201 203
202 (match_test "s390_decompose_addrstyle_without_index (op, NULL, NULL)" )) 204 (match_test "s390_decompose_addrstyle_without_index (op, NULL, NULL)" ))
205
206
207 ;; Shift count operands are not necessarily legitimate addresses
208 ;; but the predicate shift_count_operand will only allow
209 ;; proper operands. If reload/lra need to change e.g. a spilled register
210 ;; they can still do so via the special handling of address constraints.
211 ;; To avoid further reloading (caused by a non-matching constraint) we
212 ;; always return true here as the predicate's checks are already sufficient.
213
214 (define_address_constraint "jsc"
215 "Address style operand used as shift count."
216 (match_test "true" ))
203 217
204 218
205 ;; N -- Multiple letter constraint followed by 4 parameter letters. 219 ;; N -- Multiple letter constraint followed by 4 parameter letters.
206 ;; 0..9,x: number of the part counting from most to least significant 220 ;; 0..9,x: number of the part counting from most to least significant
207 ;; S,H,Q: mode of the part 221 ;; S,H,Q: mode of the part
560 (match_test "s390_mem_constraint (\"ZS\", op)")) 574 (match_test "s390_mem_constraint (\"ZS\", op)"))
561 575
562 (define_address_constraint "ZT" 576 (define_address_constraint "ZT"
563 "Pointer with index register and long displacement." 577 "Pointer with index register and long displacement."
564 (match_test "s390_mem_constraint (\"ZT\", op)")) 578 (match_test "s390_mem_constraint (\"ZT\", op)"))
579
580 (define_constraint "ZL"
581 "LARL operand when in 64-bit mode, otherwise nothing."
582 (match_test "TARGET_64BIT && larl_operand (op, VOIDmode)"))
583
584 ;; This constraint must behave like "i", in particular, the matching values
585 ;; must never be placed into registers or memory by
586 ;; cfgexpand.c:expand_asm_stmt. It could be straightforward to start its name
587 ;; with a letter from genpreds.c:const_int_constraints, however it would
588 ;; require using (match_code "const_int"), which is infeasible. To achieve the
589 ;; same effect, that is, setting maybe_allows_reg and maybe_allows_mem to false
590 ;; in genpreds.c:add_constraint, we explicitly exclude reg, subreg and mem
591 ;; codes.
592 (define_constraint "jdd"
593 "A constant operand that fits into the data section.
594 Usage of this constraint might produce a relocation."
595 (and (not (match_code "reg"))
596 (not (match_code "subreg"))
597 (not (match_code "mem"))
598 (match_test "CONSTANT_P (op)")))