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comparison gcc/config/sparc/sparc.md @ 145:1830386684a0

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gcc-9.2.0
author anatofuz
date Thu, 13 Feb 2020 11:34:05 +0900
parents 84e7813d76e9
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131:84e7813d76e9 145:1830386684a0
1 ;; Machine description for SPARC. 1 ;; Machine description for SPARC.
2 ;; Copyright (C) 1987-2018 Free Software Foundation, Inc. 2 ;; Copyright (C) 1987-2020 Free Software Foundation, Inc.
3 ;; Contributed by Michael Tiemann (tiemann@cygnus.com) 3 ;; Contributed by Michael Tiemann (tiemann@cygnus.com)
4 ;; 64-bit SPARC-V9 support by Michael Tiemann, Jim Wilson, and Doug Evans, 4 ;; 64-bit SPARC-V9 support by Michael Tiemann, Jim Wilson, and Doug Evans,
5 ;; at Cygnus Support. 5 ;; at Cygnus Support.
6 6
7 ;; This file is part of GCC. 7 ;; This file is part of GCC.
102 UNSPEC_FPCMPURSHL 102 UNSPEC_FPCMPURSHL
103 ]) 103 ])
104 104
105 (define_c_enum "unspecv" [ 105 (define_c_enum "unspecv" [
106 UNSPECV_BLOCKAGE 106 UNSPECV_BLOCKAGE
107
108 UNSPECV_SPECULATION_BARRIER
109
107 UNSPECV_PROBE_STACK_RANGE 110 UNSPECV_PROBE_STACK_RANGE
108 111
109 UNSPECV_FLUSHW 112 UNSPECV_FLUSHW
110 UNSPECV_SAVEW 113 UNSPECV_SAVEW
111 114
219 ;; is a bit of a misnomer as it covers all 64 fp regs. The corresponding 222 ;; is a bit of a misnomer as it covers all 64 fp regs. The corresponding
220 ;; constraint letter is 'e'. To avoid any confusion, 'e' is used instead of 223 ;; constraint letter is 'e'. To avoid any confusion, 'e' is used instead of
221 ;; 'f' for all DF/TFmode values, including those that are specific to the v8. 224 ;; 'f' for all DF/TFmode values, including those that are specific to the v8.
222 225
223 ;; Attribute for cpu type. 226 ;; Attribute for cpu type.
224 ;; These must match the values of the enum processor_type in sparc-opts.h. 227 ;; These must match the values of enum sparc_processor_type in sparc-opts.h.
225 (define_attr "cpu" 228 (define_attr "cpu"
226 "v7, 229 "v7,
227 cypress, 230 cypress,
228 v8, 231 v8,
229 supersparc, 232 supersparc,
1599 (match_operand:P 3 "const_int_operand" "")] 1602 (match_operand:P 3 "const_int_operand" "")]
1600 UNSPEC_LOAD_PCREL_SYM)) 1603 UNSPEC_LOAD_PCREL_SYM))
1601 (clobber (reg:P O7_REG))] 1604 (clobber (reg:P O7_REG))]
1602 "REGNO (operands[0]) == INTVAL (operands[3])" 1605 "REGNO (operands[0]) == INTVAL (operands[3])"
1603 { 1606 {
1604 if (flag_delayed_branch) 1607 return output_load_pcrel_sym (operands);
1605 return "sethi\t%%hi(%a1-4), %0\n\tcall\t%a2\n\t add\t%0, %%lo(%a1+4), %0";
1606 else
1607 return "sethi\t%%hi(%a1-8), %0\n\tadd\t%0, %%lo(%a1-4), %0\n\tcall\t%a2\n\t nop";
1608 } 1608 }
1609 [(set (attr "type") (const_string "multi")) 1609 [(set (attr "type") (const_string "multi"))
1610 (set (attr "length") 1610 (set (attr "length")
1611 (if_then_else (eq_attr "delayed_branch" "true") 1611 (if_then_else (eq_attr "delayed_branch" "true")
1612 (const_int 3) 1612 (const_int 3)
1676 if (sparc_expand_move (SImode, operands)) 1676 if (sparc_expand_move (SImode, operands))
1677 DONE; 1677 DONE;
1678 }) 1678 })
1679 1679
1680 (define_insn "*movsi_insn" 1680 (define_insn "*movsi_insn"
1681 [(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r, m, r,*f,*f,*f, m,d,d") 1681 [(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r, m, r,*f,?*f,?*f, m,d,d")
1682 (match_operand:SI 1 "input_operand" "rI,K,m,rJ,*f, r, f, m,*f,J,P"))] 1682 (match_operand:SI 1 "input_operand" "rI,K,m,rJ,*f, r, f, m,?*f,J,P"))]
1683 "register_operand (operands[0], SImode) 1683 "register_operand (operands[0], SImode)
1684 || register_or_zero_or_all_ones_operand (operands[1], SImode)" 1684 || register_or_zero_or_all_ones_operand (operands[1], SImode)"
1685 "@ 1685 "@
1686 mov\t%1, %0 1686 mov\t%1, %0
1687 sethi\t%%hi(%a1), %0 1687 sethi\t%%hi(%a1), %0
1834 ;; (reg:DI 2 %g2)) 1834 ;; (reg:DI 2 %g2))
1835 ;; 1835 ;;
1836 1836
1837 (define_insn "*movdi_insn_sp32" 1837 (define_insn "*movdi_insn_sp32"
1838 [(set (match_operand:DI 0 "nonimmediate_operand" 1838 [(set (match_operand:DI 0 "nonimmediate_operand"
1839 "=T,o,U,T,r,o,r,r,?*f,?T,?*f,?o,?*e,?*e, r,?*f,?*e,?T,*b,*b") 1839 "=T,o,U,T,r,o,r,r,?*f, T,?*f, o,?*e,?*e, r,?*f,?*e, T,*b,*b")
1840 (match_operand:DI 1 "input_operand" 1840 (match_operand:DI 1 "input_operand"
1841 " J,J,T,U,o,r,i,r, T,*f, o,*f, *e, *e,?*f, r, T,*e, J, P"))] 1841 " J,J,T,U,o,r,i,r, T,?*f, o,?*f, *e, *e,?*f, r, T,?*e, J, P"))]
1842 "TARGET_ARCH32 1842 "TARGET_ARCH32
1843 && (register_operand (operands[0], DImode) 1843 && (register_operand (operands[0], DImode)
1844 || register_or_zero_operand (operands[1], DImode))" 1844 || register_or_zero_operand (operands[1], DImode))"
1845 "@ 1845 "@
1846 stx\t%r1, %0 1846 stx\t%r1, %0
1870 (set_attr "fptype" "*,*,*,*,*,*,*,*,*,*,*,*,double,*,*,*,*,*,double,double") 1870 (set_attr "fptype" "*,*,*,*,*,*,*,*,*,*,*,*,double,*,*,*,*,*,double,double")
1871 (set_attr "cpu_feature" "v9,*,*,*,*,*,*,*,fpu,fpu,fpu,fpu,v9,fpunotv9,vis3,vis3,fpu,fpu,vis,vis") 1871 (set_attr "cpu_feature" "v9,*,*,*,*,*,*,*,fpu,fpu,fpu,fpu,v9,fpunotv9,vis3,vis3,fpu,fpu,vis,vis")
1872 (set_attr "lra" "*,*,disabled,disabled,*,*,*,*,*,*,*,*,*,*,*,*,*,*,*,*")]) 1872 (set_attr "lra" "*,*,disabled,disabled,*,*,*,*,*,*,*,*,*,*,*,*,*,*,*,*")])
1873 1873
1874 (define_insn "*movdi_insn_sp64" 1874 (define_insn "*movdi_insn_sp64"
1875 [(set (match_operand:DI 0 "nonimmediate_operand" "=r,r,r, m, r,*e,?*e,?*e,?W,b,b") 1875 [(set (match_operand:DI 0 "nonimmediate_operand" "=r,r,r, m, r,*e,?*e,?*e, W,b,b")
1876 (match_operand:DI 1 "input_operand" "rI,N,m,rJ,*e, r, *e, W,*e,J,P"))] 1876 (match_operand:DI 1 "input_operand" "rI,N,m,rJ,*e, r, *e, W,?*e,J,P"))]
1877 "TARGET_ARCH64 1877 "TARGET_ARCH64
1878 && (register_operand (operands[0], DImode) 1878 && (register_operand (operands[0], DImode)
1879 || register_or_zero_or_all_ones_operand (operands[1], DImode))" 1879 || register_or_zero_or_all_ones_operand (operands[1], DImode))"
1880 "@ 1880 "@
1881 mov\t%1, %0 1881 mov\t%1, %0
6837 tmp = gen_rtx_PLUS (Pmode, tmp2, tmp); 6837 tmp = gen_rtx_PLUS (Pmode, tmp2, tmp);
6838 operands[0] = memory_address (Pmode, tmp); 6838 operands[0] = memory_address (Pmode, tmp);
6839 } 6839 }
6840 }) 6840 })
6841 6841
6842 (define_insn "*tablejump_sp32" 6842 (define_insn "*tablejump<P:mode>"
6843 [(set (pc) (match_operand:SI 0 "address_operand" "p")) 6843 [(set (pc) (match_operand:P 0 "address_operand" "p"))
6844 (use (label_ref (match_operand 1 "" "")))] 6844 (use (label_ref (match_operand 1 "" "")))]
6845 "TARGET_ARCH32" 6845 ""
6846 "jmp\t%a0%#"
6847 [(set_attr "type" "uncond_branch")])
6848
6849 (define_insn "*tablejump_sp64"
6850 [(set (pc) (match_operand:DI 0 "address_operand" "p"))
6851 (use (label_ref (match_operand 1 "" "")))]
6852 "TARGET_ARCH64"
6853 "jmp\t%a0%#" 6846 "jmp\t%a0%#"
6854 [(set_attr "type" "uncond_branch")]) 6847 [(set_attr "type" "uncond_branch")])
6855 6848
6856 6849
6857 ;; Jump to subroutine instructions. 6850 ;; Jump to subroutine instructions.
6924 }) 6917 })
6925 6918
6926 ;; We can't use the same pattern for these two insns, because then registers 6919 ;; We can't use the same pattern for these two insns, because then registers
6927 ;; in the address may not be properly reloaded. 6920 ;; in the address may not be properly reloaded.
6928 6921
6929 (define_insn "*call_address_sp32" 6922 (define_insn "*call_address<P:mode>"
6930 [(call (mem:SI (match_operand:SI 0 "address_operand" "p")) 6923 [(call (mem:P (match_operand:P 0 "address_operand" "p"))
6931 (match_operand 1 "" "")) 6924 (match_operand 1 "" ""))
6932 (clobber (reg:SI O7_REG))] 6925 (clobber (reg:P O7_REG))]
6933 ;;- Do not use operand 1 for most machines. 6926 ;;- Do not use operand 1 for most machines.
6934 "TARGET_ARCH32" 6927 ""
6935 "call\t%a0, %1%#" 6928 "call\t%a0, %1%#"
6936 [(set_attr "type" "call")]) 6929 [(set_attr "type" "call")])
6937 6930
6938 (define_insn "*call_symbolic_sp32" 6931 (define_insn "*call_symbolic<P:mode>"
6939 [(call (mem:SI (match_operand:SI 0 "symbolic_operand" "s")) 6932 [(call (mem:P (match_operand:P 0 "symbolic_operand" "s"))
6940 (match_operand 1 "" "")) 6933 (match_operand 1 "" ""))
6941 (clobber (reg:SI O7_REG))] 6934 (clobber (reg:P O7_REG))]
6942 ;;- Do not use operand 1 for most machines. 6935 ;;- Do not use operand 1 for most machines.
6943 "TARGET_ARCH32" 6936 ""
6944 "call\t%a0, %1%#"
6945 [(set_attr "type" "call")])
6946
6947 (define_insn "*call_address_sp64"
6948 [(call (mem:DI (match_operand:DI 0 "address_operand" "p"))
6949 (match_operand 1 "" ""))
6950 (clobber (reg:DI O7_REG))]
6951 ;;- Do not use operand 1 for most machines.
6952 "TARGET_ARCH64"
6953 "call\t%a0, %1%#"
6954 [(set_attr "type" "call")])
6955
6956 (define_insn "*call_symbolic_sp64"
6957 [(call (mem:DI (match_operand:DI 0 "symbolic_operand" "s"))
6958 (match_operand 1 "" ""))
6959 (clobber (reg:DI O7_REG))]
6960 ;;- Do not use operand 1 for most machines.
6961 "TARGET_ARCH64"
6962 "call\t%a0, %1%#" 6937 "call\t%a0, %1%#"
6963 [(set_attr "type" "call")]) 6938 [(set_attr "type" "call")])
6964 6939
6965 ;; This is a call that wants a structure value. 6940 ;; This is a call that wants a structure value.
6966 ;; There is no such critter for v9 (??? we may need one anyway). 6941 ;; There is no such critter for v9 (??? we may need one anyway).
7021 (set_attr "length" "3")]) 6996 (set_attr "length" "3")])
7022 6997
7023 (define_expand "call_value" 6998 (define_expand "call_value"
7024 ;; Note that this expression is not used for generating RTL. 6999 ;; Note that this expression is not used for generating RTL.
7025 ;; All the RTL is generated explicitly below. 7000 ;; All the RTL is generated explicitly below.
7026 [(set (match_operand 0 "register_operand" "=rf") 7001 [(set (match_operand 0 "register_operand" "")
7027 (call (match_operand 1 "" "") 7002 (call (match_operand 1 "call_operand" "")
7028 (match_operand 4 "" "")))] 7003 (match_operand 4 "" "")))]
7029 ;; operand 2 is stack_size_rtx 7004 ;; operand 2 is stack_size_rtx
7030 ;; operand 3 is next_arg_register 7005 ;; operand 3 is next_arg_register
7031 "" 7006 ""
7032 { 7007 {
7045 sparc_emit_call_insn (gen_rtx_PARALLEL (VOIDmode, vec), XEXP (fn_rtx, 0)); 7020 sparc_emit_call_insn (gen_rtx_PARALLEL (VOIDmode, vec), XEXP (fn_rtx, 0));
7046 7021
7047 DONE; 7022 DONE;
7048 }) 7023 })
7049 7024
7050 (define_insn "*call_value_address_sp32" 7025 (define_insn "*call_value_address<P:mode>"
7051 [(set (match_operand 0 "" "=rf") 7026 [(set (match_operand 0 "" "")
7052 (call (mem:SI (match_operand:SI 1 "address_operand" "p")) 7027 (call (mem:P (match_operand:P 1 "address_operand" "p"))
7053 (match_operand 2 "" ""))) 7028 (match_operand 2 "" "")))
7054 (clobber (reg:SI O7_REG))] 7029 (clobber (reg:P O7_REG))]
7055 ;;- Do not use operand 2 for most machines. 7030 ;;- Do not use operand 2 for most machines.
7056 "TARGET_ARCH32" 7031 ""
7057 "call\t%a1, %2%#" 7032 "call\t%a1, %2%#"
7058 [(set_attr "type" "call")]) 7033 [(set_attr "type" "call")])
7059 7034
7060 (define_insn "*call_value_symbolic_sp32" 7035 (define_insn "*call_value_symbolic<P:mode>"
7061 [(set (match_operand 0 "" "=rf") 7036 [(set (match_operand 0 "" "")
7062 (call (mem:SI (match_operand:SI 1 "symbolic_operand" "s")) 7037 (call (mem:P (match_operand:P 1 "symbolic_operand" "s"))
7063 (match_operand 2 "" ""))) 7038 (match_operand 2 "" "")))
7064 (clobber (reg:SI O7_REG))] 7039 (clobber (reg:P O7_REG))]
7065 ;;- Do not use operand 2 for most machines. 7040 ;;- Do not use operand 2 for most machines.
7066 "TARGET_ARCH32" 7041 ""
7067 "call\t%a1, %2%#"
7068 [(set_attr "type" "call")])
7069
7070 (define_insn "*call_value_address_sp64"
7071 [(set (match_operand 0 "" "")
7072 (call (mem:DI (match_operand:DI 1 "address_operand" "p"))
7073 (match_operand 2 "" "")))
7074 (clobber (reg:DI O7_REG))]
7075 ;;- Do not use operand 2 for most machines.
7076 "TARGET_ARCH64"
7077 "call\t%a1, %2%#"
7078 [(set_attr "type" "call")])
7079
7080 (define_insn "*call_value_symbolic_sp64"
7081 [(set (match_operand 0 "" "")
7082 (call (mem:DI (match_operand:DI 1 "symbolic_operand" "s"))
7083 (match_operand 2 "" "")))
7084 (clobber (reg:DI O7_REG))]
7085 ;;- Do not use operand 2 for most machines.
7086 "TARGET_ARCH64"
7087 "call\t%a1, %2%#" 7042 "call\t%a1, %2%#"
7088 [(set_attr "type" "call")]) 7043 [(set_attr "type" "call")])
7089 7044
7090 (define_expand "untyped_call" 7045 (define_expand "untyped_call"
7091 [(parallel [(call (match_operand 0 "" "") 7046 [(parallel [(call (match_operand 0 "" "")
7126 [(parallel [(call (match_operand 0 "call_operand" "") (const_int 0)) 7081 [(parallel [(call (match_operand 0 "call_operand" "") (const_int 0))
7127 (return)])] 7082 (return)])]
7128 "" 7083 ""
7129 "") 7084 "")
7130 7085
7131 (define_insn "*sibcall_symbolic_sp32" 7086 (define_insn "*sibcall_symbolic<P:mode>"
7132 [(call (mem:SI (match_operand:SI 0 "symbolic_operand" "s")) 7087 [(call (mem:P (match_operand:P 0 "symbolic_operand" "s"))
7133 (match_operand 1 "" "")) 7088 (match_operand 1 "" ""))
7134 (return)] 7089 (return)]
7135 "TARGET_ARCH32" 7090 ""
7136 { 7091 {
7137 return output_sibcall(insn, operands[0]); 7092 return output_sibcall (insn, operands[0]);
7138 } 7093 }
7139 [(set_attr "type" "sibcall")]) 7094 [(set_attr "type" "sibcall")])
7140 7095
7141 (define_insn "*sibcall_symbolic_sp64"
7142 [(call (mem:DI (match_operand:DI 0 "symbolic_operand" "s"))
7143 (match_operand 1 "" ""))
7144 (return)]
7145 "TARGET_ARCH64"
7146 {
7147 return output_sibcall(insn, operands[0]);
7148 }
7149 [(set_attr "type" "sibcall")])
7150
7151 (define_expand "sibcall_value" 7096 (define_expand "sibcall_value"
7152 [(parallel [(set (match_operand 0 "register_operand" "=rf") 7097 [(parallel [(set (match_operand 0 "register_operand")
7153 (call (match_operand 1 "" "") (const_int 0))) 7098 (call (match_operand 1 "call_operand" "") (const_int 0)))
7154 (return)])] 7099 (return)])]
7155 "" 7100 ""
7156 "") 7101 "")
7157 7102
7158 (define_insn "*sibcall_value_symbolic_sp32" 7103 (define_insn "*sibcall_value_symbolic<P:mode>"
7159 [(set (match_operand 0 "" "=rf") 7104 [(set (match_operand 0 "" "")
7160 (call (mem:SI (match_operand:SI 1 "symbolic_operand" "s")) 7105 (call (mem:P (match_operand:P 1 "symbolic_operand" "s"))
7161 (match_operand 2 "" ""))) 7106 (match_operand 2 "" "")))
7162 (return)] 7107 (return)]
7163 "TARGET_ARCH32" 7108 ""
7164 { 7109 {
7165 return output_sibcall(insn, operands[1]); 7110 return output_sibcall (insn, operands[1]);
7166 }
7167 [(set_attr "type" "sibcall")])
7168
7169 (define_insn "*sibcall_value_symbolic_sp64"
7170 [(set (match_operand 0 "" "")
7171 (call (mem:DI (match_operand:DI 1 "symbolic_operand" "s"))
7172 (match_operand 2 "" "")))
7173 (return)]
7174 "TARGET_ARCH64"
7175 {
7176 return output_sibcall(insn, operands[1]);
7177 } 7111 }
7178 [(set_attr "type" "sibcall")]) 7112 [(set_attr "type" "sibcall")])
7179 7113
7180 7114
7181 ;; Special instructions. 7115 ;; Special instructions.
7193 7127
7194 ;; The "register window save" insn is modelled as follows. The dwarf2 7128 ;; The "register window save" insn is modelled as follows. The dwarf2
7195 ;; information is manually added in emit_window_save. 7129 ;; information is manually added in emit_window_save.
7196 7130
7197 (define_insn "window_save" 7131 (define_insn "window_save"
7198 [(unspec_volatile 7132 [(unspec_volatile [(match_operand 0 "arith_operand" "rI")] UNSPECV_SAVEW)]
7199 [(match_operand 0 "arith_operand" "rI")]
7200 UNSPECV_SAVEW)]
7201 "!TARGET_FLAT" 7133 "!TARGET_FLAT"
7202 "save\t%%sp, %0, %%sp" 7134 "save\t%%sp, %0, %%sp"
7203 [(set_attr "type" "savew")]) 7135 [(set_attr "type" "savew")])
7204 7136
7205 (define_expand "epilogue" 7137 (define_expand "epilogue"
7307 (unspec:BLK [(match_operand:P 1 "" "")] UNSPEC_FRAME_BLOCKAGE))] 7239 (unspec:BLK [(match_operand:P 1 "" "")] UNSPEC_FRAME_BLOCKAGE))]
7308 "" 7240 ""
7309 "" 7241 ""
7310 [(set_attr "length" "0")]) 7242 [(set_attr "length" "0")])
7311 7243
7244 ;; We use membar #Sync for the speculation barrier on V9.
7245
7246 (define_insn "speculation_barrier"
7247 [(unspec_volatile [(const_int 0)] UNSPECV_SPECULATION_BARRIER)]
7248 "TARGET_V9"
7249 "membar\t64"
7250 [(set_attr "type" "multi")])
7251
7312 (define_expand "probe_stack" 7252 (define_expand "probe_stack"
7313 [(set (match_operand 0 "memory_operand" "") (const_int 0))] 7253 [(set (match_operand 0 "memory_operand" "") (const_int 0))]
7314 "" 7254 ""
7315 { 7255 {
7316 operands[0] 7256 operands[0]
7403 (define_expand "indirect_jump" 7343 (define_expand "indirect_jump"
7404 [(set (pc) (match_operand 0 "address_operand" "p"))] 7344 [(set (pc) (match_operand 0 "address_operand" "p"))]
7405 "" 7345 ""
7406 "") 7346 "")
7407 7347
7408 (define_insn "*branch_sp32" 7348 (define_insn "*branch<P:mode>"
7409 [(set (pc) (match_operand:SI 0 "address_operand" "p"))] 7349 [(set (pc) (match_operand:P 0 "address_operand" "p"))]
7410 "TARGET_ARCH32" 7350 ""
7411 "jmp\t%a0%#" 7351 "jmp\t%a0%#"
7412 [(set_attr "type" "uncond_branch")]) 7352 [(set_attr "type" "uncond_branch")])
7413 7353
7414 (define_insn "*branch_sp64"
7415 [(set (pc) (match_operand:DI 0 "address_operand" "p"))]
7416 "TARGET_ARCH64"
7417 "jmp\t%a0%#"
7418 [(set_attr "type" "uncond_branch")])
7419
7420 (define_expand "save_stack_nonlocal" 7354 (define_expand "save_stack_nonlocal"
7421 [(set (match_operand 0 "memory_operand" "") 7355 [(set (match_operand 0 "memory_operand" "")
7422 (match_operand 1 "register_operand" "")) 7356 (match_operand 1 "register_operand" ""))
7423 (set (match_dup 2) (match_dup 3))] 7357 (set (match_dup 2) (match_dup 3))]
7424 "" 7358 ""
7442 (match_operand 2 "memory_operand" "") 7376 (match_operand 2 "memory_operand" "")
7443 (match_operand 3 "memory_operand" "")] 7377 (match_operand 3 "memory_operand" "")]
7444 "" 7378 ""
7445 { 7379 {
7446 rtx i7 = gen_rtx_REG (Pmode, RETURN_ADDR_REGNUM); 7380 rtx i7 = gen_rtx_REG (Pmode, RETURN_ADDR_REGNUM);
7447 rtx r_label = copy_to_reg (operands[1]); 7381 rtx r_label = operands[1];
7448 rtx r_sp = adjust_address (operands[2], Pmode, 0); 7382 rtx r_sp = adjust_address (operands[2], Pmode, 0);
7449 rtx r_fp = operands[3]; 7383 rtx r_fp = operands[3];
7450 rtx r_i7 = adjust_address (operands[2], Pmode, GET_MODE_SIZE (Pmode)); 7384 rtx r_i7 = adjust_address (operands[2], Pmode, GET_MODE_SIZE (Pmode));
7451 7385
7452 /* We need to flush all the register windows so that their contents will 7386 /* We need to flush all the register windows so that their contents will
7455 emit_insn (gen_flush_register_windows ()); 7389 emit_insn (gen_flush_register_windows ());
7456 7390
7457 emit_clobber (gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (VOIDmode))); 7391 emit_clobber (gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (VOIDmode)));
7458 emit_clobber (gen_rtx_MEM (BLKmode, hard_frame_pointer_rtx)); 7392 emit_clobber (gen_rtx_MEM (BLKmode, hard_frame_pointer_rtx));
7459 7393
7460 /* Restore frame pointer for containing function. */ 7394 r_label = copy_to_reg (r_label);
7395
7396 /* Restore the frame pointer and stack pointer. We must use a
7397 temporary since the setjmp buffer may be a local. */
7398 r_fp = copy_to_reg (r_fp);
7399 emit_stack_restore (SAVE_NONLOCAL, r_sp);
7400 r_i7 = copy_to_reg (r_i7);
7401
7402 /* Ensure the frame pointer move is not optimized. */
7403 emit_insn (gen_blockage ());
7404 emit_clobber (hard_frame_pointer_rtx);
7461 emit_move_insn (hard_frame_pointer_rtx, r_fp); 7405 emit_move_insn (hard_frame_pointer_rtx, r_fp);
7462 emit_stack_restore (SAVE_NONLOCAL, r_sp);
7463 emit_move_insn (i7, r_i7); 7406 emit_move_insn (i7, r_i7);
7464 7407
7465 /* USE of hard_frame_pointer_rtx added for consistency; 7408 /* USE of hard_frame_pointer_rtx added for consistency;
7466 not clear if really needed. */ 7409 not clear if really needed. */
7467 emit_use (hard_frame_pointer_rtx); 7410 emit_use (hard_frame_pointer_rtx);
7468 emit_use (stack_pointer_rtx); 7411 emit_use (stack_pointer_rtx);
7469 emit_use (i7); 7412 emit_use (i7);
7470 7413
7471 emit_jump_insn (gen_indirect_jump (r_label)); 7414 emit_indirect_jump (r_label);
7472 emit_barrier ();
7473 DONE; 7415 DONE;
7474 }) 7416 })
7475 7417
7476 (define_expand "builtin_setjmp_receiver" 7418 (define_expand "builtin_setjmp_receiver"
7477 [(label_ref (match_operand 0 "" ""))] 7419 [(label_ref (match_operand 0 "" ""))]
7958 [(set_attr "type" "trap")]) 7900 [(set_attr "type" "trap")])
7959 7901
7960 7902
7961 ;; TLS support instructions. 7903 ;; TLS support instructions.
7962 7904
7963 (define_insn "tgd_hi22" 7905 (define_insn "tgd_hi22<P:mode>"
7964 [(set (match_operand:SI 0 "register_operand" "=r") 7906 [(set (match_operand:P 0 "register_operand" "=r")
7965 (high:SI (unspec:SI [(match_operand 1 "tgd_symbolic_operand" "")] 7907 (high:P (unspec:P [(match_operand 1 "tgd_symbolic_operand" "")]
7908 UNSPEC_TLSGD)))]
7909 "TARGET_TLS"
7910 "sethi\\t%%tgd_hi22(%a1), %0")
7911
7912 (define_insn "tgd_lo10<P:mode>"
7913 [(set (match_operand:P 0 "register_operand" "=r")
7914 (lo_sum:P (match_operand:P 1 "register_operand" "r")
7915 (unspec:P [(match_operand 2 "tgd_symbolic_operand" "")]
7966 UNSPEC_TLSGD)))] 7916 UNSPEC_TLSGD)))]
7967 "TARGET_TLS" 7917 "TARGET_TLS"
7968 "sethi\\t%%tgd_hi22(%a1), %0") 7918 "add\\t%1, %%tgd_lo10(%a2), %0")
7969 7919
7970 (define_insn "tgd_lo10" 7920 (define_insn "tgd_add<P:mode>"
7971 [(set (match_operand:SI 0 "register_operand" "=r") 7921 [(set (match_operand:P 0 "register_operand" "=r")
7972 (lo_sum:SI (match_operand:SI 1 "register_operand" "r") 7922 (plus:P (match_operand:P 1 "register_operand" "r")
7973 (unspec:SI [(match_operand 2 "tgd_symbolic_operand" "")] 7923 (unspec:P [(match_operand:P 2 "register_operand" "r")
7974 UNSPEC_TLSGD)))] 7924 (match_operand 3 "tgd_symbolic_operand" "")]
7925 UNSPEC_TLSGD)))]
7975 "TARGET_TLS" 7926 "TARGET_TLS"
7976 "add\\t%1, %%tgd_lo10(%a2), %0")
7977
7978 (define_insn "tgd_add32"
7979 [(set (match_operand:SI 0 "register_operand" "=r")
7980 (plus:SI (match_operand:SI 1 "register_operand" "r")
7981 (unspec:SI [(match_operand:SI 2 "register_operand" "r")
7982 (match_operand 3 "tgd_symbolic_operand" "")]
7983 UNSPEC_TLSGD)))]
7984 "TARGET_TLS && TARGET_ARCH32"
7985 "add\\t%1, %2, %0, %%tgd_add(%a3)") 7927 "add\\t%1, %2, %0, %%tgd_add(%a3)")
7986 7928
7987 (define_insn "tgd_add64" 7929 (define_insn "tgd_call<P:mode>"
7988 [(set (match_operand:DI 0 "register_operand" "=r")
7989 (plus:DI (match_operand:DI 1 "register_operand" "r")
7990 (unspec:DI [(match_operand:SI 2 "register_operand" "r")
7991 (match_operand 3 "tgd_symbolic_operand" "")]
7992 UNSPEC_TLSGD)))]
7993 "TARGET_TLS && TARGET_ARCH64"
7994 "add\\t%1, %2, %0, %%tgd_add(%a3)")
7995
7996 (define_insn "tgd_call32"
7997 [(set (match_operand 0 "register_operand" "=r") 7930 [(set (match_operand 0 "register_operand" "=r")
7998 (call (mem:SI (unspec:SI [(match_operand:SI 1 "symbolic_operand" "s") 7931 (call (mem:P (unspec:P [(match_operand:P 1 "symbolic_operand" "s")
7999 (match_operand 2 "tgd_symbolic_operand" "")] 7932 (match_operand 2 "tgd_symbolic_operand" "")]
8000 UNSPEC_TLSGD)) 7933 UNSPEC_TLSGD))
8001 (match_operand 3 "" ""))) 7934 (match_operand 3 "" "")))
8002 (clobber (reg:SI O7_REG))] 7935 (clobber (reg:P O7_REG))]
8003 "TARGET_TLS && TARGET_ARCH32" 7936 "TARGET_TLS"
8004 "call\t%a1, %%tgd_call(%a2)%#" 7937 "call\t%a1, %%tgd_call(%a2)%#"
8005 [(set_attr "type" "call")]) 7938 [(set_attr "type" "call")])
8006 7939
8007 (define_insn "tgd_call64" 7940 (define_insn "tldm_hi22<P:mode>"
8008 [(set (match_operand 0 "register_operand" "=r") 7941 [(set (match_operand:P 0 "register_operand" "=r")
8009 (call (mem:DI (unspec:DI [(match_operand:DI 1 "symbolic_operand" "s") 7942 (high:P (unspec:P [(const_int 0)] UNSPEC_TLSLDM)))]
8010 (match_operand 2 "tgd_symbolic_operand" "")]
8011 UNSPEC_TLSGD))
8012 (match_operand 3 "" "")))
8013 (clobber (reg:DI O7_REG))]
8014 "TARGET_TLS && TARGET_ARCH64"
8015 "call\t%a1, %%tgd_call(%a2)%#"
8016 [(set_attr "type" "call")])
8017
8018 (define_insn "tldm_hi22"
8019 [(set (match_operand:SI 0 "register_operand" "=r")
8020 (high:SI (unspec:SI [(const_int 0)] UNSPEC_TLSLDM)))]
8021 "TARGET_TLS" 7943 "TARGET_TLS"
8022 "sethi\\t%%tldm_hi22(%&), %0") 7944 "sethi\\t%%tldm_hi22(%&), %0")
8023 7945
8024 (define_insn "tldm_lo10" 7946 (define_insn "tldm_lo10<P:mode>"
8025 [(set (match_operand:SI 0 "register_operand" "=r") 7947 [(set (match_operand:P 0 "register_operand" "=r")
8026 (lo_sum:SI (match_operand:SI 1 "register_operand" "r") 7948 (lo_sum:P (match_operand:P 1 "register_operand" "r")
8027 (unspec:SI [(const_int 0)] UNSPEC_TLSLDM)))] 7949 (unspec:P [(const_int 0)] UNSPEC_TLSLDM)))]
8028 "TARGET_TLS" 7950 "TARGET_TLS"
8029 "add\\t%1, %%tldm_lo10(%&), %0") 7951 "add\\t%1, %%tldm_lo10(%&), %0")
8030 7952
8031 (define_insn "tldm_add32" 7953 (define_insn "tldm_add<P:mode>"
8032 [(set (match_operand:SI 0 "register_operand" "=r") 7954 [(set (match_operand:P 0 "register_operand" "=r")
8033 (plus:SI (match_operand:SI 1 "register_operand" "r") 7955 (plus:P (match_operand:P 1 "register_operand" "r")
8034 (unspec:SI [(match_operand:SI 2 "register_operand" "r")] 7956 (unspec:P [(match_operand:P 2 "register_operand" "r")]
8035 UNSPEC_TLSLDM)))] 7957 UNSPEC_TLSLDM)))]
8036 "TARGET_TLS && TARGET_ARCH32" 7958 "TARGET_TLS"
8037 "add\\t%1, %2, %0, %%tldm_add(%&)") 7959 "add\\t%1, %2, %0, %%tldm_add(%&)")
8038 7960
8039 (define_insn "tldm_add64" 7961 (define_insn "tldm_call<P:mode>"
8040 [(set (match_operand:DI 0 "register_operand" "=r")
8041 (plus:DI (match_operand:DI 1 "register_operand" "r")
8042 (unspec:DI [(match_operand:SI 2 "register_operand" "r")]
8043 UNSPEC_TLSLDM)))]
8044 "TARGET_TLS && TARGET_ARCH64"
8045 "add\\t%1, %2, %0, %%tldm_add(%&)")
8046
8047 (define_insn "tldm_call32"
8048 [(set (match_operand 0 "register_operand" "=r") 7962 [(set (match_operand 0 "register_operand" "=r")
8049 (call (mem:SI (unspec:SI [(match_operand:SI 1 "symbolic_operand" "s")] 7963 (call (mem:P (unspec:P [(match_operand:P 1 "symbolic_operand" "s")]
8050 UNSPEC_TLSLDM)) 7964 UNSPEC_TLSLDM))
8051 (match_operand 2 "" ""))) 7965 (match_operand 2 "" "")))
8052 (clobber (reg:SI O7_REG))] 7966 (clobber (reg:P O7_REG))]
8053 "TARGET_TLS && TARGET_ARCH32" 7967 "TARGET_TLS"
8054 "call\t%a1, %%tldm_call(%&)%#" 7968 "call\t%a1, %%tldm_call(%&)%#"
8055 [(set_attr "type" "call")]) 7969 [(set_attr "type" "call")])
8056 7970
8057 (define_insn "tldm_call64" 7971 (define_insn "tldo_hix22<P:mode>"
8058 [(set (match_operand 0 "register_operand" "=r") 7972 [(set (match_operand:P 0 "register_operand" "=r")
8059 (call (mem:DI (unspec:DI [(match_operand:DI 1 "symbolic_operand" "s")] 7973 (high:P (unspec:P [(match_operand 1 "tld_symbolic_operand" "")]
8060 UNSPEC_TLSLDM)) 7974 UNSPEC_TLSLDO)))]
8061 (match_operand 2 "" ""))) 7975 "TARGET_TLS"
8062 (clobber (reg:DI O7_REG))] 7976 "sethi\\t%%tldo_hix22(%a1), %0")
8063 "TARGET_TLS && TARGET_ARCH64" 7977
8064 "call\t%a1, %%tldm_call(%&)%#" 7978 (define_insn "tldo_lox10<P:mode>"
8065 [(set_attr "type" "call")]) 7979 [(set (match_operand:P 0 "register_operand" "=r")
8066 7980 (lo_sum:P (match_operand:P 1 "register_operand" "r")
8067 (define_insn "tldo_hix22" 7981 (unspec:P [(match_operand 2 "tld_symbolic_operand" "")]
8068 [(set (match_operand:SI 0 "register_operand" "=r")
8069 (high:SI (unspec:SI [(match_operand 1 "tld_symbolic_operand" "")]
8070 UNSPEC_TLSLDO)))] 7982 UNSPEC_TLSLDO)))]
8071 "TARGET_TLS" 7983 "TARGET_TLS"
8072 "sethi\\t%%tldo_hix22(%a1), %0") 7984 "xor\\t%1, %%tldo_lox10(%a2), %0")
8073 7985
8074 (define_insn "tldo_lox10" 7986 (define_insn "tldo_add<P:mode>"
8075 [(set (match_operand:SI 0 "register_operand" "=r") 7987 [(set (match_operand:P 0 "register_operand" "=r")
8076 (lo_sum:SI (match_operand:SI 1 "register_operand" "r") 7988 (plus:P (match_operand:P 1 "register_operand" "r")
8077 (unspec:SI [(match_operand 2 "tld_symbolic_operand" "")] 7989 (unspec:P [(match_operand:P 2 "register_operand" "r")
8078 UNSPEC_TLSLDO)))] 7990 (match_operand 3 "tld_symbolic_operand" "")]
7991 UNSPEC_TLSLDO)))]
8079 "TARGET_TLS" 7992 "TARGET_TLS"
8080 "xor\\t%1, %%tldo_lox10(%a2), %0")
8081
8082 (define_insn "tldo_add32"
8083 [(set (match_operand:SI 0 "register_operand" "=r")
8084 (plus:SI (match_operand:SI 1 "register_operand" "r")
8085 (unspec:SI [(match_operand:SI 2 "register_operand" "r")
8086 (match_operand 3 "tld_symbolic_operand" "")]
8087 UNSPEC_TLSLDO)))]
8088 "TARGET_TLS && TARGET_ARCH32"
8089 "add\\t%1, %2, %0, %%tldo_add(%a3)") 7993 "add\\t%1, %2, %0, %%tldo_add(%a3)")
8090 7994
8091 (define_insn "tldo_add64" 7995 (define_insn "tie_hi22<P:mode>"
8092 [(set (match_operand:DI 0 "register_operand" "=r") 7996 [(set (match_operand:P 0 "register_operand" "=r")
8093 (plus:DI (match_operand:DI 1 "register_operand" "r") 7997 (high:P (unspec:P [(match_operand 1 "tie_symbolic_operand" "")]
8094 (unspec:DI [(match_operand:SI 2 "register_operand" "r") 7998 UNSPEC_TLSIE)))]
8095 (match_operand 3 "tld_symbolic_operand" "")] 7999 "TARGET_TLS"
8096 UNSPEC_TLSLDO)))] 8000 "sethi\\t%%tie_hi22(%a1), %0")
8097 "TARGET_TLS && TARGET_ARCH64" 8001
8098 "add\\t%1, %2, %0, %%tldo_add(%a3)") 8002 (define_insn "tie_lo10<P:mode>"
8099 8003 [(set (match_operand:P 0 "register_operand" "=r")
8100 (define_insn "tie_hi22" 8004 (lo_sum:P (match_operand:P 1 "register_operand" "r")
8101 [(set (match_operand:SI 0 "register_operand" "=r") 8005 (unspec:P [(match_operand 2 "tie_symbolic_operand" "")]
8102 (high:SI (unspec:SI [(match_operand 1 "tie_symbolic_operand" "")]
8103 UNSPEC_TLSIE)))] 8006 UNSPEC_TLSIE)))]
8104 "TARGET_TLS" 8007 "TARGET_TLS"
8105 "sethi\\t%%tie_hi22(%a1), %0")
8106
8107 (define_insn "tie_lo10"
8108 [(set (match_operand:SI 0 "register_operand" "=r")
8109 (lo_sum:SI (match_operand:SI 1 "register_operand" "r")
8110 (unspec:SI [(match_operand 2 "tie_symbolic_operand" "")]
8111 UNSPEC_TLSIE)))]
8112 "TARGET_TLS"
8113 "add\\t%1, %%tie_lo10(%a2), %0") 8008 "add\\t%1, %%tie_lo10(%a2), %0")
8114 8009
8010 ; Note the %%tie_ld operator
8115 (define_insn "tie_ld32" 8011 (define_insn "tie_ld32"
8116 [(set (match_operand:SI 0 "register_operand" "=r") 8012 [(set (match_operand:SI 0 "register_operand" "=r")
8117 (unspec:SI [(match_operand:SI 1 "register_operand" "r") 8013 (unspec:SI [(match_operand:SI 1 "register_operand" "r")
8118 (match_operand:SI 2 "register_operand" "r") 8014 (match_operand:SI 2 "register_operand" "r")
8119 (match_operand 3 "tie_symbolic_operand" "")] 8015 (match_operand 3 "tie_symbolic_operand" "")]
8121 "TARGET_TLS && TARGET_ARCH32" 8017 "TARGET_TLS && TARGET_ARCH32"
8122 "ld\\t[%1 + %2], %0, %%tie_ld(%a3)" 8018 "ld\\t[%1 + %2], %0, %%tie_ld(%a3)"
8123 [(set_attr "type" "load") 8019 [(set_attr "type" "load")
8124 (set_attr "subtype" "regular")]) 8020 (set_attr "subtype" "regular")])
8125 8021
8022 ; Note the %%tie_ldx operator
8126 (define_insn "tie_ld64" 8023 (define_insn "tie_ld64"
8127 [(set (match_operand:DI 0 "register_operand" "=r") 8024 [(set (match_operand:DI 0 "register_operand" "=r")
8128 (unspec:DI [(match_operand:DI 1 "register_operand" "r") 8025 (unspec:DI [(match_operand:DI 1 "register_operand" "r")
8129 (match_operand:SI 2 "register_operand" "r") 8026 (match_operand:DI 2 "register_operand" "r")
8130 (match_operand 3 "tie_symbolic_operand" "")] 8027 (match_operand 3 "tie_symbolic_operand" "")]
8131 UNSPEC_TLSIE))] 8028 UNSPEC_TLSIE))]
8132 "TARGET_TLS && TARGET_ARCH64" 8029 "TARGET_TLS && TARGET_ARCH64"
8133 "ldx\\t[%1 + %2], %0, %%tie_ldx(%a3)" 8030 "ldx\\t[%1 + %2], %0, %%tie_ldx(%a3)"
8134 [(set_attr "type" "load") 8031 [(set_attr "type" "load")
8135 (set_attr "subtype" "regular")]) 8032 (set_attr "subtype" "regular")])
8136 8033
8137 (define_insn "tie_add32" 8034 (define_insn "tie_add<P:mode>"
8138 [(set (match_operand:SI 0 "register_operand" "=r") 8035 [(set (match_operand:P 0 "register_operand" "=r")
8139 (plus:SI (match_operand:SI 1 "register_operand" "r") 8036 (plus:P (match_operand:P 1 "register_operand" "r")
8140 (unspec:SI [(match_operand:SI 2 "register_operand" "r") 8037 (unspec:P [(match_operand:P 2 "register_operand" "r")
8141 (match_operand 3 "tie_symbolic_operand" "")] 8038 (match_operand 3 "tie_symbolic_operand" "")]
8142 UNSPEC_TLSIE)))] 8039 UNSPEC_TLSIE)))]
8143 "TARGET_SUN_TLS && TARGET_ARCH32" 8040 "TARGET_SUN_TLS"
8144 "add\\t%1, %2, %0, %%tie_add(%a3)") 8041 "add\\t%1, %2, %0, %%tie_add(%a3)")
8145 8042
8146 (define_insn "tie_add64" 8043 (define_insn "tle_hix22<P:mode>"
8147 [(set (match_operand:DI 0 "register_operand" "=r") 8044 [(set (match_operand:P 0 "register_operand" "=r")
8148 (plus:DI (match_operand:DI 1 "register_operand" "r") 8045 (high:P (unspec:P [(match_operand 1 "tle_symbolic_operand" "")]
8149 (unspec:DI [(match_operand:DI 2 "register_operand" "r") 8046 UNSPEC_TLSLE)))]
8150 (match_operand 3 "tie_symbolic_operand" "")] 8047 "TARGET_TLS"
8151 UNSPEC_TLSIE)))] 8048 "sethi\\t%%tle_hix22(%a1), %0")
8152 "TARGET_SUN_TLS && TARGET_ARCH64" 8049
8153 "add\\t%1, %2, %0, %%tie_add(%a3)") 8050 (define_insn "tle_lox10<P:mode>"
8154 8051 [(set (match_operand:P 0 "register_operand" "=r")
8155 (define_insn "tle_hix22_sp32" 8052 (lo_sum:P (match_operand:P 1 "register_operand" "r")
8156 [(set (match_operand:SI 0 "register_operand" "=r") 8053 (unspec:P [(match_operand 2 "tle_symbolic_operand" "")]
8157 (high:SI (unspec:SI [(match_operand 1 "tle_symbolic_operand" "")]
8158 UNSPEC_TLSLE)))] 8054 UNSPEC_TLSLE)))]
8159 "TARGET_TLS && TARGET_ARCH32" 8055 "TARGET_TLS"
8160 "sethi\\t%%tle_hix22(%a1), %0")
8161
8162 (define_insn "tle_lox10_sp32"
8163 [(set (match_operand:SI 0 "register_operand" "=r")
8164 (lo_sum:SI (match_operand:SI 1 "register_operand" "r")
8165 (unspec:SI [(match_operand 2 "tle_symbolic_operand" "")]
8166 UNSPEC_TLSLE)))]
8167 "TARGET_TLS && TARGET_ARCH32"
8168 "xor\\t%1, %%tle_lox10(%a2), %0") 8056 "xor\\t%1, %%tle_lox10(%a2), %0")
8169 8057
8170 (define_insn "tle_hix22_sp64" 8058 ;; Now patterns combining tldo_add with some integer loads or stores
8171 [(set (match_operand:DI 0 "register_operand" "=r") 8059 (define_insn "*tldo_ldub<P:mode>"
8172 (high:DI (unspec:DI [(match_operand 1 "tle_symbolic_operand" "")]
8173 UNSPEC_TLSLE)))]
8174 "TARGET_TLS && TARGET_ARCH64"
8175 "sethi\\t%%tle_hix22(%a1), %0")
8176
8177 (define_insn "tle_lox10_sp64"
8178 [(set (match_operand:DI 0 "register_operand" "=r")
8179 (lo_sum:DI (match_operand:DI 1 "register_operand" "r")
8180 (unspec:DI [(match_operand 2 "tle_symbolic_operand" "")]
8181 UNSPEC_TLSLE)))]
8182 "TARGET_TLS && TARGET_ARCH64"
8183 "xor\\t%1, %%tle_lox10(%a2), %0")
8184
8185 ;; Now patterns combining tldo_add{32,64} with some integer loads or stores
8186 (define_insn "*tldo_ldub_sp32"
8187 [(set (match_operand:QI 0 "register_operand" "=r") 8060 [(set (match_operand:QI 0 "register_operand" "=r")
8188 (mem:QI (plus:SI (unspec:SI [(match_operand:SI 2 "register_operand" "r") 8061 (mem:QI (plus:P (unspec:P [(match_operand:P 2 "register_operand" "r")
8189 (match_operand 3 "tld_symbolic_operand" "")] 8062 (match_operand 3 "tld_symbolic_operand" "")]
8190 UNSPEC_TLSLDO) 8063 UNSPEC_TLSLDO)
8191 (match_operand:SI 1 "register_operand" "r"))))] 8064 (match_operand:P 1 "register_operand" "r"))))]
8192 "TARGET_TLS && TARGET_ARCH32" 8065 "TARGET_TLS"
8193 "ldub\t[%1 + %2], %0, %%tldo_add(%3)" 8066 "ldub\t[%1 + %2], %0, %%tldo_add(%3)"
8194 [(set_attr "type" "load") 8067 [(set_attr "type" "load")
8195 (set_attr "subtype" "regular") 8068 (set_attr "subtype" "regular")
8196 (set_attr "us3load_type" "3cycle")]) 8069 (set_attr "us3load_type" "3cycle")])
8197 8070
8198 (define_insn "*tldo_ldub1_sp32" 8071 (define_insn "*tldo_ldub1<P:mode>"
8199 [(set (match_operand:HI 0 "register_operand" "=r") 8072 [(set (match_operand:HI 0 "register_operand" "=r")
8200 (zero_extend:HI 8073 (zero_extend:HI
8201 (mem:QI (plus:SI (unspec:SI [(match_operand:SI 2 "register_operand" "r") 8074 (mem:QI (plus:P (unspec:P [(match_operand:P 2 "register_operand" "r")
8202 (match_operand 3 "tld_symbolic_operand" "")] 8075 (match_operand 3 "tld_symbolic_operand" "")]
8203 UNSPEC_TLSLDO) 8076 UNSPEC_TLSLDO)
8204 (match_operand:SI 1 "register_operand" "r")))))] 8077 (match_operand:P 1 "register_operand" "r")))))]
8205 "TARGET_TLS && TARGET_ARCH32" 8078 "TARGET_TLS"
8206 "ldub\t[%1 + %2], %0, %%tldo_add(%3)" 8079 "ldub\t[%1 + %2], %0, %%tldo_add(%3)"
8207 [(set_attr "type" "load") 8080 [(set_attr "type" "load")
8208 (set_attr "subtype" "regular") 8081 (set_attr "subtype" "regular")
8209 (set_attr "us3load_type" "3cycle")]) 8082 (set_attr "us3load_type" "3cycle")])
8210 8083
8211 (define_insn "*tldo_ldub2_sp32" 8084 (define_insn "*tldo_ldub2<P:mode>"
8212 [(set (match_operand:SI 0 "register_operand" "=r") 8085 [(set (match_operand:SI 0 "register_operand" "=r")
8213 (zero_extend:SI 8086 (zero_extend:SI
8214 (mem:QI (plus:SI (unspec:SI [(match_operand:SI 2 "register_operand" "r") 8087 (mem:QI (plus:P (unspec:P [(match_operand:P 2 "register_operand" "r")
8215 (match_operand 3 "tld_symbolic_operand" "")] 8088 (match_operand 3 "tld_symbolic_operand" "")]
8216 UNSPEC_TLSLDO) 8089 UNSPEC_TLSLDO)
8217 (match_operand:SI 1 "register_operand" "r")))))] 8090 (match_operand:P 1 "register_operand" "r")))))]
8218 "TARGET_TLS && TARGET_ARCH32" 8091 "TARGET_TLS"
8219 "ldub\t[%1 + %2], %0, %%tldo_add(%3)" 8092 "ldub\t[%1 + %2], %0, %%tldo_add(%3)"
8220 [(set_attr "type" "load") 8093 [(set_attr "type" "load")
8221 (set_attr "subtype" "regular") 8094 (set_attr "subtype" "regular")
8222 (set_attr "us3load_type" "3cycle")]) 8095 (set_attr "us3load_type" "3cycle")])
8223 8096
8224 (define_insn "*tldo_ldsb1_sp32" 8097 (define_insn "*tldo_ldsb1<P:mode>"
8225 [(set (match_operand:HI 0 "register_operand" "=r") 8098 [(set (match_operand:HI 0 "register_operand" "=r")
8226 (sign_extend:HI 8099 (sign_extend:HI
8227 (mem:QI (plus:SI (unspec:SI [(match_operand:SI 2 "register_operand" "r") 8100 (mem:QI (plus:P (unspec:P [(match_operand:P 2 "register_operand" "r")
8228 (match_operand 3 "tld_symbolic_operand" "")] 8101 (match_operand 3 "tld_symbolic_operand" "")]
8229 UNSPEC_TLSLDO) 8102 UNSPEC_TLSLDO)
8230 (match_operand:SI 1 "register_operand" "r")))))] 8103 (match_operand:P 1 "register_operand" "r")))))]
8231 "TARGET_TLS && TARGET_ARCH32" 8104 "TARGET_TLS"
8232 "ldsb\t[%1 + %2], %0, %%tldo_add(%3)" 8105 "ldsb\t[%1 + %2], %0, %%tldo_add(%3)"
8233 [(set_attr "type" "sload") 8106 [(set_attr "type" "sload")
8234 (set_attr "us3load_type" "3cycle")]) 8107 (set_attr "us3load_type" "3cycle")])
8235 8108
8236 (define_insn "*tldo_ldsb2_sp32" 8109 (define_insn "*tldo_ldsb2<P:mode>"
8237 [(set (match_operand:SI 0 "register_operand" "=r") 8110 [(set (match_operand:SI 0 "register_operand" "=r")
8238 (sign_extend:SI 8111 (sign_extend:SI
8239 (mem:QI (plus:SI (unspec:SI [(match_operand:SI 2 "register_operand" "r") 8112 (mem:QI (plus:P (unspec:P [(match_operand:P 2 "register_operand" "r")
8240 (match_operand 3 "tld_symbolic_operand" "")] 8113 (match_operand 3 "tld_symbolic_operand" "")]
8241 UNSPEC_TLSLDO) 8114 UNSPEC_TLSLDO)
8242 (match_operand:SI 1 "register_operand" "r")))))] 8115 (match_operand:P 1 "register_operand" "r")))))]
8243 "TARGET_TLS && TARGET_ARCH32" 8116 "TARGET_TLS"
8244 "ldsb\t[%1 + %2], %0, %%tldo_add(%3)" 8117 "ldsb\t[%1 + %2], %0, %%tldo_add(%3)"
8245 [(set_attr "type" "sload") 8118 [(set_attr "type" "sload")
8246 (set_attr "us3load_type" "3cycle")]) 8119 (set_attr "us3load_type" "3cycle")])
8247 8120
8248 (define_insn "*tldo_ldub_sp64" 8121 (define_insn "*tldo_ldub3_sp64"
8249 [(set (match_operand:QI 0 "register_operand" "=r") 8122 [(set (match_operand:DI 0 "register_operand" "=r")
8250 (mem:QI (plus:DI (unspec:DI [(match_operand:SI 2 "register_operand" "r") 8123 (zero_extend:DI
8251 (match_operand 3 "tld_symbolic_operand" "")] 8124 (mem:QI (plus:DI (unspec:DI [(match_operand:DI 2 "register_operand" "r")
8252 UNSPEC_TLSLDO)
8253 (match_operand:DI 1 "register_operand" "r"))))]
8254 "TARGET_TLS && TARGET_ARCH64"
8255 "ldub\t[%1 + %2], %0, %%tldo_add(%3)"
8256 [(set_attr "type" "load")
8257 (set_attr "subtype" "regular")
8258 (set_attr "us3load_type" "3cycle")])
8259
8260 (define_insn "*tldo_ldub1_sp64"
8261 [(set (match_operand:HI 0 "register_operand" "=r")
8262 (zero_extend:HI
8263 (mem:QI (plus:DI (unspec:DI [(match_operand:SI 2 "register_operand" "r")
8264 (match_operand 3 "tld_symbolic_operand" "")] 8125 (match_operand 3 "tld_symbolic_operand" "")]
8265 UNSPEC_TLSLDO) 8126 UNSPEC_TLSLDO)
8266 (match_operand:DI 1 "register_operand" "r")))))] 8127 (match_operand:DI 1 "register_operand" "r")))))]
8267 "TARGET_TLS && TARGET_ARCH64" 8128 "TARGET_TLS && TARGET_ARCH64"
8268 "ldub\t[%1 + %2], %0, %%tldo_add(%3)" 8129 "ldub\t[%1 + %2], %0, %%tldo_add(%3)"
8269 [(set_attr "type" "load") 8130 [(set_attr "type" "load")
8270 (set_attr "subtype" "regular") 8131 (set_attr "subtype" "regular")
8271 (set_attr "us3load_type" "3cycle")]) 8132 (set_attr "us3load_type" "3cycle")])
8272 8133
8273 (define_insn "*tldo_ldub2_sp64" 8134 (define_insn "*tldo_ldsb3_sp64"
8274 [(set (match_operand:SI 0 "register_operand" "=r")
8275 (zero_extend:SI
8276 (mem:QI (plus:DI (unspec:DI [(match_operand:SI 2 "register_operand" "r")
8277 (match_operand 3 "tld_symbolic_operand" "")]
8278 UNSPEC_TLSLDO)
8279 (match_operand:DI 1 "register_operand" "r")))))]
8280 "TARGET_TLS && TARGET_ARCH64"
8281 "ldub\t[%1 + %2], %0, %%tldo_add(%3)"
8282 [(set_attr "type" "load")
8283 (set_attr "subtype" "regular")
8284 (set_attr "us3load_type" "3cycle")])
8285
8286 (define_insn "*tldo_ldub3_sp64"
8287 [(set (match_operand:DI 0 "register_operand" "=r") 8135 [(set (match_operand:DI 0 "register_operand" "=r")
8288 (zero_extend:DI 8136 (sign_extend:DI
8289 (mem:QI (plus:DI (unspec:DI [(match_operand:SI 2 "register_operand" "r") 8137 (mem:QI (plus:DI (unspec:DI [(match_operand:DI 2 "register_operand" "r")
8290 (match_operand 3 "tld_symbolic_operand" "")]
8291 UNSPEC_TLSLDO)
8292 (match_operand:DI 1 "register_operand" "r")))))]
8293 "TARGET_TLS && TARGET_ARCH64"
8294 "ldub\t[%1 + %2], %0, %%tldo_add(%3)"
8295 [(set_attr "type" "load")
8296 (set_attr "subtype" "regular")
8297 (set_attr "us3load_type" "3cycle")])
8298
8299 (define_insn "*tldo_ldsb1_sp64"
8300 [(set (match_operand:HI 0 "register_operand" "=r")
8301 (sign_extend:HI
8302 (mem:QI (plus:DI (unspec:DI [(match_operand:SI 2 "register_operand" "r")
8303 (match_operand 3 "tld_symbolic_operand" "")] 8138 (match_operand 3 "tld_symbolic_operand" "")]
8304 UNSPEC_TLSLDO) 8139 UNSPEC_TLSLDO)
8305 (match_operand:DI 1 "register_operand" "r")))))] 8140 (match_operand:DI 1 "register_operand" "r")))))]
8306 "TARGET_TLS && TARGET_ARCH64" 8141 "TARGET_TLS && TARGET_ARCH64"
8307 "ldsb\t[%1 + %2], %0, %%tldo_add(%3)" 8142 "ldsb\t[%1 + %2], %0, %%tldo_add(%3)"
8308 [(set_attr "type" "sload") 8143 [(set_attr "type" "sload")
8309 (set_attr "us3load_type" "3cycle")]) 8144 (set_attr "us3load_type" "3cycle")])
8310 8145
8311 (define_insn "*tldo_ldsb2_sp64" 8146 (define_insn "*tldo_lduh<P:mode>"
8312 [(set (match_operand:SI 0 "register_operand" "=r")
8313 (sign_extend:SI
8314 (mem:QI (plus:DI (unspec:DI [(match_operand:SI 2 "register_operand" "r")
8315 (match_operand 3 "tld_symbolic_operand" "")]
8316 UNSPEC_TLSLDO)
8317 (match_operand:DI 1 "register_operand" "r")))))]
8318 "TARGET_TLS && TARGET_ARCH64"
8319 "ldsb\t[%1 + %2], %0, %%tldo_add(%3)"
8320 [(set_attr "type" "sload")
8321 (set_attr "us3load_type" "3cycle")])
8322
8323 (define_insn "*tldo_ldsb3_sp64"
8324 [(set (match_operand:DI 0 "register_operand" "=r")
8325 (sign_extend:DI
8326 (mem:QI (plus:DI (unspec:DI [(match_operand:SI 2 "register_operand" "r")
8327 (match_operand 3 "tld_symbolic_operand" "")]
8328 UNSPEC_TLSLDO)
8329 (match_operand:DI 1 "register_operand" "r")))))]
8330 "TARGET_TLS && TARGET_ARCH64"
8331 "ldsb\t[%1 + %2], %0, %%tldo_add(%3)"
8332 [(set_attr "type" "sload")
8333 (set_attr "us3load_type" "3cycle")])
8334
8335 (define_insn "*tldo_lduh_sp32"
8336 [(set (match_operand:HI 0 "register_operand" "=r") 8147 [(set (match_operand:HI 0 "register_operand" "=r")
8337 (mem:HI (plus:SI (unspec:SI [(match_operand:SI 2 "register_operand" "r") 8148 (mem:HI (plus:P (unspec:P [(match_operand:P 2 "register_operand" "r")
8338 (match_operand 3 "tld_symbolic_operand" "")] 8149 (match_operand 3 "tld_symbolic_operand" "")]
8339 UNSPEC_TLSLDO) 8150 UNSPEC_TLSLDO)
8340 (match_operand:SI 1 "register_operand" "r"))))] 8151 (match_operand:P 1 "register_operand" "r"))))]
8341 "TARGET_TLS && TARGET_ARCH32" 8152 "TARGET_TLS"
8342 "lduh\t[%1 + %2], %0, %%tldo_add(%3)" 8153 "lduh\t[%1 + %2], %0, %%tldo_add(%3)"
8343 [(set_attr "type" "load") 8154 [(set_attr "type" "load")
8344 (set_attr "subtype" "regular") 8155 (set_attr "subtype" "regular")
8345 (set_attr "us3load_type" "3cycle")]) 8156 (set_attr "us3load_type" "3cycle")])
8346 8157
8347 (define_insn "*tldo_lduh1_sp32" 8158 (define_insn "*tldo_lduh1<P:mode>"
8348 [(set (match_operand:SI 0 "register_operand" "=r") 8159 [(set (match_operand:SI 0 "register_operand" "=r")
8349 (zero_extend:SI 8160 (zero_extend:SI
8350 (mem:HI (plus:SI (unspec:SI [(match_operand:SI 2 "register_operand" "r") 8161 (mem:HI (plus:P (unspec:P [(match_operand:P 2 "register_operand" "r")
8351 (match_operand 3 "tld_symbolic_operand" "")] 8162 (match_operand 3 "tld_symbolic_operand" "")]
8352 UNSPEC_TLSLDO) 8163 UNSPEC_TLSLDO)
8353 (match_operand:SI 1 "register_operand" "r")))))] 8164 (match_operand:P 1 "register_operand" "r")))))]
8354 "TARGET_TLS && TARGET_ARCH32" 8165 "TARGET_TLS"
8355 "lduh\t[%1 + %2], %0, %%tldo_add(%3)" 8166 "lduh\t[%1 + %2], %0, %%tldo_add(%3)"
8356 [(set_attr "type" "load") 8167 [(set_attr "type" "load")
8357 (set_attr "subtype" "regular") 8168 (set_attr "subtype" "regular")
8358 (set_attr "us3load_type" "3cycle")]) 8169 (set_attr "us3load_type" "3cycle")])
8359 8170
8360 (define_insn "*tldo_ldsh1_sp32" 8171 (define_insn "*tldo_ldsh1<P:mode>"
8361 [(set (match_operand:SI 0 "register_operand" "=r") 8172 [(set (match_operand:SI 0 "register_operand" "=r")
8362 (sign_extend:SI 8173 (sign_extend:SI
8363 (mem:HI (plus:SI (unspec:SI [(match_operand:SI 2 "register_operand" "r") 8174 (mem:HI (plus:P (unspec:P [(match_operand:P 2 "register_operand" "r")
8364 (match_operand 3 "tld_symbolic_operand" "")] 8175 (match_operand 3 "tld_symbolic_operand" "")]
8365 UNSPEC_TLSLDO) 8176 UNSPEC_TLSLDO)
8366 (match_operand:SI 1 "register_operand" "r")))))] 8177 (match_operand:P 1 "register_operand" "r")))))]
8367 "TARGET_TLS && TARGET_ARCH32" 8178 "TARGET_TLS"
8368 "ldsh\t[%1 + %2], %0, %%tldo_add(%3)" 8179 "ldsh\t[%1 + %2], %0, %%tldo_add(%3)"
8369 [(set_attr "type" "sload") 8180 [(set_attr "type" "sload")
8370 (set_attr "us3load_type" "3cycle")]) 8181 (set_attr "us3load_type" "3cycle")])
8371 8182
8372 (define_insn "*tldo_lduh_sp64" 8183 (define_insn "*tldo_lduh2_sp64"
8373 [(set (match_operand:HI 0 "register_operand" "=r") 8184 [(set (match_operand:DI 0 "register_operand" "=r")
8374 (mem:HI (plus:DI (unspec:DI [(match_operand:SI 2 "register_operand" "r") 8185 (zero_extend:DI
8375 (match_operand 3 "tld_symbolic_operand" "")] 8186 (mem:HI (plus:DI (unspec:DI [(match_operand:DI 2 "register_operand" "r")
8376 UNSPEC_TLSLDO)
8377 (match_operand:DI 1 "register_operand" "r"))))]
8378 "TARGET_TLS && TARGET_ARCH64"
8379 "lduh\t[%1 + %2], %0, %%tldo_add(%3)"
8380 [(set_attr "type" "load")
8381 (set_attr "subtype" "regular")
8382 (set_attr "us3load_type" "3cycle")])
8383
8384 (define_insn "*tldo_lduh1_sp64"
8385 [(set (match_operand:SI 0 "register_operand" "=r")
8386 (zero_extend:SI
8387 (mem:HI (plus:DI (unspec:DI [(match_operand:SI 2 "register_operand" "r")
8388 (match_operand 3 "tld_symbolic_operand" "")] 8187 (match_operand 3 "tld_symbolic_operand" "")]
8389 UNSPEC_TLSLDO) 8188 UNSPEC_TLSLDO)
8390 (match_operand:DI 1 "register_operand" "r")))))] 8189 (match_operand:DI 1 "register_operand" "r")))))]
8391 "TARGET_TLS && TARGET_ARCH64" 8190 "TARGET_TLS && TARGET_ARCH64"
8392 "lduh\t[%1 + %2], %0, %%tldo_add(%3)" 8191 "lduh\t[%1 + %2], %0, %%tldo_add(%3)"
8393 [(set_attr "type" "load") 8192 [(set_attr "type" "load")
8394 (set_attr "subtype" "regular") 8193 (set_attr "subtype" "regular")
8395 (set_attr "us3load_type" "3cycle")]) 8194 (set_attr "us3load_type" "3cycle")])
8396 8195
8397 (define_insn "*tldo_lduh2_sp64" 8196 (define_insn "*tldo_ldsh2_sp64"
8398 [(set (match_operand:DI 0 "register_operand" "=r") 8197 [(set (match_operand:DI 0 "register_operand" "=r")
8399 (zero_extend:DI 8198 (sign_extend:DI
8400 (mem:HI (plus:DI (unspec:DI [(match_operand:SI 2 "register_operand" "r") 8199 (mem:HI (plus:DI (unspec:DI [(match_operand:DI 2 "register_operand" "r")
8401 (match_operand 3 "tld_symbolic_operand" "")]
8402 UNSPEC_TLSLDO)
8403 (match_operand:DI 1 "register_operand" "r")))))]
8404 "TARGET_TLS && TARGET_ARCH64"
8405 "lduh\t[%1 + %2], %0, %%tldo_add(%3)"
8406 [(set_attr "type" "load")
8407 (set_attr "subtype" "regular")
8408 (set_attr "us3load_type" "3cycle")])
8409
8410 (define_insn "*tldo_ldsh1_sp64"
8411 [(set (match_operand:SI 0 "register_operand" "=r")
8412 (sign_extend:SI
8413 (mem:HI (plus:DI (unspec:DI [(match_operand:SI 2 "register_operand" "r")
8414 (match_operand 3 "tld_symbolic_operand" "")] 8200 (match_operand 3 "tld_symbolic_operand" "")]
8415 UNSPEC_TLSLDO) 8201 UNSPEC_TLSLDO)
8416 (match_operand:DI 1 "register_operand" "r")))))] 8202 (match_operand:DI 1 "register_operand" "r")))))]
8417 "TARGET_TLS && TARGET_ARCH64" 8203 "TARGET_TLS && TARGET_ARCH64"
8418 "ldsh\t[%1 + %2], %0, %%tldo_add(%3)" 8204 "ldsh\t[%1 + %2], %0, %%tldo_add(%3)"
8419 [(set_attr "type" "sload") 8205 [(set_attr "type" "sload")
8420 (set_attr "us3load_type" "3cycle")]) 8206 (set_attr "us3load_type" "3cycle")])
8421 8207
8422 (define_insn "*tldo_ldsh2_sp64" 8208 (define_insn "*tldo_lduw<P:mode>"
8423 [(set (match_operand:DI 0 "register_operand" "=r")
8424 (sign_extend:DI
8425 (mem:HI (plus:DI (unspec:DI [(match_operand:SI 2 "register_operand" "r")
8426 (match_operand 3 "tld_symbolic_operand" "")]
8427 UNSPEC_TLSLDO)
8428 (match_operand:DI 1 "register_operand" "r")))))]
8429 "TARGET_TLS && TARGET_ARCH64"
8430 "ldsh\t[%1 + %2], %0, %%tldo_add(%3)"
8431 [(set_attr "type" "sload")
8432 (set_attr "us3load_type" "3cycle")])
8433
8434 (define_insn "*tldo_lduw_sp32"
8435 [(set (match_operand:SI 0 "register_operand" "=r") 8209 [(set (match_operand:SI 0 "register_operand" "=r")
8436 (mem:SI (plus:SI (unspec:SI [(match_operand:SI 2 "register_operand" "r") 8210 (mem:SI (plus:P (unspec:P [(match_operand:P 2 "register_operand" "r")
8437 (match_operand 3 "tld_symbolic_operand" "")] 8211 (match_operand 3 "tld_symbolic_operand" "")]
8438 UNSPEC_TLSLDO) 8212 UNSPEC_TLSLDO)
8439 (match_operand:SI 1 "register_operand" "r"))))] 8213 (match_operand:P 1 "register_operand" "r"))))]
8440 "TARGET_TLS && TARGET_ARCH32" 8214 "TARGET_TLS"
8441 "ld\t[%1 + %2], %0, %%tldo_add(%3)" 8215 "ld\t[%1 + %2], %0, %%tldo_add(%3)"
8442 [(set_attr "type" "load") 8216 [(set_attr "type" "load")
8443 (set_attr "subtype" "regular")]) 8217 (set_attr "subtype" "regular")])
8444 8218
8445 (define_insn "*tldo_lduw_sp64"
8446 [(set (match_operand:SI 0 "register_operand" "=r")
8447 (mem:SI (plus:DI (unspec:DI [(match_operand:SI 2 "register_operand" "r")
8448 (match_operand 3 "tld_symbolic_operand" "")]
8449 UNSPEC_TLSLDO)
8450 (match_operand:DI 1 "register_operand" "r"))))]
8451 "TARGET_TLS && TARGET_ARCH64"
8452 "lduw\t[%1 + %2], %0, %%tldo_add(%3)"
8453 [(set_attr "type" "load")
8454 (set_attr "subtype" "regular")])
8455
8456 (define_insn "*tldo_lduw1_sp64" 8219 (define_insn "*tldo_lduw1_sp64"
8457 [(set (match_operand:DI 0 "register_operand" "=r") 8220 [(set (match_operand:DI 0 "register_operand" "=r")
8458 (zero_extend:DI 8221 (zero_extend:DI
8459 (mem:SI (plus:DI (unspec:DI [(match_operand:SI 2 "register_operand" "r") 8222 (mem:SI (plus:DI (unspec:DI [(match_operand:DI 2 "register_operand" "r")
8460 (match_operand 3 "tld_symbolic_operand" "")] 8223 (match_operand 3 "tld_symbolic_operand" "")]
8461 UNSPEC_TLSLDO) 8224 UNSPEC_TLSLDO)
8462 (match_operand:DI 1 "register_operand" "r")))))] 8225 (match_operand:DI 1 "register_operand" "r")))))]
8463 "TARGET_TLS && TARGET_ARCH64" 8226 "TARGET_TLS && TARGET_ARCH64"
8464 "lduw\t[%1 + %2], %0, %%tldo_add(%3)" 8227 "lduw\t[%1 + %2], %0, %%tldo_add(%3)"
8466 (set_attr "subtype" "regular")]) 8229 (set_attr "subtype" "regular")])
8467 8230
8468 (define_insn "*tldo_ldsw1_sp64" 8231 (define_insn "*tldo_ldsw1_sp64"
8469 [(set (match_operand:DI 0 "register_operand" "=r") 8232 [(set (match_operand:DI 0 "register_operand" "=r")
8470 (sign_extend:DI 8233 (sign_extend:DI
8471 (mem:SI (plus:DI (unspec:DI [(match_operand:SI 2 "register_operand" "r") 8234 (mem:SI (plus:DI (unspec:DI [(match_operand:DI 2 "register_operand" "r")
8472 (match_operand 3 "tld_symbolic_operand" "")] 8235 (match_operand 3 "tld_symbolic_operand" "")]
8473 UNSPEC_TLSLDO) 8236 UNSPEC_TLSLDO)
8474 (match_operand:DI 1 "register_operand" "r")))))] 8237 (match_operand:DI 1 "register_operand" "r")))))]
8475 "TARGET_TLS && TARGET_ARCH64" 8238 "TARGET_TLS && TARGET_ARCH64"
8476 "ldsw\t[%1 + %2], %0, %%tldo_add(%3)" 8239 "ldsw\t[%1 + %2], %0, %%tldo_add(%3)"
8477 [(set_attr "type" "sload") 8240 [(set_attr "type" "sload")
8478 (set_attr "us3load_type" "3cycle")]) 8241 (set_attr "us3load_type" "3cycle")])
8479 8242
8480 (define_insn "*tldo_ldx_sp64" 8243 (define_insn "*tldo_ldx_sp64"
8481 [(set (match_operand:DI 0 "register_operand" "=r") 8244 [(set (match_operand:DI 0 "register_operand" "=r")
8482 (mem:DI (plus:DI (unspec:DI [(match_operand:SI 2 "register_operand" "r") 8245 (mem:DI (plus:DI (unspec:DI [(match_operand:DI 2 "register_operand" "r")
8483 (match_operand 3 "tld_symbolic_operand" "")] 8246 (match_operand 3 "tld_symbolic_operand" "")]
8484 UNSPEC_TLSLDO) 8247 UNSPEC_TLSLDO)
8485 (match_operand:DI 1 "register_operand" "r"))))] 8248 (match_operand:DI 1 "register_operand" "r"))))]
8486 "TARGET_TLS && TARGET_ARCH64" 8249 "TARGET_TLS && TARGET_ARCH64"
8487 "ldx\t[%1 + %2], %0, %%tldo_add(%3)" 8250 "ldx\t[%1 + %2], %0, %%tldo_add(%3)"
8488 [(set_attr "type" "load") 8251 [(set_attr "type" "load")
8489 (set_attr "subtype" "regular")]) 8252 (set_attr "subtype" "regular")])
8490 8253
8491 (define_insn "*tldo_stb_sp32" 8254 (define_insn "*tldo_stb<P:mode>"
8492 [(set (mem:QI (plus:SI (unspec:SI [(match_operand:SI 2 "register_operand" "r") 8255 [(set (mem:QI (plus:P (unspec:P [(match_operand:P 2 "register_operand" "r")
8493 (match_operand 3 "tld_symbolic_operand" "")] 8256 (match_operand 3 "tld_symbolic_operand" "")]
8494 UNSPEC_TLSLDO) 8257 UNSPEC_TLSLDO)
8495 (match_operand:SI 1 "register_operand" "r"))) 8258 (match_operand:P 1 "register_operand" "r")))
8496 (match_operand:QI 0 "register_operand" "r"))] 8259 (match_operand:QI 0 "register_operand" "r"))]
8497 "TARGET_TLS && TARGET_ARCH32" 8260 "TARGET_TLS"
8498 "stb\t%0, [%1 + %2], %%tldo_add(%3)" 8261 "stb\t%0, [%1 + %2], %%tldo_add(%3)"
8499 [(set_attr "type" "store")]) 8262 [(set_attr "type" "store")])
8500 8263
8501 (define_insn "*tldo_stb_sp64" 8264 (define_insn "*tldo_sth<P:mode>"
8502 [(set (mem:QI (plus:DI (unspec:DI [(match_operand:SI 2 "register_operand" "r") 8265 [(set (mem:HI (plus:P (unspec:P [(match_operand:P 2 "register_operand" "r")
8503 (match_operand 3 "tld_symbolic_operand" "")] 8266 (match_operand 3 "tld_symbolic_operand" "")]
8504 UNSPEC_TLSLDO) 8267 UNSPEC_TLSLDO)
8505 (match_operand:DI 1 "register_operand" "r"))) 8268 (match_operand:P 1 "register_operand" "r")))
8506 (match_operand:QI 0 "register_operand" "r"))]
8507 "TARGET_TLS && TARGET_ARCH64"
8508 "stb\t%0, [%1 + %2], %%tldo_add(%3)"
8509 [(set_attr "type" "store")])
8510
8511 (define_insn "*tldo_sth_sp32"
8512 [(set (mem:HI (plus:SI (unspec:SI [(match_operand:SI 2 "register_operand" "r")
8513 (match_operand 3 "tld_symbolic_operand" "")]
8514 UNSPEC_TLSLDO)
8515 (match_operand:SI 1 "register_operand" "r")))
8516 (match_operand:HI 0 "register_operand" "r"))] 8269 (match_operand:HI 0 "register_operand" "r"))]
8517 "TARGET_TLS && TARGET_ARCH32" 8270 "TARGET_TLS"
8518 "sth\t%0, [%1 + %2], %%tldo_add(%3)" 8271 "sth\t%0, [%1 + %2], %%tldo_add(%3)"
8519 [(set_attr "type" "store")]) 8272 [(set_attr "type" "store")])
8520 8273
8521 (define_insn "*tldo_sth_sp64" 8274 (define_insn "*tldo_stw<P:mode>"
8522 [(set (mem:HI (plus:DI (unspec:DI [(match_operand:SI 2 "register_operand" "r") 8275 [(set (mem:SI (plus:P (unspec:P [(match_operand:P 2 "register_operand" "r")
8523 (match_operand 3 "tld_symbolic_operand" "")] 8276 (match_operand 3 "tld_symbolic_operand" "")]
8524 UNSPEC_TLSLDO) 8277 UNSPEC_TLSLDO)
8525 (match_operand:DI 1 "register_operand" "r"))) 8278 (match_operand:P 1 "register_operand" "r")))
8526 (match_operand:HI 0 "register_operand" "r"))]
8527 "TARGET_TLS && TARGET_ARCH64"
8528 "sth\t%0, [%1 + %2], %%tldo_add(%3)"
8529 [(set_attr "type" "store")])
8530
8531 (define_insn "*tldo_stw_sp32"
8532 [(set (mem:SI (plus:SI (unspec:SI [(match_operand:SI 2 "register_operand" "r")
8533 (match_operand 3 "tld_symbolic_operand" "")]
8534 UNSPEC_TLSLDO)
8535 (match_operand:SI 1 "register_operand" "r")))
8536 (match_operand:SI 0 "register_operand" "r"))] 8279 (match_operand:SI 0 "register_operand" "r"))]
8537 "TARGET_TLS && TARGET_ARCH32" 8280 "TARGET_TLS"
8538 "st\t%0, [%1 + %2], %%tldo_add(%3)" 8281 "st\t%0, [%1 + %2], %%tldo_add(%3)"
8539 [(set_attr "type" "store")]) 8282 [(set_attr "type" "store")])
8540 8283
8541 (define_insn "*tldo_stw_sp64"
8542 [(set (mem:SI (plus:DI (unspec:DI [(match_operand:SI 2 "register_operand" "r")
8543 (match_operand 3 "tld_symbolic_operand" "")]
8544 UNSPEC_TLSLDO)
8545 (match_operand:DI 1 "register_operand" "r")))
8546 (match_operand:SI 0 "register_operand" "r"))]
8547 "TARGET_TLS && TARGET_ARCH64"
8548 "stw\t%0, [%1 + %2], %%tldo_add(%3)"
8549 [(set_attr "type" "store")])
8550
8551 (define_insn "*tldo_stx_sp64" 8284 (define_insn "*tldo_stx_sp64"
8552 [(set (mem:DI (plus:DI (unspec:DI [(match_operand:SI 2 "register_operand" "r") 8285 [(set (mem:DI (plus:DI (unspec:DI [(match_operand:DI 2 "register_operand" "r")
8553 (match_operand 3 "tld_symbolic_operand" "")] 8286 (match_operand 3 "tld_symbolic_operand" "")]
8554 UNSPEC_TLSLDO) 8287 UNSPEC_TLSLDO)
8555 (match_operand:DI 1 "register_operand" "r"))) 8288 (match_operand:DI 1 "register_operand" "r")))
8556 (match_operand:DI 0 "register_operand" "r"))] 8289 (match_operand:DI 0 "register_operand" "r"))]
8557 "TARGET_TLS && TARGET_ARCH64" 8290 "TARGET_TLS && TARGET_ARCH64"