CbC/CbC_gcc: gcc/emit-rtl.c comparison

comparison gcc/emit-rtl.c @ 145:1830386684a0

gcc-9.2.0

author	anatofuz
date	Thu, 13 Feb 2020 11:34:05 +0900
parents	84e7813d76e9
children

comparison

equal deleted inserted replaced

-:84e7813d76e9
+:1830386684a0
 /* Emit RTL for the GCC expander.
-Copyright (C) 1987-2018 Free Software Foundation, Inc.
+Copyright (C) 1987-2020 Free Software Foundation, Inc.
 This file is part of GCC.
 GCC is free software; you can redistribute it and/or modify it under
 the terms of the GNU General Public License as published by the Free
 #include "varasm.h"
 #include "cfgrtl.h"
 #include "tree-eh.h"
 #include "explow.h"
 #include "expr.h"
-#include "params.h"
 #include "builtins.h"
 #include "rtl-iter.h"
 #include "stor-layout.h"
 #include "opts.h"
 #include "predict.h"
 #include "rtx-vector-builder.h"
+#include "gimple.h"
+#include "gimple-ssa.h"
+#include "gimplify.h"
 struct target_rtl default_target_rtl;
 #if SWITCHABLE_TARGET
 struct target_rtl *this_target_rtl = &default_target_rtl;
 #endif
 }
 /* Return true if the given memory attributes are equal.  */
 bool
-mem_attrs_eq_p (const struct mem_attrs *p, const struct mem_attrs *q)
+mem_attrs_eq_p (const class mem_attrs *p, const class mem_attrs *q)
 {
 if (p == q)
 return true;
 if (!p || !q)
 return false;
 			: 1);
 PUT_MODE_RAW (x, mode);
 set_regno_raw (x, regno, nregs);
 }
+/* Initialize a fresh REG rtx with mode MODE and register REGNO.  */
+rtx
+init_raw_REG (rtx x, machine_mode mode, unsigned int regno)
+{
+set_mode_and_regno (x, mode, regno);
+REG_ATTRS (x) = NULL;
+ORIGINAL_REGNO (x) = regno;
+return x;
+}
 /* Generate a new REG rtx.  Make sure ORIGINAL_REGNO is set properly, and
 don't attempt to share with the various global pieces of rtl (such as
 frame_pointer_rtx).  */
 rtx
 gen_raw_REG (machine_mode mode, unsigned int regno)
 {
 rtx x = rtx_alloc (REG MEM_STAT_INFO);
-set_mode_and_regno (x, mode, regno);
+init_raw_REG (x, mode, regno);
-REG_ATTRS (x) = NULL;
-ORIGINAL_REGNO (x) = regno;
 return x;
 }
 /* There are some RTL codes that require special attention; the generation
 functions do the raw handling.  If you add to this list, modify
 if (result)
 return result;
 if (mode != BLKmode && mode != VOIDmode)
 {
-/* If this is a register which can not be accessed by words, copy it
+/* If this is a register which cannot be accessed by words, copy it
 	 to a pseudo register.  */
 if (REG_P (op))
 	op = copy_to_reg (op);
 else
 	op = force_reg (mode, op);
 set_mem_attributes_minus_bitpos (rtx ref, tree t, int objectp,
 				 poly_int64 bitpos)
 {
 poly_int64 apply_bitpos = 0;
 tree type;
-struct mem_attrs attrs, *defattrs, *refattrs;
+class mem_attrs attrs, *defattrs, *refattrs;
 addr_space_t as;
 /* It can happen that type_for_mode was given a mode for which there
 is no language-level type.  In which case it returns NULL, which
 we can see here.  */
 	  attrs.offset_known_p = true;
 	  attrs.offset = 0;
 	  apply_bitpos = bitpos;
 	}
+/* If this is a reference based on a partitioned decl replace the
+	 base with a MEM_REF of the pointer representative we created
+	 during stack slot partitioning.  */
+if (attrs.expr
+	  && VAR_P (base)
+	  && ! is_global_var (base)
+	  && cfun->gimple_df->decls_to_pointers != NULL)
+	{
+	  tree *namep = cfun->gimple_df->decls_to_pointers->get (base);
+	  if (namep)
+	    {
+	      attrs.expr = unshare_expr (attrs.expr);
+	      tree *orig_base = &attrs.expr;
+	      while (handled_component_p (*orig_base))
+		orig_base = &TREE_OPERAND (*orig_base, 0);
+	      tree aptrt = reference_alias_ptr_type (*orig_base);
+	      *orig_base = build2 (MEM_REF, TREE_TYPE (*orig_base), *namep,
+				   build_int_cst (aptrt, 0));
+	    }
+	}
 /* Compute the alignment.  */
 unsigned int obj_align;
 unsigned HOST_WIDE_INT obj_bitpos;
 get_object_alignment_1 (t, &obj_align, &obj_bitpos);
 unsigned int diff_align = known_alignment (obj_bitpos - bitpos);
 rtx
 change_address (rtx memref, machine_mode mode, rtx addr)
 {
 rtx new_rtx = change_address_1 (memref, mode, addr, 1, false);
 machine_mode mmode = GET_MODE (new_rtx);
-struct mem_attrs *defattrs;
+class mem_attrs *defattrs;
 mem_attrs attrs (*get_mem_attrs (memref));
 defattrs = mode_mem_attrs[(int) mmode];
 attrs.expr = NULL_TREE;
 attrs.offset_known_p = false;
 		  poly_int64 size)
 {
 rtx addr = XEXP (memref, 0);
 rtx new_rtx;
 scalar_int_mode address_mode;
-struct mem_attrs attrs (*get_mem_attrs (memref)), *defattrs;
+class mem_attrs attrs (*get_mem_attrs (memref)), *defattrs;
 unsigned HOST_WIDE_INT max_align;
 #ifdef POINTERS_EXTEND_UNSIGNED
 scalar_int_mode pointer_mode
 = targetm.addr_space.pointer_mode (attrs.addrspace);
 #endif
 rtx
 offset_address (rtx memref, rtx offset, unsigned HOST_WIDE_INT pow2)
 {
 rtx new_rtx, addr = XEXP (memref, 0);
 machine_mode address_mode;
-struct mem_attrs *defattrs;
+class mem_attrs *defattrs;
 mem_attrs attrs (*get_mem_attrs (memref));
 address_mode = get_address_mode (memref);
 new_rtx = simplify_gen_binary (PLUS, address_mode, addr, offset);
 set_first_insn (first);
 set_last_insn (last);
 cur_insn_uid = 0;
-if (MIN_NONDEBUG_INSN_UID || MAY_HAVE_DEBUG_INSNS)
+if (param_min_nondebug_insn_uid || MAY_HAVE_DEBUG_INSNS)
 {
 int debug_count = 0;
-cur_insn_uid = MIN_NONDEBUG_INSN_UID - 1;
+cur_insn_uid = param_min_nondebug_insn_uid - 1;
 cur_debug_insn_uid = 0;
 for (insn = first; insn; insn = NEXT_INSN (insn))
-	if (INSN_UID (insn) < MIN_NONDEBUG_INSN_UID)
+	if (INSN_UID (insn) < param_min_nondebug_insn_uid)
 	  cur_debug_insn_uid = MAX (cur_debug_insn_uid, INSN_UID (insn));
 	else
 	  {
 	    cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
 	    if (DEBUG_INSN_P (insn))
 	      debug_count++;
 	  }
 if (debug_count)
-	cur_debug_insn_uid = MIN_NONDEBUG_INSN_UID + debug_count;
+	cur_debug_insn_uid = param_min_nondebug_insn_uid + debug_count;
 else
 	cur_debug_insn_uid++;
 }
 else
 for (insn = first; insn; insn = NEXT_INSN (insn))
 case SIMPLE_RETURN:
 case SCRATCH:
 /* SCRATCH must be shared because they represent distinct values.  */
 return;
 case CLOBBER:
-case CLOBBER_HIGH:
 /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
 clobbers or clobbers of hard registers that originated as pseudos.
 This is needed to allow safe register renaming.  */
 if (REG_P (XEXP (x, 0))
 	  && HARD_REGISTER_NUM_P (REGNO (XEXP (x, 0)))
 case SIMPLE_RETURN:
 case SCRATCH:
 /* SCRATCH must be shared because they represent distinct values.  */
 return;
 case CLOBBER:
-case CLOBBER_HIGH:
 /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
 clobbers or clobbers of hard registers that originated as pseudos.
 This is needed to allow safe register renaming.  */
 if (REG_P (XEXP (x, 0))
 	  && HARD_REGISTER_NUM_P (REGNO (XEXP (x, 0)))
 /* The table size must be stable across -g, to avoid codegen
 differences due to debug insns, and not be affected by
 -fmin-insn-uid, to avoid excessive table size and to simplify
 debugging of -fcompare-debug failures.  */
-if (cur_debug_insn_uid > MIN_NONDEBUG_INSN_UID)
+if (cur_debug_insn_uid > param_min_nondebug_insn_uid)
 n -= cur_debug_insn_uid;
 else
-n -= MIN_NONDEBUG_INSN_UID;
+n -= param_min_nondebug_insn_uid;
 return n;
 }
 		add_reg_note (insn, REG_NOTE_KIND (note), XEXP (note, 0));
 	    }
 	  break;
 	case REG_NON_LOCAL_GOTO:
+	case REG_LABEL_TARGET:
 	  for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
 	    {
 	      if (JUMP_P (insn))
 		add_reg_note (insn, REG_NOTE_KIND (note), XEXP (note, 0));
 	    }
 }
 before = PREV_INSN (trial);
 after = NEXT_INSN (trial);
-tem = emit_insn_after_setloc (seq, trial, INSN_LOCATION (trial));
+emit_insn_after_setloc (seq, trial, INSN_LOCATION (trial));
 delete_insn (trial);
 /* Recursively call try_split for each new insn created; by the
 time control returns here that insn will be fully split, so
 {
 rtx_debug_insn *insn;
 insn = as_a <rtx_debug_insn *> (rtx_alloc (DEBUG_INSN));
 INSN_UID (insn) = cur_debug_insn_uid++;
-if (cur_debug_insn_uid > MIN_NONDEBUG_INSN_UID)
+if (cur_debug_insn_uid > param_min_nondebug_insn_uid)
 INSN_UID (insn) = cur_insn_uid++;
 PATTERN (insn) = pattern;
 INSN_CODE (insn) = -1;
 REG_NOTES (insn) = NULL;
 case CC0:
 case RETURN:
 case SIMPLE_RETURN:
 return orig;
 case CLOBBER:
-case CLOBBER_HIGH:
 /* Share clobbers of hard registers (like cc0), but do not share pseudo reg
 clobbers or clobbers of hard registers that originated as pseudos.
 This is needed to allow safe register renaming.  */
 if (REG_P (XEXP (orig, 0))
 	  && HARD_REGISTER_NUM_P (REGNO (XEXP (orig, 0)))
 void
 init_emit (void)
 {
 set_first_insn (NULL);
 set_last_insn (NULL);
-if (MIN_NONDEBUG_INSN_UID)
+if (param_min_nondebug_insn_uid)
-cur_insn_uid = MIN_NONDEBUG_INSN_UID;
+cur_insn_uid = param_min_nondebug_insn_uid;
 else
 cur_insn_uid = 1;
 cur_debug_insn_uid = 1;
 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
 first_label_num = label_num;
 else
 return (hard_reg_clobbers[mode][regno] =
 	    gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (mode, regno)));
 }
-static GTY((deletable)) rtx
-hard_reg_clobbers_high[NUM_MACHINE_MODES][FIRST_PSEUDO_REGISTER];
-/* Return a CLOBBER_HIGH expression for register REGNO that clobbers MODE,
-caching into HARD_REG_CLOBBERS_HIGH.  */
-rtx
-gen_hard_reg_clobber_high (machine_mode mode, unsigned int regno)
-{
-if (hard_reg_clobbers_high[mode][regno])
-return hard_reg_clobbers_high[mode][regno];
-else
-return (hard_reg_clobbers_high[mode][regno]
-	    = gen_rtx_CLOBBER_HIGH (VOIDmode, gen_rtx_REG (mode, regno)));
-}
 location_t prologue_location;
 location_t epilogue_location;
 /* Hold current location information and last location information, so the
 datastructures are built lazily only when some instructions in given
 /* Get current location.  */
 location_t
 curr_insn_location (void)
 {
 return curr_location;
+}
+/* Set the location of the insn chain starting at INSN to LOC.  */
+void
+set_insn_locations (rtx_insn *insn, location_t loc)
+{
+while (insn)
+{
+if (INSN_P (insn))
+	INSN_LOCATION (insn) = loc;
+insn = NEXT_INSN (insn);
+}
 }
 /* Return lexical scope block insn belongs to.  */
 tree
 insn_scope (const rtx_insn *insn)

Mercurial > hg > CbC > CbC_gcc

comparison gcc/emit-rtl.c @ 145:1830386684a0