Mercurial > hg > CbC > CbC_gcc

comparison gcc/ira-costs.c @ 145:1830386684a0

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
gcc-9.2.0
author anatofuz
date Thu, 13 Feb 2020 11:34:05 +0900
parents 84e7813d76e9
children
comparison
equal deleted inserted replaced
131:84e7813d76e9 145:1830386684a0
1 /* IRA hard register and memory cost calculation for allocnos or pseudos. 1 /* IRA hard register and memory cost calculation for allocnos or pseudos.
2 Copyright (C) 2006-2018 Free Software Foundation, Inc. 2 Copyright (C) 2006-2020 Free Software Foundation, Inc.
3 Contributed by Vladimir Makarov <vmakarov@redhat.com>. 3 Contributed by Vladimir Makarov <vmakarov@redhat.com>.
4 4
5 This file is part of GCC. 5 This file is part of GCC.
6 6
7 GCC is free software; you can redistribute it and/or modify it under 7 GCC is free software; you can redistribute it and/or modify it under
235 /* Return a version of FULL that only considers registers in REGS that are 235 /* Return a version of FULL that only considers registers in REGS that are
236 valid for mode MODE. Both FULL and the returned class are globally 236 valid for mode MODE. Both FULL and the returned class are globally
237 allocated. */ 237 allocated. */
238 static cost_classes_t 238 static cost_classes_t
239 restrict_cost_classes (cost_classes_t full, machine_mode mode, 239 restrict_cost_classes (cost_classes_t full, machine_mode mode,
240 const HARD_REG_SET &regs) 240 const_hard_reg_set regs)
241 { 241 {
242 static struct cost_classes narrow; 242 static struct cost_classes narrow;
243 int map[N_REG_CLASSES]; 243 int map[N_REG_CLASSES];
244 narrow.num = 0; 244 narrow.num = 0;
245 for (int i = 0; i < full->num; i++) 245 for (int i = 0; i < full->num; i++)
252 if (!contains_reg_of_mode[cl][mode]) 252 if (!contains_reg_of_mode[cl][mode])
253 continue; 253 continue;
254 254
255 /* Calculate the set of registers in CL that belong to REGS and 255 /* Calculate the set of registers in CL that belong to REGS and
256 are valid for MODE. */ 256 are valid for MODE. */
257 HARD_REG_SET valid_for_cl; 257 HARD_REG_SET valid_for_cl = reg_class_contents[cl] & regs;
258 COPY_HARD_REG_SET (valid_for_cl, reg_class_contents[cl]); 258 valid_for_cl &= ~(ira_prohibited_class_mode_regs[cl][mode]
259 AND_HARD_REG_SET (valid_for_cl, regs); 259 | ira_no_alloc_regs);
260 AND_COMPL_HARD_REG_SET (valid_for_cl,
261 ira_prohibited_class_mode_regs[cl][mode]);
262 AND_COMPL_HARD_REG_SET (valid_for_cl, ira_no_alloc_regs);
263 if (hard_reg_set_empty_p (valid_for_cl)) 260 if (hard_reg_set_empty_p (valid_for_cl))
264 continue; 261 continue;
265 262
266 /* Don't use this class if the set of valid registers is a subset 263 /* Don't use this class if the set of valid registers is a subset
267 of an existing class. For example, suppose we have two classes 264 of an existing class. For example, suppose we have two classes
341 HARD_REG_SET temp, temp2; 338 HARD_REG_SET temp, temp2;
342 bool exclude_p; 339 bool exclude_p;
343 340
344 if ((classes_ptr = cost_classes_aclass_cache[aclass]) == NULL) 341 if ((classes_ptr = cost_classes_aclass_cache[aclass]) == NULL)
345 { 342 {
346 COPY_HARD_REG_SET (temp, reg_class_contents[aclass]); 343 temp = reg_class_contents[aclass] & ~ira_no_alloc_regs;
347 AND_COMPL_HARD_REG_SET (temp, ira_no_alloc_regs);
348 /* We exclude classes from consideration which are subsets of 344 /* We exclude classes from consideration which are subsets of
349 ACLASS only if ACLASS is an uniform class. */ 345 ACLASS only if ACLASS is an uniform class. */
350 exclude_p = ira_uniform_class_p[aclass]; 346 exclude_p = ira_uniform_class_p[aclass];
351 classes.num = 0; 347 classes.num = 0;
352 for (i = 0; i < ira_important_classes_num; i++) 348 for (i = 0; i < ira_important_classes_num; i++)
354 cl = ira_important_classes[i]; 350 cl = ira_important_classes[i];
355 if (exclude_p) 351 if (exclude_p)
356 { 352 {
357 /* Exclude non-uniform classes which are subsets of 353 /* Exclude non-uniform classes which are subsets of
358 ACLASS. */ 354 ACLASS. */
359 COPY_HARD_REG_SET (temp2, reg_class_contents[cl]); 355 temp2 = reg_class_contents[cl] & ~ira_no_alloc_regs;
360 AND_COMPL_HARD_REG_SET (temp2, ira_no_alloc_regs);
361 if (hard_reg_set_subset_p (temp2, temp) && cl != aclass) 356 if (hard_reg_set_subset_p (temp2, temp) && cl != aclass)
362 continue; 357 continue;
363 } 358 }
364 classes.classes[classes.num++] = cl; 359 classes.classes[classes.num++] = cl;
365 } 360 }
387 regno_cost_classes[regno] = classes_ptr; 382 regno_cost_classes[regno] = classes_ptr;
388 } 383 }
389 384
390 /* Setup cost classes for pseudo REGNO with MODE. Usage of MODE can 385 /* Setup cost classes for pseudo REGNO with MODE. Usage of MODE can
391 decrease number of cost classes for the pseudo, if hard registers 386 decrease number of cost classes for the pseudo, if hard registers
392 of some important classes can not hold a value of MODE. So the 387 of some important classes cannot hold a value of MODE. So the
393 pseudo can not get hard register of some important classes and cost 388 pseudo cannot get hard register of some important classes and cost
394 calculation for such important classes is only wasting CPU 389 calculation for such important classes is only wasting CPU
395 time. */ 390 time. */
396 static void 391 static void
397 setup_regno_cost_classes_by_mode (int regno, machine_mode mode) 392 setup_regno_cost_classes_by_mode (int regno, machine_mode mode)
398 { 393 {
1255 { 1250 {
1256 i = cost_classes[k]; 1251 i = cost_classes[k];
1257 add_cost = (move_in_cost[i][rclass] * scale) / 2; 1252 add_cost = (move_in_cost[i][rclass] * scale) / 2;
1258 if (INT_MAX - add_cost < pp_costs[k]) 1253 if (INT_MAX - add_cost < pp_costs[k])
1259 pp_costs[k] = INT_MAX; 1254 pp_costs[k] = INT_MAX;
1260 else 1255 else
1261 pp_costs[k] += add_cost; 1256 pp_costs[k] += add_cost;
1262 } 1257 }
1263 } 1258 }
1264 break; 1259 break;
1265 1260
1281 static void 1276 static void
1282 record_operand_costs (rtx_insn *insn, enum reg_class *pref) 1277 record_operand_costs (rtx_insn *insn, enum reg_class *pref)
1283 { 1278 {
1284 const char *constraints[MAX_RECOG_OPERANDS]; 1279 const char *constraints[MAX_RECOG_OPERANDS];
1285 machine_mode modes[MAX_RECOG_OPERANDS]; 1280 machine_mode modes[MAX_RECOG_OPERANDS];
1286 rtx ops[MAX_RECOG_OPERANDS];
1287 rtx set; 1281 rtx set;
1288 int i; 1282 int i;
1283
1284 if ((set = single_set (insn)) != NULL_RTX
1285 /* In rare cases the single set insn might have less 2 operands
1286 as the source can be a fixed special reg. */
1287 && recog_data.n_operands > 1
1288 && recog_data.operand[0] == SET_DEST (set)
1289 && recog_data.operand[1] == SET_SRC (set))
1290 {
1291 int regno, other_regno;
1292 rtx dest = SET_DEST (set);
1293 rtx src = SET_SRC (set);
1294
1295 if (GET_CODE (dest) == SUBREG
1296 && known_eq (GET_MODE_SIZE (GET_MODE (dest)),
1297 GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest)))))
1298 dest = SUBREG_REG (dest);
1299 if (GET_CODE (src) == SUBREG
1300 && known_eq (GET_MODE_SIZE (GET_MODE (src)),
1301 GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))))
1302 src = SUBREG_REG (src);
1303 if (REG_P (src) && REG_P (dest)
1304 && (((regno = REGNO (src)) >= FIRST_PSEUDO_REGISTER
1305 && (other_regno = REGNO (dest)) < FIRST_PSEUDO_REGISTER)
1306 || ((regno = REGNO (dest)) >= FIRST_PSEUDO_REGISTER
1307 && (other_regno = REGNO (src)) < FIRST_PSEUDO_REGISTER)))
1308 {
1309 machine_mode mode = GET_MODE (SET_SRC (set));
1310 cost_classes_t cost_classes_ptr = regno_cost_classes[regno];
1311 enum reg_class *cost_classes = cost_classes_ptr->classes;
1312 reg_class_t rclass, hard_reg_class, pref_class, bigger_hard_reg_class;
1313 int cost, k;
1314 move_table *move_costs;
1315 bool dead_p = find_regno_note (insn, REG_DEAD, REGNO (src));
1316
1317 ira_init_register_move_cost_if_necessary (mode);
1318 move_costs = ira_register_move_cost[mode];
1319 hard_reg_class = REGNO_REG_CLASS (other_regno);
1320 bigger_hard_reg_class = ira_pressure_class_translate[hard_reg_class];
1321 /* Target code may return any cost for mode which does not
1322 fit the the hard reg class (e.g. DImode for AREG on
1323 i386). Check this and use a bigger class to get the
1324 right cost. */
1325 if (bigger_hard_reg_class != NO_REGS
1326 && ! ira_hard_reg_in_set_p (other_regno, mode,
1327 reg_class_contents[hard_reg_class]))
1328 hard_reg_class = bigger_hard_reg_class;
1329 i = regno == (int) REGNO (src) ? 1 : 0;
1330 for (k = cost_classes_ptr->num - 1; k >= 0; k--)
1331 {
1332 rclass = cost_classes[k];
1333 cost = (i == 0
1334 ? move_costs[hard_reg_class][rclass]
1335 : move_costs[rclass][hard_reg_class]);
1336
1337 op_costs[i]->cost[k] = cost * frequency;
1338 /* If we have assigned a class to this allocno in our
1339 first pass, add a cost to this alternative
1340 corresponding to what we would add if this allocno
1341 were not in the appropriate class. */
1342 if (pref)
1343 {
1344 if ((pref_class = pref[COST_INDEX (regno)]) == NO_REGS)
1345 op_costs[i]->cost[k]
1346 += ((i == 0 ? ira_memory_move_cost[mode][rclass][0] : 0)
1347 + (i == 1 ? ira_memory_move_cost[mode][rclass][1] : 0)
1348 * frequency);
1349 else if (ira_reg_class_intersect[pref_class][rclass]
1350 == NO_REGS)
1351 op_costs[i]->cost[k]
1352 += (move_costs[pref_class][rclass]
1353 * frequency);
1354 }
1355 /* If this insn is a single set copying operand 1 to
1356 operand 0 and one operand is an allocno with the
1357 other a hard reg or an allocno that prefers a hard
1358 register that is in its own register class then we
1359 may want to adjust the cost of that register class to
1360 -1.
1361
1362 Avoid the adjustment if the source does not die to
1363 avoid stressing of register allocator by preferencing
1364 two colliding registers into single class. */
1365 if (dead_p
1366 && TEST_HARD_REG_BIT (reg_class_contents[rclass], other_regno)
1367 && (reg_class_size[(int) rclass]
1368 == (ira_reg_class_max_nregs
1369 [(int) rclass][(int) GET_MODE(src)])))
1370 {
1371 if (reg_class_size[rclass] == 1)
1372 op_costs[i]->cost[k] = -frequency;
1373 else if (in_hard_reg_set_p (reg_class_contents[rclass],
1374 GET_MODE(src), other_regno))
1375 op_costs[i]->cost[k] = -frequency;
1376 }
1377 }
1378 op_costs[i]->mem_cost
1379 = ira_memory_move_cost[mode][hard_reg_class][i] * frequency;
1380 if (pref && (pref_class = pref[COST_INDEX (regno)]) != NO_REGS)
1381 op_costs[i]->mem_cost
1382 += ira_memory_move_cost[mode][pref_class][i] * frequency;
1383 return;
1384 }
1385 }
1289 1386
1290 for (i = 0; i < recog_data.n_operands; i++) 1387 for (i = 0; i < recog_data.n_operands; i++)
1291 { 1388 {
1292 constraints[i] = recog_data.constraints[i]; 1389 constraints[i] = recog_data.constraints[i];
1293 modes[i] = recog_data.operand_mode[i]; 1390 modes[i] = recog_data.operand_mode[i];
1300 commutative. */ 1397 commutative. */
1301 for (i = 0; i < recog_data.n_operands; i++) 1398 for (i = 0; i < recog_data.n_operands; i++)
1302 { 1399 {
1303 memcpy (op_costs[i], init_cost, struct_costs_size); 1400 memcpy (op_costs[i], init_cost, struct_costs_size);
1304 1401
1305 ops[i] = recog_data.operand[i];
1306 if (GET_CODE (recog_data.operand[i]) == SUBREG) 1402 if (GET_CODE (recog_data.operand[i]) == SUBREG)
1307 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]); 1403 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
1308 1404
1309 if (MEM_P (recog_data.operand[i])) 1405 if (MEM_P (recog_data.operand[i]))
1310 record_address_regs (GET_MODE (recog_data.operand[i]), 1406 record_address_regs (GET_MODE (recog_data.operand[i]),
1316 (lookup_constraint (constraints[i])))) 1412 (lookup_constraint (constraints[i]))))
1317 record_address_regs (VOIDmode, ADDR_SPACE_GENERIC, 1413 record_address_regs (VOIDmode, ADDR_SPACE_GENERIC,
1318 recog_data.operand[i], 0, ADDRESS, SCRATCH, 1414 recog_data.operand[i], 0, ADDRESS, SCRATCH,
1319 frequency * 2); 1415 frequency * 2);
1320 } 1416 }
1321 1417
1322 /* Check for commutative in a separate loop so everything will have 1418 /* Check for commutative in a separate loop so everything will have
1323 been initialized. We must do this even if one operand is a 1419 been initialized. We must do this even if one operand is a
1324 constant--see addsi3 in m68k.md. */ 1420 constant--see addsi3 in m68k.md. */
1325 for (i = 0; i < (int) recog_data.n_operands - 1; i++) 1421 for (i = 0; i < (int) recog_data.n_operands - 1; i++)
1326 if (constraints[i][0] == '%') 1422 if (constraints[i][0] == '%')
1327 { 1423 {
1328 const char *xconstraints[MAX_RECOG_OPERANDS]; 1424 const char *xconstraints[MAX_RECOG_OPERANDS];
1329 int j; 1425 int j;
1330 1426
1331 /* Handle commutative operands by swapping the constraints. 1427 /* Handle commutative operands by swapping the
1332 We assume the modes are the same. */ 1428 constraints. We assume the modes are the same. */
1333 for (j = 0; j < recog_data.n_operands; j++) 1429 for (j = 0; j < recog_data.n_operands; j++)
1334 xconstraints[j] = constraints[j]; 1430 xconstraints[j] = constraints[j];
1335 1431
1336 xconstraints[i] = constraints[i+1]; 1432 xconstraints[i] = constraints[i+1];
1337 xconstraints[i+1] = constraints[i]; 1433 xconstraints[i+1] = constraints[i];
1340 xconstraints, insn, pref); 1436 xconstraints, insn, pref);
1341 } 1437 }
1342 record_reg_classes (recog_data.n_alternatives, recog_data.n_operands, 1438 record_reg_classes (recog_data.n_alternatives, recog_data.n_operands,
1343 recog_data.operand, modes, 1439 recog_data.operand, modes,
1344 constraints, insn, pref); 1440 constraints, insn, pref);
1345
1346 /* If this insn is a single set copying operand 1 to operand 0 and
1347 one operand is an allocno with the other a hard reg or an allocno
1348 that prefers a hard register that is in its own register class
1349 then we may want to adjust the cost of that register class to -1.
1350
1351 Avoid the adjustment if the source does not die to avoid
1352 stressing of register allocator by preferencing two colliding
1353 registers into single class.
1354
1355 Also avoid the adjustment if a copy between hard registers of the
1356 class is expensive (ten times the cost of a default copy is
1357 considered arbitrarily expensive). This avoids losing when the
1358 preferred class is very expensive as the source of a copy
1359 instruction. */
1360 if ((set = single_set (insn)) != NULL_RTX
1361 /* In rare cases the single set insn might have less 2 operands
1362 as the source can be a fixed special reg. */
1363 && recog_data.n_operands > 1
1364 && ops[0] == SET_DEST (set) && ops[1] == SET_SRC (set))
1365 {
1366 int regno, other_regno;
1367 rtx dest = SET_DEST (set);
1368 rtx src = SET_SRC (set);
1369
1370 if (GET_CODE (dest) == SUBREG
1371 && known_eq (GET_MODE_SIZE (GET_MODE (dest)),
1372 GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest)))))
1373 dest = SUBREG_REG (dest);
1374 if (GET_CODE (src) == SUBREG
1375 && known_eq (GET_MODE_SIZE (GET_MODE (src)),
1376 GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))))
1377 src = SUBREG_REG (src);
1378 if (REG_P (src) && REG_P (dest)
1379 && find_regno_note (insn, REG_DEAD, REGNO (src))
1380 && (((regno = REGNO (src)) >= FIRST_PSEUDO_REGISTER
1381 && (other_regno = REGNO (dest)) < FIRST_PSEUDO_REGISTER)
1382 || ((regno = REGNO (dest)) >= FIRST_PSEUDO_REGISTER
1383 && (other_regno = REGNO (src)) < FIRST_PSEUDO_REGISTER)))
1384 {
1385 machine_mode mode = GET_MODE (src);
1386 cost_classes_t cost_classes_ptr = regno_cost_classes[regno];
1387 enum reg_class *cost_classes = cost_classes_ptr->classes;
1388 reg_class_t rclass;
1389 int k;
1390
1391 i = regno == (int) REGNO (src) ? 1 : 0;
1392 for (k = cost_classes_ptr->num - 1; k >= 0; k--)
1393 {
1394 rclass = cost_classes[k];
1395 if (TEST_HARD_REG_BIT (reg_class_contents[rclass], other_regno)
1396 && (reg_class_size[(int) rclass]
1397 == ira_reg_class_max_nregs [(int) rclass][(int) mode]))
1398 {
1399 if (reg_class_size[rclass] == 1)
1400 op_costs[i]->cost[k] = -frequency;
1401 else if (in_hard_reg_set_p (reg_class_contents[rclass],
1402 mode, other_regno))
1403 op_costs[i]->cost[k] = -frequency;
1404 }
1405 }
1406 }
1407 }
1408 } 1441 }
1409 1442
1410 1443
1411 1444
1412 /* Process one insn INSN. Scan it and record each time it would save 1445 /* Process one insn INSN. Scan it and record each time it would save
1442 && have_regs_of_mode[GET_MODE (x)]) 1475 && have_regs_of_mode[GET_MODE (x)])
1443 ira_init_register_move_cost_if_necessary (GET_MODE (x)); 1476 ira_init_register_move_cost_if_necessary (GET_MODE (x));
1444 return insn; 1477 return insn;
1445 } 1478 }
1446 1479
1447 if (pat_code == CLOBBER_HIGH)
1448 {
1449 gcc_assert (REG_P (XEXP (PATTERN (insn), 0))
1450 && HARD_REGISTER_P (XEXP (PATTERN (insn), 0)));
1451 return insn;
1452 }
1453
1454 counted_mem = false; 1480 counted_mem = false;
1455 set = single_set (insn); 1481 set = single_set (insn);
1456 extract_insn (insn); 1482 extract_insn (insn);
1457 1483
1458 /* If this insn loads a parameter from its stack slot, then it 1484 /* If this insn loads a parameter from its stack slot, then it
1459 represents a savings, rather than a cost, if the parameter is 1485 represents a savings, rather than a cost, if the parameter is
1460 stored in memory. Record this fact. 1486 stored in memory. Record this fact.
1461 1487
1462 Similarly if we're loading other constants from memory (constant 1488 Similarly if we're loading other constants from memory (constant
1463 pool, TOC references, small data areas, etc) and this is the only 1489 pool, TOC references, small data areas, etc) and this is the only
1464 assignment to the destination pseudo. 1490 assignment to the destination pseudo.
1465 1491
1466 Don't do this if SET_SRC (set) isn't a general operand, if it is 1492 Don't do this if SET_SRC (set) isn't a general operand, if it is
1467 a memory requiring special instructions to load it, decreasing 1493 a memory requiring special instructions to load it, decreasing
1468 mem_cost might result in it being loaded using the specialized 1494 mem_cost might result in it being loaded using the specialized
1469 instruction into a register, then stored into stack and loaded 1495 instruction into a register, then stored into stack and loaded
1470 again from the stack. See PR52208. 1496 again from the stack. See PR52208.
1471 1497
1472 Don't do this if SET_SRC (set) has side effect. See PR56124. */ 1498 Don't do this if SET_SRC (set) has side effect. See PR56124. */
1473 if (set != 0 && REG_P (SET_DEST (set)) && MEM_P (SET_SRC (set)) 1499 if (set != 0 && REG_P (SET_DEST (set)) && MEM_P (SET_SRC (set))
1474 && (note = find_reg_note (insn, REG_EQUIV, NULL_RTX)) != NULL_RTX 1500 && (note = find_reg_note (insn, REG_EQUIV, NULL_RTX)) != NULL_RTX
1475 && ((MEM_P (XEXP (note, 0)) 1501 && ((MEM_P (XEXP (note, 0))
1476 && !side_effects_p (SET_SRC (set))) 1502 && !side_effects_p (SET_SRC (set)))
1499 record_operand_costs (insn, pref); 1525 record_operand_costs (insn, pref);
1500 1526
1501 /* Now add the cost for each operand to the total costs for its 1527 /* Now add the cost for each operand to the total costs for its
1502 allocno. */ 1528 allocno. */
1503 for (i = 0; i < recog_data.n_operands; i++) 1529 for (i = 0; i < recog_data.n_operands; i++)
1504 if (REG_P (recog_data.operand[i]) 1530 {
1505 && REGNO (recog_data.operand[i]) >= FIRST_PSEUDO_REGISTER) 1531 rtx op = recog_data.operand[i];
1506 { 1532
1507 int regno = REGNO (recog_data.operand[i]); 1533 if (GET_CODE (op) == SUBREG)
1508 struct costs *p = COSTS (costs, COST_INDEX (regno)); 1534 op = SUBREG_REG (op);
1509 struct costs *q = op_costs[i]; 1535 if (REG_P (op) && REGNO (op) >= FIRST_PSEUDO_REGISTER)
1510 int *p_costs = p->cost, *q_costs = q->cost; 1536 {
1511 cost_classes_t cost_classes_ptr = regno_cost_classes[regno]; 1537 int regno = REGNO (op);
1512 int add_cost; 1538 struct costs *p = COSTS (costs, COST_INDEX (regno));
1513 1539 struct costs *q = op_costs[i];
1514 /* If the already accounted for the memory "cost" above, don't 1540 int *p_costs = p->cost, *q_costs = q->cost;
1515 do so again. */ 1541 cost_classes_t cost_classes_ptr = regno_cost_classes[regno];
1516 if (!counted_mem) 1542 int add_cost;
1517 { 1543
1518 add_cost = q->mem_cost; 1544 /* If the already accounted for the memory "cost" above, don't
1519 if (add_cost > 0 && INT_MAX - add_cost < p->mem_cost) 1545 do so again. */
1520 p->mem_cost = INT_MAX; 1546 if (!counted_mem)
1521 else 1547 {
1522 p->mem_cost += add_cost; 1548 add_cost = q->mem_cost;
1523 } 1549 if (add_cost > 0 && INT_MAX - add_cost < p->mem_cost)
1524 for (k = cost_classes_ptr->num - 1; k >= 0; k--) 1550 p->mem_cost = INT_MAX;
1525 { 1551 else
1526 add_cost = q_costs[k]; 1552 p->mem_cost += add_cost;
1527 if (add_cost > 0 && INT_MAX - add_cost < p_costs[k]) 1553 }
1528 p_costs[k] = INT_MAX; 1554 for (k = cost_classes_ptr->num - 1; k >= 0; k--)
1529 else 1555 {
1530 p_costs[k] += add_cost; 1556 add_cost = q_costs[k];
1531 } 1557 if (add_cost > 0 && INT_MAX - add_cost < p_costs[k])
1532 } 1558 p_costs[k] = INT_MAX;
1533 1559 else
1560 p_costs[k] += add_cost;
1561 }
1562 }
1563 }
1534 return insn; 1564 return insn;
1535 } 1565 }
1536 1566
1537 1567
1538 1568
1764 for (a = ira_regno_allocno_map[i]; 1794 for (a = ira_regno_allocno_map[i];
1765 a != NULL; 1795 a != NULL;
1766 a = ALLOCNO_NEXT_REGNO_ALLOCNO (a)) 1796 a = ALLOCNO_NEXT_REGNO_ALLOCNO (a))
1767 { 1797 {
1768 int *a_costs, *p_costs; 1798 int *a_costs, *p_costs;
1769 1799
1770 a_num = ALLOCNO_NUM (a); 1800 a_num = ALLOCNO_NUM (a);
1771 if ((flag_ira_region == IRA_REGION_ALL 1801 if ((flag_ira_region == IRA_REGION_ALL
1772 || flag_ira_region == IRA_REGION_MIXED) 1802 || flag_ira_region == IRA_REGION_MIXED)
1773 && (parent = ALLOCNO_LOOP_TREE_NODE (a)->parent) != NULL 1803 && (parent = ALLOCNO_LOOP_TREE_NODE (a)->parent) != NULL
1774 && (parent_a = parent->regno_allocno_map[i]) != NULL 1804 && (parent_a = parent->regno_allocno_map[i]) != NULL
1934 { 1964 {
1935 enum reg_class aclass = regno_aclass[i]; 1965 enum reg_class aclass = regno_aclass[i];
1936 int a_num = ALLOCNO_NUM (a); 1966 int a_num = ALLOCNO_NUM (a);
1937 int *total_a_costs = COSTS (total_allocno_costs, a_num)->cost; 1967 int *total_a_costs = COSTS (total_allocno_costs, a_num)->cost;
1938 int *a_costs = COSTS (costs, a_num)->cost; 1968 int *a_costs = COSTS (costs, a_num)->cost;
1939 1969
1940 if (aclass == NO_REGS) 1970 if (aclass == NO_REGS)
1941 best = NO_REGS; 1971 best = NO_REGS;
1942 else 1972 else
1943 { 1973 {
1944 /* Finding best class which is subset of the common 1974 /* Finding best class which is subset of the common
1996 if (ira_class_subset_p[cost_classes[k]][best]) 2026 if (ira_class_subset_p[cost_classes[k]][best])
1997 a_costs[k] = a_costs[ind]; 2027 a_costs[k] = a_costs[ind];
1998 } 2028 }
1999 } 2029 }
2000 } 2030 }
2001 2031
2002 if (internal_flag_ira_verbose > 4 && dump_file) 2032 if (internal_flag_ira_verbose > 4 && dump_file)
2003 { 2033 {
2004 if (allocno_p) 2034 if (allocno_p)
2005 print_allocno_costs (dump_file); 2035 print_allocno_costs (dump_file);
2006 else 2036 else
2063 a = ira_curr_regno_allocno_map[src_regno]; 2093 a = ira_curr_regno_allocno_map[src_regno];
2064 to_p = false; 2094 to_p = false;
2065 } 2095 }
2066 else 2096 else
2067 continue; 2097 continue;
2098 if (reg_class_size[(int) REGNO_REG_CLASS (hard_regno)]
2099 == (ira_reg_class_max_nregs
2100 [REGNO_REG_CLASS (hard_regno)][(int) ALLOCNO_MODE(a)]))
2101 /* If the class can provide only one hard reg to the allocno,
2102 we processed the insn record_operand_costs already and we
2103 actually updated the hard reg cost there. */
2104 continue;
2068 rclass = ALLOCNO_CLASS (a); 2105 rclass = ALLOCNO_CLASS (a);
2069 if (! TEST_HARD_REG_BIT (reg_class_contents[rclass], hard_regno)) 2106 if (! TEST_HARD_REG_BIT (reg_class_contents[rclass], hard_regno))
2070 continue; 2107 continue;
2071 i = ira_class_hard_reg_index[rclass][hard_regno]; 2108 i = ira_class_hard_reg_index[rclass][hard_regno];
2072 if (i < 0) 2109 if (i < 0)
2079 ira_add_allocno_pref (curr_a, hard_regno, freq); 2116 ira_add_allocno_pref (curr_a, hard_regno, freq);
2080 { 2117 {
2081 int cost; 2118 int cost;
2082 enum reg_class hard_reg_class; 2119 enum reg_class hard_reg_class;
2083 machine_mode mode; 2120 machine_mode mode;
2084 2121
2085 mode = ALLOCNO_MODE (a); 2122 mode = ALLOCNO_MODE (a);
2086 hard_reg_class = REGNO_REG_CLASS (hard_regno); 2123 hard_reg_class = REGNO_REG_CLASS (hard_regno);
2087 ira_init_register_move_cost_if_necessary (mode); 2124 ira_init_register_move_cost_if_necessary (mode);
2088 cost = (to_p ? ira_register_move_cost[mode][hard_reg_class][rclass] 2125 cost = (to_p ? ira_register_move_cost[mode][hard_reg_class][rclass]
2089 : ira_register_move_cost[mode][rclass][hard_reg_class]) * freq; 2126 : ira_register_move_cost[mode][rclass][hard_reg_class]) * freq;
2294 ira_allocno_t a; 2331 ira_allocno_t a;
2295 ira_allocno_iterator ai; 2332 ira_allocno_iterator ai;
2296 ira_allocno_object_iterator oi; 2333 ira_allocno_object_iterator oi;
2297 ira_object_t obj; 2334 ira_object_t obj;
2298 bool skip_p; 2335 bool skip_p;
2299 HARD_REG_SET *crossed_calls_clobber_regs;
2300 2336
2301 FOR_EACH_ALLOCNO (a, ai) 2337 FOR_EACH_ALLOCNO (a, ai)
2302 { 2338 {
2303 aclass = ALLOCNO_CLASS (a); 2339 aclass = ALLOCNO_CLASS (a);
2304 if (aclass == NO_REGS) 2340 if (aclass == NO_REGS)
2329 } 2365 }
2330 if (skip_p) 2366 if (skip_p)
2331 continue; 2367 continue;
2332 rclass = REGNO_REG_CLASS (regno); 2368 rclass = REGNO_REG_CLASS (regno);
2333 cost = 0; 2369 cost = 0;
2334 crossed_calls_clobber_regs 2370 if (ira_need_caller_save_p (a, regno))
2335 = &(ALLOCNO_CROSSED_CALLS_CLOBBERED_REGS (a));
2336 if (ira_hard_reg_set_intersection_p (regno, mode,
2337 *crossed_calls_clobber_regs)
2338 && (ira_hard_reg_set_intersection_p (regno, mode,
2339 call_used_reg_set)
2340 || targetm.hard_regno_call_part_clobbered (regno,
2341 mode)))
2342 cost += (ALLOCNO_CALL_FREQ (a) 2371 cost += (ALLOCNO_CALL_FREQ (a)
2343 * (ira_memory_move_cost[mode][rclass][0] 2372 * (ira_memory_move_cost[mode][rclass][0]
2344 + ira_memory_move_cost[mode][rclass][1])); 2373 + ira_memory_move_cost[mode][rclass][1]));
2345 #ifdef IRA_HARD_REGNO_ADD_COST_MULTIPLIER 2374 #ifdef IRA_HARD_REGNO_ADD_COST_MULTIPLIER
2346 cost += ((ira_memory_move_cost[mode][rclass][0] 2375 cost += ((ira_memory_move_cost[mode][rclass][0]