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comparison gcc/ddg.c @ 69:1b10fe6932e1

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merge 69
author Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
date Sun, 21 Aug 2011 07:53:12 +0900
parents f6334be47118
children 04ced10e8804
comparison
equal deleted inserted replaced
66:b362627d71ba 69:1b10fe6932e1
1 /* DDG - Data Dependence Graph implementation. 1 /* DDG - Data Dependence Graph implementation.
2 Copyright (C) 2004, 2005, 2006, 2007, 2008, 2009 2 Copyright (C) 2004, 2005, 2006, 2007, 2008, 2009, 2010
3 Free Software Foundation, Inc. 3 Free Software Foundation, Inc.
4 Contributed by Ayal Zaks and Mustafa Hagog <zaks,mustafa@il.ibm.com> 4 Contributed by Ayal Zaks and Mustafa Hagog <zaks,mustafa@il.ibm.com>
5 5
6 This file is part of GCC. 6 This file is part of GCC.
7 7
22 22
23 #include "config.h" 23 #include "config.h"
24 #include "system.h" 24 #include "system.h"
25 #include "coretypes.h" 25 #include "coretypes.h"
26 #include "tm.h" 26 #include "tm.h"
27 #include "toplev.h" 27 #include "diagnostic-core.h"
28 #include "rtl.h" 28 #include "rtl.h"
29 #include "tm_p.h" 29 #include "tm_p.h"
30 #include "hard-reg-set.h" 30 #include "hard-reg-set.h"
31 #include "regs.h" 31 #include "regs.h"
32 #include "function.h" 32 #include "function.h"
190 struct df_rd_bb_info *bb_info = DF_RD_BB_INFO (g->bb); 190 struct df_rd_bb_info *bb_info = DF_RD_BB_INFO (g->bb);
191 191
192 first_def = df_bb_regno_first_def_find (g->bb, regno); 192 first_def = df_bb_regno_first_def_find (g->bb, regno);
193 gcc_assert (first_def); 193 gcc_assert (first_def);
194 194
195 if (bitmap_bit_p (bb_info->gen, DF_REF_ID (first_def))) 195 if (bitmap_bit_p (&bb_info->gen, DF_REF_ID (first_def)))
196 return; 196 return;
197 } 197 }
198 } 198 }
199 199
200 latency = dep_cost (link); 200 latency = dep_cost (link);
261 gcc_assert (last_def_node); 261 gcc_assert (last_def_node);
262 gcc_assert (first_def); 262 gcc_assert (first_def);
263 263
264 #ifdef ENABLE_CHECKING 264 #ifdef ENABLE_CHECKING
265 if (DF_REF_ID (last_def) != DF_REF_ID (first_def)) 265 if (DF_REF_ID (last_def) != DF_REF_ID (first_def))
266 gcc_assert (!bitmap_bit_p (bb_info->gen, DF_REF_ID (first_def))); 266 gcc_assert (!bitmap_bit_p (&bb_info->gen,
267 DF_REF_ID (first_def)));
267 #endif 268 #endif
268 269
269 /* Create inter-loop true dependences and anti dependences. */ 270 /* Create inter-loop true dependences and anti dependences. */
270 for (r_use = DF_REF_CHAIN (last_def); r_use != NULL; r_use = r_use->next) 271 for (r_use = DF_REF_CHAIN (last_def); r_use != NULL; r_use = r_use->next)
271 { 272 {
336 bitmap_iterator bi; 337 bitmap_iterator bi;
337 338
338 rd_bb_info = DF_RD_BB_INFO (g->bb); 339 rd_bb_info = DF_RD_BB_INFO (g->bb);
339 340
340 /* Find inter-loop register output, true and anti deps. */ 341 /* Find inter-loop register output, true and anti deps. */
341 EXECUTE_IF_SET_IN_BITMAP (rd_bb_info->gen, 0, rd_num, bi) 342 EXECUTE_IF_SET_IN_BITMAP (&rd_bb_info->gen, 0, rd_num, bi)
342 { 343 {
343 df_ref rd = DF_DEFS_GET (rd_num); 344 df_ref rd = DF_DEFS_GET (rd_num);
344 345
345 add_cross_iteration_register_deps (g, rd); 346 add_cross_iteration_register_deps (g, rd);
346 } 347 }
347 } 348 }
348 349
349 350
351 static int
352 walk_mems_2 (rtx *x, rtx mem)
353 {
354 if (MEM_P (*x))
355 {
356 if (may_alias_p (*x, mem))
357 return 1;
358
359 return -1;
360 }
361 return 0;
362 }
363
364 static int
365 walk_mems_1 (rtx *x, rtx *pat)
366 {
367 if (MEM_P (*x))
368 {
369 /* Visit all MEMs in *PAT and check indepedence. */
370 if (for_each_rtx (pat, (rtx_function) walk_mems_2, *x))
371 /* Indicate that dependence was determined and stop traversal. */
372 return 1;
373
374 return -1;
375 }
376 return 0;
377 }
378
379 /* Return 1 if two specified instructions have mem expr with conflict alias sets*/
380 static int
381 insns_may_alias_p (rtx insn1, rtx insn2)
382 {
383 /* For each pair of MEMs in INSN1 and INSN2 check their independence. */
384 return for_each_rtx (&PATTERN (insn1), (rtx_function) walk_mems_1,
385 &PATTERN (insn2));
386 }
387
350 /* Given two nodes, analyze their RTL insns and add inter-loop mem deps 388 /* Given two nodes, analyze their RTL insns and add inter-loop mem deps
351 to ddg G. */ 389 to ddg G. */
352 static void 390 static void
353 add_inter_loop_mem_dep (ddg_ptr g, ddg_node_ptr from, ddg_node_ptr to) 391 add_inter_loop_mem_dep (ddg_ptr g, ddg_node_ptr from, ddg_node_ptr to)
354 { 392 {
355 if (!insn_alias_sets_conflict_p (from->insn, to->insn)) 393 if (!insns_may_alias_p (from->insn, to->insn))
356 /* Do not create edge if memory references have disjoint alias sets. */ 394 /* Do not create edge if memory references have disjoint alias sets. */
357 return; 395 return;
358 396
359 if (mem_write_insn_p (from->insn)) 397 if (mem_write_insn_p (from->insn))
360 { 398 {
388 static void 426 static void
389 build_intra_loop_deps (ddg_ptr g) 427 build_intra_loop_deps (ddg_ptr g)
390 { 428 {
391 int i; 429 int i;
392 /* Hold the dependency analysis state during dependency calculations. */ 430 /* Hold the dependency analysis state during dependency calculations. */
393 struct deps tmp_deps; 431 struct deps_desc tmp_deps;
394 rtx head, tail; 432 rtx head, tail;
395 433
396 /* Build the dependence information, using the sched_analyze function. */ 434 /* Build the dependence information, using the sched_analyze function. */
397 init_deps_global (); 435 init_deps_global ();
398 init_deps (&tmp_deps, false); 436 init_deps (&tmp_deps, false);
485 } 523 }
486 num_nodes++; 524 num_nodes++;
487 } 525 }
488 526
489 /* There is nothing to do for this BB. */ 527 /* There is nothing to do for this BB. */
490 if (num_nodes <= 1) 528 if ((num_nodes - g->num_debug) <= 1)
491 { 529 {
492 free (g); 530 free (g);
493 return NULL; 531 return NULL;
494 } 532 }
495 533