comparison gcc/testsuite/gcc.target/powerpc/vec-strir_p-11.c @ 152:2b5abeee2509

update gcc11
author anatofuz
date Mon, 25 May 2020 07:50:57 +0900
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145:1830386684a0 152:2b5abeee2509
1 /* { dg-do compile } */
2 /* { dg-options "-mdejagnu-cpu=future" } */
3
4 #include <altivec.h>
5
6 extern void abort (void);
7
8 int main (int argc, short *argv [])
9 {
10 vector signed short input1 =
11 { 0x1, 0x3, 0x5, 0x7, 0x9, 0xb, 0xd, 0xf };
12 vector signed short input2 =
13 { 0x1, 0x0, 0x5, 0x7, 0x9, 0xb, 0xd, 0xf };
14 vector signed short input3 =
15 { 0x1, 0x0, 0x5, 0x7, 0x9, 0xb, 0xd, 0x0 };
16 vector signed short input4 =
17 { 0x1, 0x3, 0x5, 0x7, 0x9, 0xb, 0xd, 0x0 };
18
19 if (vec_strir_p (input1))
20 abort ();
21 if (!vec_strir_p (input2))
22 abort ();
23 if (!vec_strir_p (input3))
24 abort ();
25 if (!vec_strir_p (input4))
26 abort ();
27
28 }
29
30 /* Enforce that exactly four dot-form instructions which are properly biased
31 for the target's endianness implement this built-in. */
32
33 /* { dg-final { scan-assembler-times {\mvstrihr\.} 4 { target { be } } } } */
34 /* { dg-final { scan-assembler-times {\mvstrihr\M[^.]} 0 { target { be } } } } */
35 /* { dg-final { scan-assembler-times {\mvstrihl} 0 { target { be } } } } */
36 /* { dg-final { scan-assembler-times {\mvstrihl\.} 4 { target { le } } } } */
37 /* { dg-final { scan-assembler-times {\mvstrihl\M[^.]} 0 { target { le } } } } */
38 /* { dg-final { scan-assembler-times {\mvstrihr} 0 { target { le } } } } */