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comparison gcc/config/mips/mips.c @ 47:3bfb6c00c1e0

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update it from 4.4.2 to 4.4.3.
author kent <kent@cr.ie.u-ryukyu.ac.jp>
date Sun, 07 Feb 2010 17:44:34 +0900
parents 855418dad1a3
children 77e2b8dfacca
comparison
equal deleted inserted replaced
46:b85a337e5837 47:3bfb6c00c1e0
2326 return (can_create_pseudo_p () 2326 return (can_create_pseudo_p ()
2327 ? emit_move_insn (dest, src) 2327 ? emit_move_insn (dest, src)
2328 : emit_move_insn_1 (dest, src)); 2328 : emit_move_insn_1 (dest, src));
2329 } 2329 }
2330 2330
2331 /* Emit an instruction of the form (set TARGET (CODE OP0)). */
2332
2333 static void
2334 mips_emit_unary (enum rtx_code code, rtx target, rtx op0)
2335 {
2336 emit_insn (gen_rtx_SET (VOIDmode, target,
2337 gen_rtx_fmt_e (code, GET_MODE (op0), op0)));
2338 }
2339
2340 /* Compute (CODE OP0) and store the result in a new register of mode MODE.
2341 Return that new register. */
2342
2343 static rtx
2344 mips_force_unary (enum machine_mode mode, enum rtx_code code, rtx op0)
2345 {
2346 rtx reg;
2347
2348 reg = gen_reg_rtx (mode);
2349 mips_emit_unary (code, reg, op0);
2350 return reg;
2351 }
2352
2331 /* Emit an instruction of the form (set TARGET (CODE OP0 OP1)). */ 2353 /* Emit an instruction of the form (set TARGET (CODE OP0 OP1)). */
2332 2354
2333 static void 2355 static void
2334 mips_emit_binary (enum rtx_code code, rtx target, rtx op0, rtx op1) 2356 mips_emit_binary (enum rtx_code code, rtx target, rtx op0, rtx op1)
2335 { 2357 {
6397 /* Expand a loop of synci insns for the address range [BEGIN, END). */ 6419 /* Expand a loop of synci insns for the address range [BEGIN, END). */
6398 6420
6399 void 6421 void
6400 mips_expand_synci_loop (rtx begin, rtx end) 6422 mips_expand_synci_loop (rtx begin, rtx end)
6401 { 6423 {
6402 rtx inc, label, cmp, cmp_result; 6424 rtx inc, label, end_label, cmp_result, mask, length;
6425
6426 /* Create end_label. */
6427 end_label = gen_label_rtx ();
6428
6429 /* Check if begin equals end. */
6430 cmp_result = gen_rtx_EQ (VOIDmode, begin, end);
6431 emit_jump_insn (gen_condjump (cmp_result, end_label));
6403 6432
6404 /* Load INC with the cache line size (rdhwr INC,$1). */ 6433 /* Load INC with the cache line size (rdhwr INC,$1). */
6405 inc = gen_reg_rtx (Pmode); 6434 inc = gen_reg_rtx (Pmode);
6406 emit_insn (Pmode == SImode 6435 emit_insn (Pmode == SImode
6407 ? gen_rdhwr_synci_step_si (inc) 6436 ? gen_rdhwr_synci_step_si (inc)
6408 : gen_rdhwr_synci_step_di (inc)); 6437 : gen_rdhwr_synci_step_di (inc));
6409 6438
6439 /* Check if inc is 0. */
6440 cmp_result = gen_rtx_EQ (VOIDmode, inc, const0_rtx);
6441 emit_jump_insn (gen_condjump (cmp_result, end_label));
6442
6443 /* Calculate mask. */
6444 mask = mips_force_unary (Pmode, NEG, inc);
6445
6446 /* Mask out begin by mask. */
6447 begin = mips_force_binary (Pmode, AND, begin, mask);
6448
6449 /* Calculate length. */
6450 length = mips_force_binary (Pmode, MINUS, end, begin);
6451
6410 /* Loop back to here. */ 6452 /* Loop back to here. */
6411 label = gen_label_rtx (); 6453 label = gen_label_rtx ();
6412 emit_label (label); 6454 emit_label (label);
6413 6455
6414 emit_insn (gen_synci (begin)); 6456 emit_insn (gen_synci (begin));
6415 6457
6416 cmp = mips_force_binary (Pmode, GTU, begin, end); 6458 /* Update length. */
6417 6459 mips_emit_binary (MINUS, length, length, inc);
6460
6461 /* Update begin. */
6418 mips_emit_binary (PLUS, begin, begin, inc); 6462 mips_emit_binary (PLUS, begin, begin, inc);
6419 6463
6420 cmp_result = gen_rtx_EQ (VOIDmode, cmp, const0_rtx); 6464 /* Check if length is greater than 0. */
6465 cmp_result = gen_rtx_GT (VOIDmode, length, const0_rtx);
6421 emit_jump_insn (gen_condjump (cmp_result, label)); 6466 emit_jump_insn (gen_condjump (cmp_result, label));
6467
6468 emit_label (end_label);
6422 } 6469 }
6423 6470
6424 /* Expand a QI or HI mode atomic memory operation. 6471 /* Expand a QI or HI mode atomic memory operation.
6425 6472
6426 GENERATOR contains a pointer to the gen_* function that generates 6473 GENERATOR contains a pointer to the gen_* function that generates