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comparison gcc/config/pa/pa.md @ 47:3bfb6c00c1e0

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update it from 4.4.2 to 4.4.3.
author kent <kent@cr.ie.u-ryukyu.ac.jp>
date Sun, 07 Feb 2010 17:44:34 +0900
parents a06113de4d67
children 77e2b8dfacca
comparison
equal deleted inserted replaced
46:b85a337e5837 47:3bfb6c00c1e0
3189 { 3189 {
3190 if (emit_move_sequence (operands, HImode, 0)) 3190 if (emit_move_sequence (operands, HImode, 0))
3191 DONE; 3191 DONE;
3192 }") 3192 }")
3193 3193
3194 ;; Handle HImode input reloads requiring a general register as a
3195 ;; scratch register.
3196 (define_expand "reload_inhi"
3197 [(set (match_operand:HI 0 "register_operand" "=Z")
3198 (match_operand:HI 1 "non_hard_reg_operand" ""))
3199 (clobber (match_operand:HI 2 "register_operand" "=&r"))]
3200 ""
3201 "
3202 {
3203 if (emit_move_sequence (operands, HImode, operands[2]))
3204 DONE;
3205
3206 /* We don't want the clobber emitted, so handle this ourselves. */
3207 emit_insn (gen_rtx_SET (VOIDmode, operands[0], operands[1]));
3208 DONE;
3209 }")
3210
3211 ;; Handle HImode output reloads requiring a general register as a
3212 ;; scratch register.
3213 (define_expand "reload_outhi"
3214 [(set (match_operand:HI 0 "non_hard_reg_operand" "")
3215 (match_operand:HI 1 "register_operand" "Z"))
3216 (clobber (match_operand:HI 2 "register_operand" "=&r"))]
3217 ""
3218 "
3219 {
3220 if (emit_move_sequence (operands, HImode, operands[2]))
3221 DONE;
3222
3223 /* We don't want the clobber emitted, so handle this ourselves. */
3224 emit_insn (gen_rtx_SET (VOIDmode, operands[0], operands[1]));
3225 DONE;
3226 }")
3227
3194 (define_insn "" 3228 (define_insn ""
3195 [(set (match_operand:HI 0 "move_dest_operand" 3229 [(set (match_operand:HI 0 "move_dest_operand"
3196 "=r,r,r,r,r,Q,!*q,!r") 3230 "=r,r,r,r,r,Q,!*q,!r")
3197 (match_operand:HI 1 "move_src_operand" 3231 (match_operand:HI 1 "move_src_operand"
3198 "r,J,N,K,RQ,rM,!rM,!*q"))] 3232 "r,J,N,K,RQ,rM,!rM,!*q"))]
3311 "" 3345 ""
3312 " 3346 "
3313 { 3347 {
3314 if (emit_move_sequence (operands, QImode, 0)) 3348 if (emit_move_sequence (operands, QImode, 0))
3315 DONE; 3349 DONE;
3350 }")
3351
3352 ;; Handle QImode input reloads requiring a general register as a
3353 ;; scratch register.
3354 (define_expand "reload_inqi"
3355 [(set (match_operand:QI 0 "register_operand" "=Z")
3356 (match_operand:QI 1 "non_hard_reg_operand" ""))
3357 (clobber (match_operand:QI 2 "register_operand" "=&r"))]
3358 ""
3359 "
3360 {
3361 if (emit_move_sequence (operands, QImode, operands[2]))
3362 DONE;
3363
3364 /* We don't want the clobber emitted, so handle this ourselves. */
3365 emit_insn (gen_rtx_SET (VOIDmode, operands[0], operands[1]));
3366 DONE;
3367 }")
3368
3369 ;; Handle QImode output reloads requiring a general register as a
3370 ;; scratch register.
3371 (define_expand "reload_outqi"
3372 [(set (match_operand:QI 0 "non_hard_reg_operand" "")
3373 (match_operand:QI 1 "register_operand" "Z"))
3374 (clobber (match_operand:QI 2 "register_operand" "=&r"))]
3375 ""
3376 "
3377 {
3378 if (emit_move_sequence (operands, QImode, operands[2]))
3379 DONE;
3380
3381 /* We don't want the clobber emitted, so handle this ourselves. */
3382 emit_insn (gen_rtx_SET (VOIDmode, operands[0], operands[1]));
3383 DONE;
3316 }") 3384 }")
3317 3385
3318 (define_insn "" 3386 (define_insn ""
3319 [(set (match_operand:QI 0 "move_dest_operand" 3387 [(set (match_operand:QI 0 "move_dest_operand"
3320 "=r,r,r,r,r,Q,!*q,!r") 3388 "=r,r,r,r,r,Q,!*q,!r")
7501 operands[1] = force_reg (SImode, operands[1]); 7569 operands[1] = force_reg (SImode, operands[1]);
7502 emit_insn (gen_addsi3 (index, operands[0], operands[1])); 7570 emit_insn (gen_addsi3 (index, operands[0], operands[1]));
7503 operands[0] = index; 7571 operands[0] = index;
7504 } 7572 }
7505 7573
7506 /* In 64bit mode we must make sure to wipe the upper bits of the register
7507 just in case the addition overflowed or we had random bits in the
7508 high part of the register. */
7509 if (TARGET_64BIT)
7510 {
7511 rtx index = gen_reg_rtx (DImode);
7512
7513 emit_insn (gen_extendsidi2 (index, operands[0]));
7514 operands[0] = gen_rtx_SUBREG (SImode, index, 4);
7515 }
7516
7517 if (!INT_5_BITS (operands[2])) 7574 if (!INT_5_BITS (operands[2]))
7518 operands[2] = force_reg (SImode, operands[2]); 7575 operands[2] = force_reg (SImode, operands[2]);
7519 7576
7520 /* This branch prevents us finding an insn for the delay slot of the 7577 /* This branch prevents us finding an insn for the delay slot of the
7521 following vectored branch. It might be possible to use the delay 7578 following vectored branch. It might be possible to use the delay
7527 then be worthwhile to split the casesi patterns to improve scheduling. 7584 then be worthwhile to split the casesi patterns to improve scheduling.
7528 However, it's not clear that all this extra complexity is worth 7585 However, it's not clear that all this extra complexity is worth
7529 the effort. */ 7586 the effort. */
7530 emit_insn (gen_cmpsi (operands[0], operands[2])); 7587 emit_insn (gen_cmpsi (operands[0], operands[2]));
7531 emit_jump_insn (gen_bgtu (operands[4])); 7588 emit_jump_insn (gen_bgtu (operands[4]));
7589
7590 /* In 64bit mode we must make sure to wipe the upper bits of the register
7591 just in case the addition overflowed or we had random bits in the
7592 high part of the register. */
7593 if (TARGET_64BIT)
7594 {
7595 rtx index = gen_reg_rtx (DImode);
7596
7597 emit_insn (gen_extendsidi2 (index, operands[0]));
7598 operands[0] = index;
7599 }
7532 7600
7533 if (TARGET_BIG_SWITCH) 7601 if (TARGET_BIG_SWITCH)
7534 { 7602 {
7535 if (TARGET_64BIT) 7603 if (TARGET_64BIT)
7536 emit_jump_insn (gen_casesi64p (operands[0], operands[3])); 7604 emit_jump_insn (gen_casesi64p (operands[0], operands[3]));
7588 (const_int 24)))]) 7656 (const_int 24)))])
7589 7657
7590 ;;; 64-bit code, 32-bit relative branch table. 7658 ;;; 64-bit code, 32-bit relative branch table.
7591 (define_insn "casesi64p" 7659 (define_insn "casesi64p"
7592 [(set (pc) (mem:DI (plus:DI 7660 [(set (pc) (mem:DI (plus:DI
7593 (mult:DI (sign_extend:DI 7661 (mult:DI (match_operand:DI 0 "register_operand" "r")
7594 (match_operand:SI 0 "register_operand" "r"))
7595 (const_int 8)) 7662 (const_int 8))
7596 (label_ref (match_operand 1 "" ""))))) 7663 (label_ref (match_operand 1 "" "")))))
7597 (clobber (match_scratch:DI 2 "=&r")) 7664 (clobber (match_scratch:DI 2 "=&r"))
7598 (clobber (match_scratch:DI 3 "=&r"))] 7665 (clobber (match_scratch:DI 3 "=&r"))]
7599 "" 7666 ""