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comparison gcc/config/s390/2817.md @ 68:561a7518be6b

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update gcc-4.6
author Nobuyasu Oshiro <dimolto@cr.ie.u-ryukyu.ac.jp>
date Sun, 21 Aug 2011 07:07:55 +0900
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children 04ced10e8804
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67:f6334be47118 68:561a7518be6b
1 ;; Scheduling description for z196 (cpu 2817).
2 ;; Copyright (C) 2010
3 ;; Free Software Foundation, Inc.
4 ;; Contributed by Christian Borntraeger (Christian.Borntraeger@de.ibm.com)
5 ;; Andreas Krebbel (Andreas.Krebbel@de.ibm.com)
6
7 ;; This file is part of GCC.
8
9 ;; GCC is free software; you can redistribute it and/or modify it under
10 ;; the terms of the GNU General Public License as published by the Free
11 ;; Software Foundation; either version 3, or (at your option) any later
12 ;; version.
13
14 ;; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
15 ;; WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 ;; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 ;; for more details.
18
19 ;; You should have received a copy of the GNU General Public License
20 ;; along with GCC; see the file COPYING3. If not see
21 ;; <http://www.gnu.org/licenses/>.
22
23 (define_automaton "z196_ipu")
24
25 ;; Fetch + Decoder
26 (define_cpu_unit "z196_g1" "z196_ipu")
27 (define_cpu_unit "z196_g2" "z196_ipu")
28 (define_cpu_unit "z196_g3" "z196_ipu")
29 (define_cpu_unit "z196_cr1" "z196_ipu")
30 (define_cpu_unit "z196_cr2" "z196_ipu")
31 (define_cpu_unit "z196_cr3" "z196_ipu")
32
33 (final_presence_set "z196_g2" "z196_g1")
34 (final_presence_set "z196_g3" "z196_g2")
35 (final_presence_set "z196_cr2" "z196_cr1")
36 (final_presence_set "z196_cr3" "z196_cr2")
37 (exclusion_set "z196_g1" "z196_cr1")
38
39 ;; Instructions can be groupable, end a group, or be alone in a group.
40 (define_reservation "z196_simple" "( z196_g1 | z196_g2 | z196_g3 )")
41 (define_reservation "z196_ends" "( z196_g3 | ( z196_g2 + z196_g3 ) | ( z196_g1 + z196_g2 + z196_g3 ) )")
42
43 ;; Try to keep cracked and alone insns together in a clump. This will also
44 ;; improve the clumping of "normal" insns. We also allow crackes insns
45 ;; to go as a last instruction together with normal ones.
46 (define_reservation "z196_crack" "( z196_cr1 | z196_cr2 | z196_cr3 | z196_g3)")
47 (define_reservation "z196_alone" "( z196_cr1 | z196_cr2 | z196_cr3 )")
48
49 ;; Most simple instruction a fast enough to be handled by OOO even with
50 ;; latency == 0. This reduces life ranges and spilling. We want to increase
51 ;; life range for longer running ops, though, thats why we do not use
52 ;; -fno-schedule-insns.
53 (define_insn_reservation "z196_simple_LSU" 0
54 (and (eq_attr "cpu" "z196")
55 (and (eq_attr "type" "load,store,lr")
56 (eq_attr "z196prop" "none")))
57 "z196_simple")
58
59 (define_insn_reservation "z196_simple_FXU" 0
60 (and (eq_attr "cpu" "z196")
61 (and (eq_attr "type" "integer,la,larl,other")
62 (and (eq_attr "z196prop" "none")
63 (eq_attr "op_type" "RR"))))
64 "z196_simple")
65
66 (define_insn_reservation "z196_simple_DUAL" 0
67 (and (eq_attr "cpu" "z196")
68 (and (eq_attr "type" "integer,la,larl,other")
69 (and (eq_attr "z196prop" "none")
70 (eq_attr "op_type" "!RR"))))
71 "z196_simple")
72
73 (define_insn_reservation "z196_cracked" 0
74 (and (eq_attr "cpu" "z196")
75 (and (eq_attr "type" "integer,la,larl,load,lr,store,other")
76 (eq_attr "z196prop" "z196_cracked")))
77 "z196_crack")
78
79 (define_insn_reservation "z196_alone" 0
80 (and (eq_attr "cpu" "z196")
81 (and (eq_attr "type" "integer,la,larl,load,lr,store,other")
82 (eq_attr "z196prop" "z196_alone")))
83 "z196_alone")
84
85 (define_insn_reservation "z196_ends" 0
86 (and (eq_attr "cpu" "z196")
87 (and (eq_attr "type" "integer,la,larl,load,lr,store,other")
88 (eq_attr "z196prop" "z196_ends")))
89 "z196_ends")
90
91 (define_insn_reservation "z196_branch" 0
92 (and (eq_attr "cpu" "z196")
93 (eq_attr "type" "branch"))
94 "z196_ends")
95
96 (define_insn_reservation "z196_call" 0
97 (and (eq_attr "cpu" "z196")
98 (eq_attr "type" "jsr"))
99 "z196_ends")
100
101 (define_insn_reservation "z196_mul_hi" 10
102 (and (eq_attr "cpu" "z196")
103 (eq_attr "type" "imulhi"))
104 "z196_simple")
105
106 (define_insn_reservation "z196_mul_si" 12
107 (and (eq_attr "cpu" "z196")
108 (eq_attr "type" "imulsi"))
109 "z196_simple")
110
111 (define_insn_reservation "z196_mul_di" 14
112 (and (eq_attr "cpu" "z196")
113 (eq_attr "type" "imuldi"))
114 "z196_simple")
115
116 (define_insn_reservation "z196_div" 73
117 (and (eq_attr "cpu" "z196")
118 (eq_attr "type" "idiv"))
119 "z196_alone")
120
121 (define_insn_reservation "z196_sem" 0
122 (and (eq_attr "cpu" "z196")
123 (eq_attr "type" "sem"))
124 "z196_crack")
125
126 (define_insn_reservation "z196_cs" 0
127 (and (eq_attr "cpu" "z196")
128 (eq_attr "type" "cs"))
129 "z196_crack")
130
131 (define_insn_reservation "z196_vs" 0
132 (and (eq_attr "cpu" "z196")
133 (eq_attr "type" "vs"))
134 "z196_alone")
135
136 (define_insn_reservation "z196_lm_stm" 0
137 (and (eq_attr "cpu" "z196")
138 (eq_attr "type" "stm,lm"))
139 "z196_crack")
140
141
142 ;;
143 ;; Binary Floating Point
144 ;;
145
146 (define_insn_reservation "z196_fsimptf" 18
147 (and (eq_attr "cpu" "z196")
148 (eq_attr "type" "fsimptf,fhex"))
149 "z196_alone")
150
151 (define_insn_reservation "z196_fmultf" 47
152 (and (eq_attr "cpu" "z196")
153 (eq_attr "type" "fmultf"))
154 "z196_alone")
155
156 (define_insn_reservation "z196_fsimpdf" 7
157 (and (eq_attr "cpu" "z196")
158 (eq_attr "type" "fsimpdf,fmuldf,fhex"))
159 "z196_simple")
160
161 (define_insn_reservation "z196_fmadddf" 7
162 (and (eq_attr "cpu" "z196")
163 (eq_attr "type" "fmadddf"))
164 "z196_alone")
165
166 (define_insn_reservation "z196_fsimpsf" 7
167 (and (eq_attr "cpu" "z196")
168 (eq_attr "type" "fsimpsf,fmulsf,fhex"))
169 "z196_simple")
170
171 (define_insn_reservation "z196_fmaddsf" 7
172 (and (eq_attr "cpu" "z196")
173 (eq_attr "type" "fmaddsf"))
174 "z196_alone")
175
176 (define_insn_reservation "z196_fdivtf" 108
177 (and (eq_attr "cpu" "z196")
178 (eq_attr "type" "fdivtf,fsqrttf"))
179 "z196_alone")
180
181 (define_insn_reservation "z196_fdivdf" 36
182 (and (eq_attr "cpu" "z196")
183 (eq_attr "type" "fdivdf,fsqrtdf"))
184 "z196_simple")
185
186 (define_insn_reservation "z196_fdivsf" 29
187 (and (eq_attr "cpu" "z196")
188 (eq_attr "type" "fdivsf,fsqrtsf"))
189 "z196_simple")
190
191
192 ;; Loads and stores are cheap as well.
193 (define_insn_reservation "z196_floaddf" 0
194 (and (eq_attr "cpu" "z196")
195 (eq_attr "type" "floaddf"))
196 "z196_simple")
197
198 (define_insn_reservation "z196_floadsf" 0
199 (and (eq_attr "cpu" "z196")
200 (eq_attr "type" "floadsf"))
201 "z196_simple")
202
203 (define_insn_reservation "z196_fstoredf" 0
204 (and (eq_attr "cpu" "z196")
205 (eq_attr "type" "fstoredf"))
206 "z196_simple")
207
208 (define_insn_reservation "z196_fstoresf" 0
209 (and (eq_attr "cpu" "z196")
210 (eq_attr "type" "fstoresf"))
211 "z196_simple")
212
213
214 (define_insn_reservation "z196_ftrunctf" 9
215 (and (eq_attr "cpu" "z196")
216 (eq_attr "type" "ftrunctf"))
217 "z196_simple")
218
219 (define_insn_reservation "z196_ftruncdf" 7
220 (and (eq_attr "cpu" "z196")
221 (eq_attr "type" "ftruncdf"))
222 "z196_simple")
223
224
225 (define_insn_reservation "z196_ftoi" 7
226 (and (eq_attr "cpu" "z196")
227 (eq_attr "type" "ftoi"))
228 "z196_crack")
229
230 (define_insn_reservation "z196_itof" 7
231 (and (eq_attr "cpu" "z196")
232 (eq_attr "type" "itoftf,itofdf,itofsf"))
233 "z196_crack")
234
235 ;;
236 ;; Decimal Floating Point
237 ;;
238
239 ;; DDTR
240 (define_insn_reservation "z196_fdivdd" 33
241 (and (eq_attr "cpu" "z196")
242 (eq_attr "type" "fdivdd"))
243 "z196_simple")
244
245 ;; DXTR
246 (define_insn_reservation "z196_fdivtd" 35
247 (and (eq_attr "cpu" "z196")
248 (eq_attr "type" "fdivtd"))
249 "z196_alone")
250
251 ;; LEDTR
252 (define_insn_reservation "z196_ftruncsd" 34
253 (and (eq_attr "cpu" "z196")
254 (eq_attr "type" "ftruncsd"))
255 "z196_simple")
256
257 ;; LDXTR
258 (define_insn_reservation "z196_ftruncdd" 36
259 (and (eq_attr "cpu" "z196")
260 (eq_attr "type" "ftruncdd"))
261 "z196_simple")
262
263 ;; These are normal fp loads/stores - which are cheap.
264 (define_insn_reservation "z196_floadsddd" 0
265 (and (eq_attr "cpu" "z196")
266 (eq_attr "type" "floadsd,floaddd,fstoredd,fstoresd"))
267 "z196_simple")
268
269 ;; MDTR
270 (define_insn_reservation "z196_fmuldd" 23
271 (and (eq_attr "cpu" "z196")
272 (eq_attr "type" "fmuldd"))
273 "z196_simple")
274
275 ;; MXTR
276 (define_insn_reservation "z196_fmultd" 25
277 (and (eq_attr "cpu" "z196")
278 (eq_attr "type" "fmultd"))
279 "z196_alone")
280
281 ;; multiple different isns like add, sub etc.
282 ;; Just use the same defaults as z10.
283 (define_insn_reservation "z196_fsimpsd" 17
284 (and (eq_attr "cpu" "z196")
285 (eq_attr "type" "fsimpsd"))
286 "z196_simple")
287 (define_insn_reservation "z196_fsimpdd" 17
288 (and (eq_attr "cpu" "z196")
289 (eq_attr "type" "fsimpdd"))
290 "z196_simple")
291 (define_insn_reservation "z196_fsimptd" 18
292 (and (eq_attr "cpu" "z196")
293 (eq_attr "type" "fsimptd"))
294 "z196_alone")
295
296 ;; CDGTR
297 (define_insn_reservation "z196_itofdd" 45
298 (and (eq_attr "cpu" "z196")
299 (eq_attr "type" "itofdd"))
300 "z196_crack")
301
302 ;; CXGTR
303 (define_insn_reservation "z196_itoftd" 33
304 (and (eq_attr "cpu" "z196")
305 (eq_attr "type" "itoftd"))
306 "z196_crack")
307
308 ;; CGXTR, CGDTR
309 (define_insn_reservation "z196_ftoidfp" 33
310 (and (eq_attr "cpu" "z196")
311 (eq_attr "type" "ftoidfp"))
312 "z196_crack")
313
314
315