comparison gcc/config/arm/bpabi.S @ 55:77e2b8dfacca gcc-4.4.5

update it from 4.4.3 to 4.5.0
author ryoma <e075725@ie.u-ryukyu.ac.jp>
date Fri, 12 Feb 2010 23:39:51 +0900
parents a06113de4d67
children b7f97abdc517
comparison
equal deleted inserted replaced
52:c156f1bd5cd9 55:77e2b8dfacca
62 RET 62 RET
63 FUNC_END aeabi_ulcmp 63 FUNC_END aeabi_ulcmp
64 64
65 #endif /* L_aeabi_ulcmp */ 65 #endif /* L_aeabi_ulcmp */
66 66
67 .macro test_div_by_zero signed
68 /* Tail-call to divide-by-zero handlers which may be overridden by the user,
69 so unwinding works properly. */
70 #if defined(__thumb2__)
71 cbnz yyh, 1f
72 cbnz yyl, 1f
73 cmp xxh, #0
74 do_it eq
75 cmpeq xxl, #0
76 .ifc \signed, unsigned
77 beq 2f
78 mov xxh, #0xffffffff
79 mov xxl, xxh
80 2:
81 .else
82 do_it lt, t
83 movlt xxl, #0
84 movlt xxh, #0x80000000
85 do_it gt, t
86 movgt xxh, #0x7fffffff
87 movgt xxl, #0xffffffff
88 .endif
89 b SYM (__aeabi_ldiv0) __PLT__
90 1:
91 #else
92 /* Note: Thumb-1 code calls via an ARM shim on processors which
93 support ARM mode. */
94 cmp yyh, #0
95 cmpeq yyl, #0
96 bne 2f
97 cmp xxh, #0
98 cmpeq xxl, #0
99 .ifc \signed, unsigned
100 movne xxh, #0xffffffff
101 movne xxl, #0xffffffff
102 .else
103 movlt xxh, #0x80000000
104 movlt xxl, #0
105 movgt xxh, #0x7fffffff
106 movgt xxl, #0xffffffff
107 .endif
108 b SYM (__aeabi_ldiv0) __PLT__
109 2:
110 #endif
111 .endm
112
67 #ifdef L_aeabi_ldivmod 113 #ifdef L_aeabi_ldivmod
68 114
69 ARM_FUNC_START aeabi_ldivmod 115 ARM_FUNC_START aeabi_ldivmod
116 test_div_by_zero signed
117
70 sub sp, sp, #8 118 sub sp, sp, #8
71 #if defined(__thumb2__) 119 #if defined(__thumb2__)
72 mov ip, sp 120 mov ip, sp
73 push {ip, lr} 121 push {ip, lr}
74 #else 122 #else
83 #endif /* L_aeabi_ldivmod */ 131 #endif /* L_aeabi_ldivmod */
84 132
85 #ifdef L_aeabi_uldivmod 133 #ifdef L_aeabi_uldivmod
86 134
87 ARM_FUNC_START aeabi_uldivmod 135 ARM_FUNC_START aeabi_uldivmod
136 test_div_by_zero unsigned
137
88 sub sp, sp, #8 138 sub sp, sp, #8
89 #if defined(__thumb2__) 139 #if defined(__thumb2__)
90 mov ip, sp 140 mov ip, sp
91 push {ip, lr} 141 push {ip, lr}
92 #else 142 #else