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comparison gcc/config/cris/cris.md @ 55:77e2b8dfacca gcc-4.4.5

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update it from 4.4.3 to 4.5.0
author ryoma <e075725@ie.u-ryukyu.ac.jp>
date Fri, 12 Feb 2010 23:39:51 +0900
parents 855418dad1a3
children b7f97abdc517
comparison
equal deleted inserted replaced
52:c156f1bd5cd9 55:77e2b8dfacca
246 246
247 (include "predicates.md") 247 (include "predicates.md")
248 248
249 ;; Test insns. 249 ;; Test insns.
250 250
251 ;; DImode
252 ;;
253 ;; Allow register and offsettable mem operands only; post-increment is
254 ;; not worth the trouble.
255
256 (define_expand "tstdi"
257 [(set (cc0) (match_operand:DI 0 "nonimmediate_operand"))]
258 ""
259 {
260 if (TARGET_V32 && MEM_P (operands[0]))
261 operands[0] = force_reg (DImode, operands[0]);
262 })
263
264 (define_insn "*tstdi_non_v32"
265 [(set (cc0)
266 (match_operand:DI 0 "nonimmediate_operand" "r,o"))]
267 "!TARGET_V32"
268 "test.d %M0\;ax\;test.d %H0")
269
270 (define_insn "*tstdi_v32"
271 [(set (cc0)
272 (match_operand:DI 0 "register_operand" "r"))]
273 "TARGET_V32"
274 "cmpq 0,%M0\;ax\;cmpq 0,%H0")
275
276 ;; No test insns with side-effect on the mem addressing. 251 ;; No test insns with side-effect on the mem addressing.
277 ;; 252 ;;
278 ;; See note on cmp-insns with side-effects (or lack of them) 253 ;; See note on cmp-insns with side-effects (or lack of them)
279 254
280 ;; Normal named test patterns from SI on. 255 ;; Normal named test patterns from SI on.
281 256
282 (define_insn "tstsi" 257 (define_insn "*tstsi"
283 [(set (cc0) 258 [(set (cc0)
284 (match_operand:SI 0 "nonimmediate_operand" "r,Q>,m"))] 259 (compare (match_operand:SI 0 "nonimmediate_operand" "r,Q>,m")
260 (const_int 0)))]
285 "" 261 ""
286 { 262 {
287 if (which_alternative == 0 && TARGET_V32) 263 if (which_alternative == 0 && TARGET_V32)
288 return "cmpq 0,%0"; 264 return "cmpq 0,%0";
289 return "test.d %0"; 265 return "test.d %0";
290 } 266 }
291 [(set_attr "slottable" "yes,yes,no")]) 267 [(set_attr "slottable" "yes,yes,no")])
292 268
293 (define_expand "tst<mode>"
294 [(set (cc0)
295 (match_operand:BW 0 "nonimmediate_operand"))]
296 ""
297 "")
298
299 (define_insn "*tst<mode>_cmp" 269 (define_insn "*tst<mode>_cmp"
300 [(set (cc0) 270 [(set (cc0)
301 (match_operand:BW 0 "nonimmediate_operand" "r,Q>,m"))] 271 (compare (match_operand:BW 0 "nonimmediate_operand" "r,Q>,m")
272 (const_int 0)))]
302 "cris_cc0_user_requires_cmp (insn)" 273 "cris_cc0_user_requires_cmp (insn)"
303 "@ 274 "@
304 cmp<m> 0,%0 275 cmp<m> 0,%0
305 test<m> %0 276 test<m> %0
306 test<m> %0" 277 test<m> %0"
307 [(set_attr "slottable" "no,yes,no")]) 278 [(set_attr "slottable" "no,yes,no")])
308 279
309 (define_insn "*tst<mode>_non_cmp" 280 (define_insn "*tst<mode>_non_cmp"
310 [(set (cc0) 281 [(set (cc0)
311 (match_operand:BW 0 "nonimmediate_operand" "r,Q>,m"))] 282 (compare (match_operand:BW 0 "nonimmediate_operand" "r,Q>,m")
283 (const_int 0)))]
312 "!cris_cc0_user_requires_cmp (insn)" 284 "!cris_cc0_user_requires_cmp (insn)"
313 "@ 285 "@
314 move<m> %0,%0 286 move<m> %0,%0
315 test<m> %0 287 test<m> %0
316 test<m> %0" 288 test<m> %0"
330 ;; We could optimize the sizes of the immediate operands for various 302 ;; We could optimize the sizes of the immediate operands for various
331 ;; cases, but that is not worth it because of the very little usage of 303 ;; cases, but that is not worth it because of the very little usage of
332 ;; DImode for anything else but a structure/block-mode. Just do the 304 ;; DImode for anything else but a structure/block-mode. Just do the
333 ;; obvious stuff for the straight-forward constraint letters. 305 ;; obvious stuff for the straight-forward constraint letters.
334 306
335 (define_expand "cmpdi"
336 [(set (cc0)
337 (compare (match_operand:DI 0 "nonimmediate_operand" "")
338 (match_operand:DI 1 "general_operand" "")))]
339 ""
340 {
341 if (TARGET_V32 && !REG_P (operands[0]))
342 operands[0] = force_reg (DImode, operands[0]);
343 if (TARGET_V32 && MEM_P (operands[1]))
344 operands[1] = force_reg (DImode, operands[1]);
345 })
346
347 (define_insn "*cmpdi_non_v32" 307 (define_insn "*cmpdi_non_v32"
348 [(set (cc0) 308 [(set (cc0)
349 (compare (match_operand:DI 0 "nonimmediate_operand" "r,r,r,r,r,r,o") 309 (compare (match_operand:DI 0 "nonimmediate_operand" "rm,r,r,r,r,r,r,o")
350 (match_operand:DI 1 "general_operand" "Kc,I,P,n,r,o,r")))] 310 (match_operand:DI 1 "general_operand" "M,Kc,I,P,n,r,o,r")))]
351 "!TARGET_V32" 311 "!TARGET_V32"
352 "@ 312 "@
313 test.d %M0\;ax\;test.d %H0
353 cmpq %1,%M0\;ax\;cmpq 0,%H0 314 cmpq %1,%M0\;ax\;cmpq 0,%H0
354 cmpq %1,%M0\;ax\;cmpq -1,%H0 315 cmpq %1,%M0\;ax\;cmpq -1,%H0
355 cmp%e1.%z1 %1,%M0\;ax\;cmpq %H1,%H0 316 cmp%e1.%z1 %1,%M0\;ax\;cmpq %H1,%H0
356 cmp.d %M1,%M0\;ax\;cmp.d %H1,%H0 317 cmp.d %M1,%M0\;ax\;cmp.d %H1,%H0
357 cmp.d %M1,%M0\;ax\;cmp.d %H1,%H0 318 cmp.d %M1,%M0\;ax\;cmp.d %H1,%H0
413 "cmp%e2<m> %0,%1" 374 "cmp%e2<m> %0,%1"
414 [(set_attr "slottable" "yes,no") 375 [(set_attr "slottable" "yes,no")
415 (set_attr "cc" "rev")]) 376 (set_attr "cc" "rev")])
416 377
417 ;; The "normal" compare patterns, from SI on. Special-cases with zero 378 ;; The "normal" compare patterns, from SI on. Special-cases with zero
418 ;; should not happen. 379 ;; are covered above.
419 380
420 (define_insn "cmpsi" 381 (define_insn "*cmpsi"
421 [(set (cc0) 382 [(set (cc0)
422 (compare 383 (compare
423 (match_operand:SI 0 "nonimmediate_operand" "r,r,r, Q>,r,r,m") 384 (match_operand:SI 0 "nonimmediate_operand" "r,r,r, Q>,r,r,m")
424 (match_operand:SI 1 "general_operand" "I,r,Q>,r, P,g,r")))] 385 (match_operand:SI 1 "general_operand" "I,r,Q>,r, P,g,r")))]
425 "" 386 ""
432 cmp.d %1,%0 393 cmp.d %1,%0
433 cmp.d %0,%1" 394 cmp.d %0,%1"
434 [(set_attr "slottable" "yes,yes,yes,yes,no,no,no") 395 [(set_attr "slottable" "yes,yes,yes,yes,no,no,no")
435 (set_attr "cc" "normal,normal,normal,rev,normal,normal,rev")]) 396 (set_attr "cc" "normal,normal,normal,rev,normal,normal,rev")])
436 397
437 (define_insn "cmp<mode>" 398 (define_insn "*cmp<mode>"
438 [(set (cc0) 399 [(set (cc0)
439 (compare (match_operand:BW 0 "nonimmediate_operand" "r,r, Q>,r,m") 400 (compare (match_operand:BW 0 "nonimmediate_operand" "r,r, Q>,r,m")
440 (match_operand:BW 1 "general_operand" "r,Q>,r, g,r")))] 401 (match_operand:BW 1 "general_operand" "r,Q>,r, g,r")))]
441 "" 402 ""
442 "@ 403 "@
455 416
456 ;; SImode. This mode is the only one needed, since gcc automatically 417 ;; SImode. This mode is the only one needed, since gcc automatically
457 ;; extends subregs for lower-size modes. FIXME: Add testcase. 418 ;; extends subregs for lower-size modes. FIXME: Add testcase.
458 (define_insn "*btst" 419 (define_insn "*btst"
459 [(set (cc0) 420 [(set (cc0)
460 (zero_extract 421 (compare
461 (match_operand:SI 0 "nonmemory_operand" "r, r,r, r,r, r,Kp") 422 (zero_extract:SI
462 (match_operand:SI 1 "const_int_operand" "Kc,n,Kc,n,Kc,n,n") 423 (match_operand:SI 0 "nonmemory_operand" "r, r,r, r,r, r,Kp")
463 (match_operand:SI 2 "nonmemory_operand" "M, M,Kc,n,r, r,r")))] 424 (match_operand:SI 1 "const_int_operand" "Kc,n,Kc,n,Kc,n,n")
425 (match_operand:SI 2 "nonmemory_operand" "M, M,Kc,n,r, r,r"))
426 (const_int 0)))]
464 ;; Either it is a single bit, or consecutive ones starting at 0. 427 ;; Either it is a single bit, or consecutive ones starting at 0.
465 ;; The btst ones depend on stuff in NOTICE_UPDATE_CC. 428 ;; The btst ones depend on stuff in NOTICE_UPDATE_CC.
466 "CONST_INT_P (operands[1]) 429 "CONST_INT_P (operands[1])
467 && (operands[1] == const1_rtx || operands[2] == const0_rtx) 430 && (operands[1] == const1_rtx || operands[2] == const0_rtx)
468 && (REG_S_P (operands[0]) 431 && (REG_S_P (operands[0])
3548 "TARGET_PROLOGUE_EPILOGUE" 3511 "TARGET_PROLOGUE_EPILOGUE"
3549 "cris_expand_epilogue (); DONE;") 3512 "cris_expand_epilogue (); DONE;")
3550 3513
3551 ;; Conditional branches. 3514 ;; Conditional branches.
3552 3515
3516 (define_expand "cbranch<mode>4"
3517 [(set (cc0) (compare
3518 (match_operand:BWD 1 "nonimmediate_operand")
3519 (match_operand:BWD 2 "general_operand")))
3520 (set (pc)
3521 (if_then_else (match_operator 0 "ordered_comparison_operator"
3522 [(cc0) (const_int 0)])
3523 (label_ref (match_operand 3 "" ""))
3524 (pc)))]
3525 ""
3526 "")
3527
3528 (define_expand "cbranchdi4"
3529 [(set (cc0)
3530 (compare (match_operand:DI 1 "nonimmediate_operand" "")
3531 (match_operand:DI 2 "general_operand" "")))
3532 (set (pc)
3533 (if_then_else (match_operator 0 "ordered_comparison_operator"
3534 [(cc0) (const_int 0)])
3535 (label_ref (match_operand 3 "" ""))
3536 (pc)))]
3537 ""
3538 {
3539 if (TARGET_V32 && !REG_P (operands[1]))
3540 operands[1] = force_reg (DImode, operands[1]);
3541 if (TARGET_V32 && MEM_P (operands[2]))
3542 operands[2] = force_reg (DImode, operands[2]);
3543 })
3544
3545
3553 ;; We suffer from the same overflow-bit-gets-in-the-way problem as 3546 ;; We suffer from the same overflow-bit-gets-in-the-way problem as
3554 ;; e.g. m68k, so we have to check if overflow bit is set on all "signed" 3547 ;; e.g. m68k, so we have to check if overflow bit is set on all "signed"
3555 ;; conditions. 3548 ;; conditions.
3556 3549
3557 (define_insn "b<ncond:code>" 3550 (define_insn "b<ncond:code>"
3631 ? "b<roCC> %l0%#" : "b<rCC> %l0%#"; 3624 ? "b<roCC> %l0%#" : "b<rCC> %l0%#";
3632 } 3625 }
3633 [(set_attr "slottable" "has_slot")]) 3626 [(set_attr "slottable" "has_slot")])
3634 3627
3635 ;; Set on condition: sCC. 3628 ;; Set on condition: sCC.
3629
3630 (define_expand "cstoredi4"
3631 [(set (cc0) (compare
3632 (match_operand:DI 2 "nonimmediate_operand")
3633 (match_operand:DI 3 "general_operand")))
3634 (set (match_operand:SI 0 "register_operand")
3635 (match_operator:SI 1 "ordered_comparison_operator"
3636 [(cc0) (const_int 0)]))]
3637 ""
3638 {
3639 if (TARGET_V32 && !REG_P (operands[2]))
3640 operands[2] = force_reg (DImode, operands[2]);
3641 if (TARGET_V32 && MEM_P (operands[3]))
3642 operands[3] = force_reg (DImode, operands[3]);
3643 })
3644
3645 (define_expand "cstore<mode>4"
3646 [(set (cc0) (compare
3647 (match_operand:BWD 2 "nonimmediate_operand")
3648 (match_operand:BWD 3 "general_operand")))
3649 (set (match_operand:SI 0 "register_operand")
3650 (match_operator:SI 1 "ordered_comparison_operator"
3651 [(cc0) (const_int 0)]))]
3652 ""
3653 "")
3636 3654
3637 ;; Like bCC, we have to check the overflow bit for 3655 ;; Like bCC, we have to check the overflow bit for
3638 ;; signed conditions. 3656 ;; signed conditions.
3639 3657
3640 (define_insn "s<ncond:code>" 3658 (define_insn "s<ncond:code>"