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comparison gcc/config/i386/mmx.md @ 55:77e2b8dfacca gcc-4.4.5

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update it from 4.4.3 to 4.5.0
author ryoma <e075725@ie.u-ryukyu.ac.jp>
date Fri, 12 Feb 2010 23:39:51 +0900
parents 3bfb6c00c1e0
children b7f97abdc517
comparison
equal deleted inserted replaced
52:c156f1bd5cd9 55:77e2b8dfacca
1 ;; GCC machine description for MMX and 3dNOW! instructions 1 ;; GCC machine description for MMX and 3dNOW! instructions
2 ;; Copyright (C) 2005, 2007, 2008 2 ;; Copyright (C) 2005, 2007, 2008, 2009
3 ;; Free Software Foundation, Inc. 3 ;; Free Software Foundation, Inc.
4 ;; 4 ;;
5 ;; This file is part of GCC. 5 ;; This file is part of GCC.
6 ;; 6 ;;
7 ;; GCC is free software; you can redistribute it and/or modify 7 ;; GCC is free software; you can redistribute it and/or modify
83 %vmovq\t{%1, %0|%0, %1} 83 %vmovq\t{%1, %0|%0, %1}
84 %vmovq\t{%1, %0|%0, %1} 84 %vmovq\t{%1, %0|%0, %1}
85 %vmovq\t{%1, %0|%0, %1}" 85 %vmovq\t{%1, %0|%0, %1}"
86 [(set_attr "type" "imov,imov,mmx,mmxmov,mmxmov,ssecvt,ssecvt,sselog1,ssemov,ssemov,ssemov,ssemov") 86 [(set_attr "type" "imov,imov,mmx,mmxmov,mmxmov,ssecvt,ssecvt,sselog1,ssemov,ssemov,ssemov,ssemov")
87 (set_attr "unit" "*,*,*,*,*,mmx,mmx,*,*,*,*,*") 87 (set_attr "unit" "*,*,*,*,*,mmx,mmx,*,*,*,*,*")
88 (set_attr "prefix_rep" "*,*,*,*,*,1,1,*,1,*,*,*")
89 (set_attr "prefix_data16" "*,*,*,*,*,*,*,*,*,1,1,1")
90 (set (attr "prefix_rex")
91 (if_then_else (eq_attr "alternative" "8,9")
92 (symbol_ref "x86_extended_reg_mentioned_p (insn)")
93 (const_string "*")))
88 (set (attr "prefix") 94 (set (attr "prefix")
89 (if_then_else (eq_attr "alternative" "7,8,9,10,11") 95 (if_then_else (eq_attr "alternative" "7,8,9,10,11")
90 (const_string "maybe_vex") 96 (const_string "maybe_vex")
91 (const_string "orig"))) 97 (const_string "orig")))
92 (set_attr "mode" "DI")]) 98 (set_attr "mode" "DI")])
109 vmovq\t{%1, %0|%0, %1} 115 vmovq\t{%1, %0|%0, %1}
110 # 116 #
111 #" 117 #"
112 [(set_attr "type" "mmx,mmxmov,mmxmov,ssecvt,ssecvt,sselog1,ssemov,ssemov,*,*") 118 [(set_attr "type" "mmx,mmxmov,mmxmov,ssecvt,ssecvt,sselog1,ssemov,ssemov,*,*")
113 (set_attr "unit" "*,*,*,mmx,mmx,*,*,*,*,*") 119 (set_attr "unit" "*,*,*,mmx,mmx,*,*,*,*,*")
120 (set_attr "prefix_rep" "*,*,*,1,1,*,*,*,*,*")
114 (set (attr "prefix") 121 (set (attr "prefix")
115 (if_then_else (eq_attr "alternative" "5,6,7") 122 (if_then_else (eq_attr "alternative" "5,6,7")
116 (const_string "vex") 123 (const_string "vex")
117 (const_string "orig"))) 124 (const_string "orig")))
118 (set_attr "mode" "DI,DI,DI,DI,DI,TI,DI,DI,DI,DI")]) 125 (set_attr "mode" "DI,DI,DI,DI,DI,TI,DI,DI,DI,DI")])
139 movlps\t{%1, %0|%0, %1} 146 movlps\t{%1, %0|%0, %1}
140 # 147 #
141 #" 148 #"
142 [(set_attr "type" "mmx,mmxmov,mmxmov,ssecvt,ssecvt,sselog1,ssemov,ssemov,sselog1,ssemov,ssemov,ssemov,*,*") 149 [(set_attr "type" "mmx,mmxmov,mmxmov,ssecvt,ssecvt,sselog1,ssemov,ssemov,sselog1,ssemov,ssemov,ssemov,*,*")
143 (set_attr "unit" "*,*,*,mmx,mmx,*,*,*,*,*,*,*,*,*") 150 (set_attr "unit" "*,*,*,mmx,mmx,*,*,*,*,*,*,*,*,*")
151 (set_attr "prefix_rep" "*,*,*,1,1,*,1,*,*,*,*,*,*,*")
152 (set_attr "prefix_data16" "*,*,*,*,*,*,*,1,*,*,*,*,*,*")
144 (set_attr "mode" "DI,DI,DI,DI,DI,TI,DI,DI,V4SF,V4SF,V2SF,V2SF,DI,DI")]) 153 (set_attr "mode" "DI,DI,DI,DI,DI,TI,DI,DI,V4SF,V4SF,V2SF,V2SF,DI,DI")])
145 154
146 (define_expand "movv2sf" 155 (define_expand "movv2sf"
147 [(set (match_operand:V2SF 0 "nonimmediate_operand" "") 156 [(set (match_operand:V2SF 0 "nonimmediate_operand" "")
148 (match_operand:V2SF 1 "nonimmediate_operand" ""))] 157 (match_operand:V2SF 1 "nonimmediate_operand" ""))]
173 vmovlps\t{%1, %0|%0, %1} 182 vmovlps\t{%1, %0|%0, %1}
174 vmovq\t{%1, %0|%0, %1} 183 vmovq\t{%1, %0|%0, %1}
175 vmovq\t{%1, %0|%0, %1}" 184 vmovq\t{%1, %0|%0, %1}"
176 [(set_attr "type" "imov,imov,mmx,mmxmov,mmxmov,ssecvt,ssecvt,ssemov,sselog1,ssemov,ssemov,ssemov,ssemov") 185 [(set_attr "type" "imov,imov,mmx,mmxmov,mmxmov,ssecvt,ssecvt,ssemov,sselog1,ssemov,ssemov,ssemov,ssemov")
177 (set_attr "unit" "*,*,*,*,*,mmx,mmx,*,*,*,*,*,*") 186 (set_attr "unit" "*,*,*,*,*,mmx,mmx,*,*,*,*,*,*")
187 (set_attr "prefix_rep" "*,*,*,*,*,1,1,*,*,*,*,*,*")
188 (set_attr "length_vex" "*,*,*,*,*,*,*,*,*,*,*,4,4")
178 (set (attr "prefix") 189 (set (attr "prefix")
179 (if_then_else (eq_attr "alternative" "7,8,9,10,11,12") 190 (if_then_else (eq_attr "alternative" "7,8,9,10,11,12")
180 (const_string "vex") 191 (const_string "vex")
181 (const_string "orig"))) 192 (const_string "orig")))
182 (set_attr "mode" "DI,DI,DI,DI,DI,DI,DI,V4SF,V4SF,V2SF,V2SF,DI,DI")]) 193 (set_attr "mode" "DI,DI,DI,DI,DI,DI,DI,V4SF,V4SF,V2SF,V2SF,DI,DI")])
202 movlps\t{%1, %0|%0, %1} 213 movlps\t{%1, %0|%0, %1}
203 movd\t{%1, %0|%0, %1} 214 movd\t{%1, %0|%0, %1}
204 movd\t{%1, %0|%0, %1}" 215 movd\t{%1, %0|%0, %1}"
205 [(set_attr "type" "imov,imov,mmx,mmxmov,mmxmov,ssecvt,ssecvt,ssemov,sselog1,ssemov,ssemov,ssemov,ssemov") 216 [(set_attr "type" "imov,imov,mmx,mmxmov,mmxmov,ssecvt,ssecvt,ssemov,sselog1,ssemov,ssemov,ssemov,ssemov")
206 (set_attr "unit" "*,*,*,*,*,mmx,mmx,*,*,*,*,*,*") 217 (set_attr "unit" "*,*,*,*,*,mmx,mmx,*,*,*,*,*,*")
218 (set_attr "prefix_rep" "*,*,*,*,*,1,1,*,*,*,*,*,*")
207 (set_attr "mode" "DI,DI,DI,DI,DI,DI,DI,V4SF,V4SF,V2SF,V2SF,DI,DI")]) 219 (set_attr "mode" "DI,DI,DI,DI,DI,DI,DI,V4SF,V4SF,V2SF,V2SF,DI,DI")])
208 220
209 (define_insn "*movv2sf_internal_avx" 221 (define_insn "*movv2sf_internal_avx"
210 [(set (match_operand:V2SF 0 "nonimmediate_operand" 222 [(set (match_operand:V2SF 0 "nonimmediate_operand"
211 "=!?y,!?y ,m ,!y ,*Y2,*x,*x,*x,m ,r ,m") 223 "=!?y,!?y ,m ,!y ,*Y2,*x,*x,*x,m ,r ,m")
225 vmovlps\t{%1, %0|%0, %1} 237 vmovlps\t{%1, %0|%0, %1}
226 # 238 #
227 #" 239 #"
228 [(set_attr "type" "mmx,mmxmov,mmxmov,ssecvt,ssecvt,sselog1,ssemov,ssemov,ssemov,*,*") 240 [(set_attr "type" "mmx,mmxmov,mmxmov,ssecvt,ssecvt,sselog1,ssemov,ssemov,ssemov,*,*")
229 (set_attr "unit" "*,*,*,mmx,mmx,*,*,*,*,*,*") 241 (set_attr "unit" "*,*,*,mmx,mmx,*,*,*,*,*,*")
242 (set_attr "prefix_rep" "*,*,*,1,1,*,*,*,*,*,*")
230 (set (attr "prefix") 243 (set (attr "prefix")
231 (if_then_else (eq_attr "alternative" "5,6,7,8") 244 (if_then_else (eq_attr "alternative" "5,6,7,8")
232 (const_string "vex") 245 (const_string "vex")
233 (const_string "orig"))) 246 (const_string "orig")))
234 (set_attr "mode" "DI,DI,DI,DI,DI,V4SF,V4SF,V2SF,V2SF,DI,DI")]) 247 (set_attr "mode" "DI,DI,DI,DI,DI,V4SF,V4SF,V2SF,V2SF,DI,DI")])
252 movlps\t{%1, %0|%0, %1} 265 movlps\t{%1, %0|%0, %1}
253 # 266 #
254 #" 267 #"
255 [(set_attr "type" "mmx,mmxmov,mmxmov,ssecvt,ssecvt,sselog1,ssemov,ssemov,ssemov,*,*") 268 [(set_attr "type" "mmx,mmxmov,mmxmov,ssecvt,ssecvt,sselog1,ssemov,ssemov,ssemov,*,*")
256 (set_attr "unit" "*,*,*,mmx,mmx,*,*,*,*,*,*") 269 (set_attr "unit" "*,*,*,mmx,mmx,*,*,*,*,*,*")
270 (set_attr "prefix_rep" "*,*,*,1,1,*,*,*,*,*,*")
257 (set_attr "mode" "DI,DI,DI,DI,DI,V4SF,V4SF,V2SF,V2SF,DI,DI")]) 271 (set_attr "mode" "DI,DI,DI,DI,DI,V4SF,V4SF,V2SF,V2SF,DI,DI")])
258 272
259 ;; %%% This multiword shite has got to go. 273 ;; %%% This multiword shite has got to go.
260 (define_split 274 (define_split
261 [(set (match_operand:MMXMODE 0 "nonimmediate_operand" "") 275 [(set (match_operand:MMXMODE 0 "nonimmediate_operand" "")
311 (plus:V2SF (match_operand:V2SF 1 "nonimmediate_operand" "%0") 325 (plus:V2SF (match_operand:V2SF 1 "nonimmediate_operand" "%0")
312 (match_operand:V2SF 2 "nonimmediate_operand" "ym")))] 326 (match_operand:V2SF 2 "nonimmediate_operand" "ym")))]
313 "TARGET_3DNOW && ix86_binary_operator_ok (PLUS, V2SFmode, operands)" 327 "TARGET_3DNOW && ix86_binary_operator_ok (PLUS, V2SFmode, operands)"
314 "pfadd\t{%2, %0|%0, %2}" 328 "pfadd\t{%2, %0|%0, %2}"
315 [(set_attr "type" "mmxadd") 329 [(set_attr "type" "mmxadd")
330 (set_attr "prefix_extra" "1")
316 (set_attr "mode" "V2SF")]) 331 (set_attr "mode" "V2SF")])
317 332
318 (define_expand "mmx_subv2sf3" 333 (define_expand "mmx_subv2sf3"
319 [(set (match_operand:V2SF 0 "register_operand" "") 334 [(set (match_operand:V2SF 0 "register_operand" "")
320 (minus:V2SF (match_operand:V2SF 1 "register_operand" "") 335 (minus:V2SF (match_operand:V2SF 1 "register_operand" "")
336 "TARGET_3DNOW && !(MEM_P (operands[0]) && MEM_P (operands[1]))" 351 "TARGET_3DNOW && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
337 "@ 352 "@
338 pfsub\t{%2, %0|%0, %2} 353 pfsub\t{%2, %0|%0, %2}
339 pfsubr\t{%1, %0|%0, %1}" 354 pfsubr\t{%1, %0|%0, %1}"
340 [(set_attr "type" "mmxadd") 355 [(set_attr "type" "mmxadd")
356 (set_attr "prefix_extra" "1")
341 (set_attr "mode" "V2SF")]) 357 (set_attr "mode" "V2SF")])
342 358
343 (define_expand "mmx_mulv2sf3" 359 (define_expand "mmx_mulv2sf3"
344 [(set (match_operand:V2SF 0 "register_operand" "") 360 [(set (match_operand:V2SF 0 "register_operand" "")
345 (mult:V2SF (match_operand:V2SF 1 "nonimmediate_operand" "") 361 (mult:V2SF (match_operand:V2SF 1 "nonimmediate_operand" "")
352 (mult:V2SF (match_operand:V2SF 1 "nonimmediate_operand" "%0") 368 (mult:V2SF (match_operand:V2SF 1 "nonimmediate_operand" "%0")
353 (match_operand:V2SF 2 "nonimmediate_operand" "ym")))] 369 (match_operand:V2SF 2 "nonimmediate_operand" "ym")))]
354 "TARGET_3DNOW && ix86_binary_operator_ok (MULT, V2SFmode, operands)" 370 "TARGET_3DNOW && ix86_binary_operator_ok (MULT, V2SFmode, operands)"
355 "pfmul\t{%2, %0|%0, %2}" 371 "pfmul\t{%2, %0|%0, %2}"
356 [(set_attr "type" "mmxmul") 372 [(set_attr "type" "mmxmul")
373 (set_attr "prefix_extra" "1")
357 (set_attr "mode" "V2SF")]) 374 (set_attr "mode" "V2SF")])
358 375
359 ;; ??? For !flag_finite_math_only, the representation with SMIN/SMAX 376 ;; ??? For !flag_finite_math_only, the representation with SMIN/SMAX
360 ;; isn't really correct, as those rtl operators aren't defined when 377 ;; isn't really correct, as those rtl operators aren't defined when
361 ;; applied to NaNs. Hopefully the optimizers won't get too smart on us. 378 ;; applied to NaNs. Hopefully the optimizers won't get too smart on us.
379 (match_operand:V2SF 2 "nonimmediate_operand" "ym")))] 396 (match_operand:V2SF 2 "nonimmediate_operand" "ym")))]
380 "TARGET_3DNOW && flag_finite_math_only 397 "TARGET_3DNOW && flag_finite_math_only
381 && ix86_binary_operator_ok (<CODE>, V2SFmode, operands)" 398 && ix86_binary_operator_ok (<CODE>, V2SFmode, operands)"
382 "pf<maxminfprefix>\t{%2, %0|%0, %2}" 399 "pf<maxminfprefix>\t{%2, %0|%0, %2}"
383 [(set_attr "type" "mmxadd") 400 [(set_attr "type" "mmxadd")
401 (set_attr "prefix_extra" "1")
384 (set_attr "mode" "V2SF")]) 402 (set_attr "mode" "V2SF")])
385 403
386 (define_insn "*mmx_<code>v2sf3" 404 (define_insn "*mmx_<code>v2sf3"
387 [(set (match_operand:V2SF 0 "register_operand" "=y") 405 [(set (match_operand:V2SF 0 "register_operand" "=y")
388 (smaxmin:V2SF 406 (smaxmin:V2SF
389 (match_operand:V2SF 1 "register_operand" "0") 407 (match_operand:V2SF 1 "register_operand" "0")
390 (match_operand:V2SF 2 "nonimmediate_operand" "ym")))] 408 (match_operand:V2SF 2 "nonimmediate_operand" "ym")))]
391 "TARGET_3DNOW" 409 "TARGET_3DNOW"
392 "pf<maxminfprefix>\t{%2, %0|%0, %2}" 410 "pf<maxminfprefix>\t{%2, %0|%0, %2}"
393 [(set_attr "type" "mmxadd") 411 [(set_attr "type" "mmxadd")
412 (set_attr "prefix_extra" "1")
394 (set_attr "mode" "V2SF")]) 413 (set_attr "mode" "V2SF")])
395 414
396 (define_insn "mmx_rcpv2sf2" 415 (define_insn "mmx_rcpv2sf2"
397 [(set (match_operand:V2SF 0 "register_operand" "=y") 416 [(set (match_operand:V2SF 0 "register_operand" "=y")
398 (unspec:V2SF [(match_operand:V2SF 1 "nonimmediate_operand" "ym")] 417 (unspec:V2SF [(match_operand:V2SF 1 "nonimmediate_operand" "ym")]
399 UNSPEC_PFRCP))] 418 UNSPEC_PFRCP))]
400 "TARGET_3DNOW" 419 "TARGET_3DNOW"
401 "pfrcp\t{%1, %0|%0, %1}" 420 "pfrcp\t{%1, %0|%0, %1}"
402 [(set_attr "type" "mmx") 421 [(set_attr "type" "mmx")
422 (set_attr "prefix_extra" "1")
403 (set_attr "mode" "V2SF")]) 423 (set_attr "mode" "V2SF")])
404 424
405 (define_insn "mmx_rcpit1v2sf3" 425 (define_insn "mmx_rcpit1v2sf3"
406 [(set (match_operand:V2SF 0 "register_operand" "=y") 426 [(set (match_operand:V2SF 0 "register_operand" "=y")
407 (unspec:V2SF [(match_operand:V2SF 1 "register_operand" "0") 427 (unspec:V2SF [(match_operand:V2SF 1 "register_operand" "0")
408 (match_operand:V2SF 2 "nonimmediate_operand" "ym")] 428 (match_operand:V2SF 2 "nonimmediate_operand" "ym")]
409 UNSPEC_PFRCPIT1))] 429 UNSPEC_PFRCPIT1))]
410 "TARGET_3DNOW" 430 "TARGET_3DNOW"
411 "pfrcpit1\t{%2, %0|%0, %2}" 431 "pfrcpit1\t{%2, %0|%0, %2}"
412 [(set_attr "type" "mmx") 432 [(set_attr "type" "mmx")
433 (set_attr "prefix_extra" "1")
413 (set_attr "mode" "V2SF")]) 434 (set_attr "mode" "V2SF")])
414 435
415 (define_insn "mmx_rcpit2v2sf3" 436 (define_insn "mmx_rcpit2v2sf3"
416 [(set (match_operand:V2SF 0 "register_operand" "=y") 437 [(set (match_operand:V2SF 0 "register_operand" "=y")
417 (unspec:V2SF [(match_operand:V2SF 1 "register_operand" "0") 438 (unspec:V2SF [(match_operand:V2SF 1 "register_operand" "0")
418 (match_operand:V2SF 2 "nonimmediate_operand" "ym")] 439 (match_operand:V2SF 2 "nonimmediate_operand" "ym")]
419 UNSPEC_PFRCPIT2))] 440 UNSPEC_PFRCPIT2))]
420 "TARGET_3DNOW" 441 "TARGET_3DNOW"
421 "pfrcpit2\t{%2, %0|%0, %2}" 442 "pfrcpit2\t{%2, %0|%0, %2}"
422 [(set_attr "type" "mmx") 443 [(set_attr "type" "mmx")
444 (set_attr "prefix_extra" "1")
423 (set_attr "mode" "V2SF")]) 445 (set_attr "mode" "V2SF")])
424 446
425 (define_insn "mmx_rsqrtv2sf2" 447 (define_insn "mmx_rsqrtv2sf2"
426 [(set (match_operand:V2SF 0 "register_operand" "=y") 448 [(set (match_operand:V2SF 0 "register_operand" "=y")
427 (unspec:V2SF [(match_operand:V2SF 1 "nonimmediate_operand" "ym")] 449 (unspec:V2SF [(match_operand:V2SF 1 "nonimmediate_operand" "ym")]
428 UNSPEC_PFRSQRT))] 450 UNSPEC_PFRSQRT))]
429 "TARGET_3DNOW" 451 "TARGET_3DNOW"
430 "pfrsqrt\t{%1, %0|%0, %1}" 452 "pfrsqrt\t{%1, %0|%0, %1}"
431 [(set_attr "type" "mmx") 453 [(set_attr "type" "mmx")
454 (set_attr "prefix_extra" "1")
432 (set_attr "mode" "V2SF")]) 455 (set_attr "mode" "V2SF")])
433 456
434 (define_insn "mmx_rsqit1v2sf3" 457 (define_insn "mmx_rsqit1v2sf3"
435 [(set (match_operand:V2SF 0 "register_operand" "=y") 458 [(set (match_operand:V2SF 0 "register_operand" "=y")
436 (unspec:V2SF [(match_operand:V2SF 1 "register_operand" "0") 459 (unspec:V2SF [(match_operand:V2SF 1 "register_operand" "0")
437 (match_operand:V2SF 2 "nonimmediate_operand" "ym")] 460 (match_operand:V2SF 2 "nonimmediate_operand" "ym")]
438 UNSPEC_PFRSQIT1))] 461 UNSPEC_PFRSQIT1))]
439 "TARGET_3DNOW" 462 "TARGET_3DNOW"
440 "pfrsqit1\t{%2, %0|%0, %2}" 463 "pfrsqit1\t{%2, %0|%0, %2}"
441 [(set_attr "type" "mmx") 464 [(set_attr "type" "mmx")
465 (set_attr "prefix_extra" "1")
442 (set_attr "mode" "V2SF")]) 466 (set_attr "mode" "V2SF")])
443 467
444 (define_insn "mmx_haddv2sf3" 468 (define_insn "mmx_haddv2sf3"
445 [(set (match_operand:V2SF 0 "register_operand" "=y") 469 [(set (match_operand:V2SF 0 "register_operand" "=y")
446 (vec_concat:V2SF 470 (vec_concat:V2SF
455 (parallel [(const_int 0)])) 479 (parallel [(const_int 0)]))
456 (vec_select:SF (match_dup 2) (parallel [(const_int 1)])))))] 480 (vec_select:SF (match_dup 2) (parallel [(const_int 1)])))))]
457 "TARGET_3DNOW" 481 "TARGET_3DNOW"
458 "pfacc\t{%2, %0|%0, %2}" 482 "pfacc\t{%2, %0|%0, %2}"
459 [(set_attr "type" "mmxadd") 483 [(set_attr "type" "mmxadd")
484 (set_attr "prefix_extra" "1")
460 (set_attr "mode" "V2SF")]) 485 (set_attr "mode" "V2SF")])
461 486
462 (define_insn "mmx_hsubv2sf3" 487 (define_insn "mmx_hsubv2sf3"
463 [(set (match_operand:V2SF 0 "register_operand" "=y") 488 [(set (match_operand:V2SF 0 "register_operand" "=y")
464 (vec_concat:V2SF 489 (vec_concat:V2SF
473 (parallel [(const_int 0)])) 498 (parallel [(const_int 0)]))
474 (vec_select:SF (match_dup 2) (parallel [(const_int 1)])))))] 499 (vec_select:SF (match_dup 2) (parallel [(const_int 1)])))))]
475 "TARGET_3DNOW_A" 500 "TARGET_3DNOW_A"
476 "pfnacc\t{%2, %0|%0, %2}" 501 "pfnacc\t{%2, %0|%0, %2}"
477 [(set_attr "type" "mmxadd") 502 [(set_attr "type" "mmxadd")
503 (set_attr "prefix_extra" "1")
478 (set_attr "mode" "V2SF")]) 504 (set_attr "mode" "V2SF")])
479 505
480 (define_insn "mmx_addsubv2sf3" 506 (define_insn "mmx_addsubv2sf3"
481 [(set (match_operand:V2SF 0 "register_operand" "=y") 507 [(set (match_operand:V2SF 0 "register_operand" "=y")
482 (vec_merge:V2SF 508 (vec_merge:V2SF
486 (minus:V2SF (match_dup 1) (match_dup 2)) 512 (minus:V2SF (match_dup 1) (match_dup 2))
487 (const_int 1)))] 513 (const_int 1)))]
488 "TARGET_3DNOW_A" 514 "TARGET_3DNOW_A"
489 "pfpnacc\t{%2, %0|%0, %2}" 515 "pfpnacc\t{%2, %0|%0, %2}"
490 [(set_attr "type" "mmxadd") 516 [(set_attr "type" "mmxadd")
517 (set_attr "prefix_extra" "1")
491 (set_attr "mode" "V2SF")]) 518 (set_attr "mode" "V2SF")])
492 519
493 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 520 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
494 ;; 521 ;;
495 ;; Parallel single-precision floating point comparisons 522 ;; Parallel single-precision floating point comparisons
508 (eq:V2SI (match_operand:V2SF 1 "nonimmediate_operand" "%0") 535 (eq:V2SI (match_operand:V2SF 1 "nonimmediate_operand" "%0")
509 (match_operand:V2SF 2 "nonimmediate_operand" "ym")))] 536 (match_operand:V2SF 2 "nonimmediate_operand" "ym")))]
510 "TARGET_3DNOW && ix86_binary_operator_ok (EQ, V2SFmode, operands)" 537 "TARGET_3DNOW && ix86_binary_operator_ok (EQ, V2SFmode, operands)"
511 "pfcmpeq\t{%2, %0|%0, %2}" 538 "pfcmpeq\t{%2, %0|%0, %2}"
512 [(set_attr "type" "mmxcmp") 539 [(set_attr "type" "mmxcmp")
540 (set_attr "prefix_extra" "1")
513 (set_attr "mode" "V2SF")]) 541 (set_attr "mode" "V2SF")])
514 542
515 (define_insn "mmx_gtv2sf3" 543 (define_insn "mmx_gtv2sf3"
516 [(set (match_operand:V2SI 0 "register_operand" "=y") 544 [(set (match_operand:V2SI 0 "register_operand" "=y")
517 (gt:V2SI (match_operand:V2SF 1 "register_operand" "0") 545 (gt:V2SI (match_operand:V2SF 1 "register_operand" "0")
518 (match_operand:V2SF 2 "nonimmediate_operand" "ym")))] 546 (match_operand:V2SF 2 "nonimmediate_operand" "ym")))]
519 "TARGET_3DNOW" 547 "TARGET_3DNOW"
520 "pfcmpgt\t{%2, %0|%0, %2}" 548 "pfcmpgt\t{%2, %0|%0, %2}"
521 [(set_attr "type" "mmxcmp") 549 [(set_attr "type" "mmxcmp")
550 (set_attr "prefix_extra" "1")
522 (set_attr "mode" "V2SF")]) 551 (set_attr "mode" "V2SF")])
523 552
524 (define_insn "mmx_gev2sf3" 553 (define_insn "mmx_gev2sf3"
525 [(set (match_operand:V2SI 0 "register_operand" "=y") 554 [(set (match_operand:V2SI 0 "register_operand" "=y")
526 (ge:V2SI (match_operand:V2SF 1 "register_operand" "0") 555 (ge:V2SI (match_operand:V2SF 1 "register_operand" "0")
527 (match_operand:V2SF 2 "nonimmediate_operand" "ym")))] 556 (match_operand:V2SF 2 "nonimmediate_operand" "ym")))]
528 "TARGET_3DNOW" 557 "TARGET_3DNOW"
529 "pfcmpge\t{%2, %0|%0, %2}" 558 "pfcmpge\t{%2, %0|%0, %2}"
530 [(set_attr "type" "mmxcmp") 559 [(set_attr "type" "mmxcmp")
560 (set_attr "prefix_extra" "1")
531 (set_attr "mode" "V2SF")]) 561 (set_attr "mode" "V2SF")])
532 562
533 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 563 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
534 ;; 564 ;;
535 ;; Parallel single-precision floating point conversion operations 565 ;; Parallel single-precision floating point conversion operations
540 [(set (match_operand:V2SI 0 "register_operand" "=y") 570 [(set (match_operand:V2SI 0 "register_operand" "=y")
541 (fix:V2SI (match_operand:V2SF 1 "nonimmediate_operand" "ym")))] 571 (fix:V2SI (match_operand:V2SF 1 "nonimmediate_operand" "ym")))]
542 "TARGET_3DNOW" 572 "TARGET_3DNOW"
543 "pf2id\t{%1, %0|%0, %1}" 573 "pf2id\t{%1, %0|%0, %1}"
544 [(set_attr "type" "mmxcvt") 574 [(set_attr "type" "mmxcvt")
575 (set_attr "prefix_extra" "1")
545 (set_attr "mode" "V2SF")]) 576 (set_attr "mode" "V2SF")])
546 577
547 (define_insn "mmx_pf2iw" 578 (define_insn "mmx_pf2iw"
548 [(set (match_operand:V2SI 0 "register_operand" "=y") 579 [(set (match_operand:V2SI 0 "register_operand" "=y")
549 (sign_extend:V2SI 580 (sign_extend:V2SI
551 (fix:V2SI 582 (fix:V2SI
552 (match_operand:V2SF 1 "nonimmediate_operand" "ym")))))] 583 (match_operand:V2SF 1 "nonimmediate_operand" "ym")))))]
553 "TARGET_3DNOW_A" 584 "TARGET_3DNOW_A"
554 "pf2iw\t{%1, %0|%0, %1}" 585 "pf2iw\t{%1, %0|%0, %1}"
555 [(set_attr "type" "mmxcvt") 586 [(set_attr "type" "mmxcvt")
587 (set_attr "prefix_extra" "1")
556 (set_attr "mode" "V2SF")]) 588 (set_attr "mode" "V2SF")])
557 589
558 (define_insn "mmx_pi2fw" 590 (define_insn "mmx_pi2fw"
559 [(set (match_operand:V2SF 0 "register_operand" "=y") 591 [(set (match_operand:V2SF 0 "register_operand" "=y")
560 (float:V2SF 592 (float:V2SF
562 (truncate:V2HI 594 (truncate:V2HI
563 (match_operand:V2SI 1 "nonimmediate_operand" "ym")))))] 595 (match_operand:V2SI 1 "nonimmediate_operand" "ym")))))]
564 "TARGET_3DNOW_A" 596 "TARGET_3DNOW_A"
565 "pi2fw\t{%1, %0|%0, %1}" 597 "pi2fw\t{%1, %0|%0, %1}"
566 [(set_attr "type" "mmxcvt") 598 [(set_attr "type" "mmxcvt")
599 (set_attr "prefix_extra" "1")
567 (set_attr "mode" "V2SF")]) 600 (set_attr "mode" "V2SF")])
568 601
569 (define_insn "mmx_floatv2si2" 602 (define_insn "mmx_floatv2si2"
570 [(set (match_operand:V2SF 0 "register_operand" "=y") 603 [(set (match_operand:V2SF 0 "register_operand" "=y")
571 (float:V2SF (match_operand:V2SI 1 "nonimmediate_operand" "ym")))] 604 (float:V2SF (match_operand:V2SI 1 "nonimmediate_operand" "ym")))]
572 "TARGET_3DNOW" 605 "TARGET_3DNOW"
573 "pi2fd\t{%1, %0|%0, %1}" 606 "pi2fd\t{%1, %0|%0, %1}"
574 [(set_attr "type" "mmxcvt") 607 [(set_attr "type" "mmxcvt")
608 (set_attr "prefix_extra" "1")
575 (set_attr "mode" "V2SF")]) 609 (set_attr "mode" "V2SF")])
576 610
577 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 611 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
578 ;; 612 ;;
579 ;; Parallel single-precision floating point element swizzling 613 ;; Parallel single-precision floating point element swizzling
585 (vec_select:V2SF (match_operand:V2SF 1 "nonimmediate_operand" "ym") 619 (vec_select:V2SF (match_operand:V2SF 1 "nonimmediate_operand" "ym")
586 (parallel [(const_int 1) (const_int 0)])))] 620 (parallel [(const_int 1) (const_int 0)])))]
587 "TARGET_3DNOW_A" 621 "TARGET_3DNOW_A"
588 "pswapd\t{%1, %0|%0, %1}" 622 "pswapd\t{%1, %0|%0, %1}"
589 [(set_attr "type" "mmxcvt") 623 [(set_attr "type" "mmxcvt")
624 (set_attr "prefix_extra" "1")
590 (set_attr "mode" "V2SF")]) 625 (set_attr "mode" "V2SF")])
591 626
592 (define_insn "*vec_dupv2sf" 627 (define_insn "*vec_dupv2sf"
593 [(set (match_operand:V2SF 0 "register_operand" "=y") 628 [(set (match_operand:V2SF 0 "register_operand" "=y")
594 (vec_duplicate:V2SF 629 (vec_duplicate:V2SF
885 (const_int 32768) (const_int 32768)])) 920 (const_int 32768) (const_int 32768)]))
886 (const_int 16))))] 921 (const_int 16))))]
887 "TARGET_3DNOW && ix86_binary_operator_ok (MULT, V4HImode, operands)" 922 "TARGET_3DNOW && ix86_binary_operator_ok (MULT, V4HImode, operands)"
888 "pmulhrw\t{%2, %0|%0, %2}" 923 "pmulhrw\t{%2, %0|%0, %2}"
889 [(set_attr "type" "mmxmul") 924 [(set_attr "type" "mmxmul")
925 (set_attr "prefix_extra" "1")
890 (set_attr "mode" "DI")]) 926 (set_attr "mode" "DI")])
891 927
892 (define_expand "sse2_umulv1siv1di3" 928 (define_expand "sse2_umulv1siv1di3"
893 [(set (match_operand:V1DI 0 "register_operand" "") 929 [(set (match_operand:V1DI 0 "register_operand" "")
894 (mult:V1DI 930 (mult:V1DI
963 (match_operand:MMXMODE24 1 "register_operand" "0") 999 (match_operand:MMXMODE24 1 "register_operand" "0")
964 (match_operand:SI 2 "nonmemory_operand" "yN")))] 1000 (match_operand:SI 2 "nonmemory_operand" "yN")))]
965 "TARGET_MMX" 1001 "TARGET_MMX"
966 "psra<mmxvecsize>\t{%2, %0|%0, %2}" 1002 "psra<mmxvecsize>\t{%2, %0|%0, %2}"
967 [(set_attr "type" "mmxshft") 1003 [(set_attr "type" "mmxshft")
1004 (set (attr "length_immediate")
1005 (if_then_else (match_operand 2 "const_int_operand" "")
1006 (const_string "1")
1007 (const_string "0")))
968 (set_attr "mode" "DI")]) 1008 (set_attr "mode" "DI")])
969 1009
970 (define_insn "mmx_lshr<mode>3" 1010 (define_insn "mmx_lshr<mode>3"
971 [(set (match_operand:MMXMODE248 0 "register_operand" "=y") 1011 [(set (match_operand:MMXMODE248 0 "register_operand" "=y")
972 (lshiftrt:MMXMODE248 1012 (lshiftrt:MMXMODE248
973 (match_operand:MMXMODE248 1 "register_operand" "0") 1013 (match_operand:MMXMODE248 1 "register_operand" "0")
974 (match_operand:SI 2 "nonmemory_operand" "yN")))] 1014 (match_operand:SI 2 "nonmemory_operand" "yN")))]
975 "TARGET_MMX" 1015 "TARGET_MMX"
976 "psrl<mmxvecsize>\t{%2, %0|%0, %2}" 1016 "psrl<mmxvecsize>\t{%2, %0|%0, %2}"
977 [(set_attr "type" "mmxshft") 1017 [(set_attr "type" "mmxshft")
1018 (set (attr "length_immediate")
1019 (if_then_else (match_operand 2 "const_int_operand" "")
1020 (const_string "1")
1021 (const_string "0")))
978 (set_attr "mode" "DI")]) 1022 (set_attr "mode" "DI")])
979 1023
980 (define_insn "mmx_ashl<mode>3" 1024 (define_insn "mmx_ashl<mode>3"
981 [(set (match_operand:MMXMODE248 0 "register_operand" "=y") 1025 [(set (match_operand:MMXMODE248 0 "register_operand" "=y")
982 (ashift:MMXMODE248 1026 (ashift:MMXMODE248
983 (match_operand:MMXMODE248 1 "register_operand" "0") 1027 (match_operand:MMXMODE248 1 "register_operand" "0")
984 (match_operand:SI 2 "nonmemory_operand" "yN")))] 1028 (match_operand:SI 2 "nonmemory_operand" "yN")))]
985 "TARGET_MMX" 1029 "TARGET_MMX"
986 "psll<mmxvecsize>\t{%2, %0|%0, %2}" 1030 "psll<mmxvecsize>\t{%2, %0|%0, %2}"
987 [(set_attr "type" "mmxshft") 1031 [(set_attr "type" "mmxshft")
1032 (set (attr "length_immediate")
1033 (if_then_else (match_operand 2 "const_int_operand" "")
1034 (const_string "1")
1035 (const_string "0")))
988 (set_attr "mode" "DI")]) 1036 (set_attr "mode" "DI")])
989 1037
990 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 1038 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
991 ;; 1039 ;;
992 ;; Parallel integral comparisons 1040 ;; Parallel integral comparisons
1037 [(set_attr "type" "mmxadd") 1085 [(set_attr "type" "mmxadd")
1038 (set_attr "mode" "DI")]) 1086 (set_attr "mode" "DI")])
1039 1087
1040 (define_expand "mmx_<code><mode>3" 1088 (define_expand "mmx_<code><mode>3"
1041 [(set (match_operand:MMXMODEI 0 "register_operand" "") 1089 [(set (match_operand:MMXMODEI 0 "register_operand" "")
1042 (plogic:MMXMODEI 1090 (any_logic:MMXMODEI
1043 (match_operand:MMXMODEI 1 "nonimmediate_operand" "") 1091 (match_operand:MMXMODEI 1 "nonimmediate_operand" "")
1044 (match_operand:MMXMODEI 2 "nonimmediate_operand" "")))] 1092 (match_operand:MMXMODEI 2 "nonimmediate_operand" "")))]
1045 "TARGET_MMX" 1093 "TARGET_MMX"
1046 "ix86_fixup_binary_operands_no_copy (<CODE>, <MODE>mode, operands);") 1094 "ix86_fixup_binary_operands_no_copy (<CODE>, <MODE>mode, operands);")
1047 1095
1048 (define_insn "*mmx_<code><mode>3" 1096 (define_insn "*mmx_<code><mode>3"
1049 [(set (match_operand:MMXMODEI 0 "register_operand" "=y") 1097 [(set (match_operand:MMXMODEI 0 "register_operand" "=y")
1050 (plogic:MMXMODEI 1098 (any_logic:MMXMODEI
1051 (match_operand:MMXMODEI 1 "nonimmediate_operand" "%0") 1099 (match_operand:MMXMODEI 1 "nonimmediate_operand" "%0")
1052 (match_operand:MMXMODEI 2 "nonimmediate_operand" "ym")))] 1100 (match_operand:MMXMODEI 2 "nonimmediate_operand" "ym")))]
1053 "TARGET_MMX && ix86_binary_operator_ok (<CODE>, <MODE>mode, operands)" 1101 "TARGET_MMX && ix86_binary_operator_ok (<CODE>, <MODE>mode, operands)"
1054 "p<plogicprefix>\t{%2, %0|%0, %2}" 1102 "p<logicprefix>\t{%2, %0|%0, %2}"
1055 [(set_attr "type" "mmxadd") 1103 [(set_attr "type" "mmxadd")
1056 (set_attr "mode" "DI")]) 1104 (set_attr "mode" "DI")])
1057 1105
1058 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 1106 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
1059 ;; 1107 ;;
1206 return "pinsrw\t{%3, %2, %0|%0, %2, %3}"; 1254 return "pinsrw\t{%3, %2, %0|%0, %2, %3}";
1207 else 1255 else
1208 return "pinsrw\t{%3, %k2, %0|%0, %k2, %3}"; 1256 return "pinsrw\t{%3, %k2, %0|%0, %k2, %3}";
1209 } 1257 }
1210 [(set_attr "type" "mmxcvt") 1258 [(set_attr "type" "mmxcvt")
1259 (set_attr "length_immediate" "1")
1211 (set_attr "mode" "DI")]) 1260 (set_attr "mode" "DI")])
1212 1261
1213 (define_insn "mmx_pextrw" 1262 (define_insn "mmx_pextrw"
1214 [(set (match_operand:SI 0 "register_operand" "=r") 1263 [(set (match_operand:SI 0 "register_operand" "=r")
1215 (zero_extend:SI 1264 (zero_extend:SI
1217 (match_operand:V4HI 1 "register_operand" "y") 1266 (match_operand:V4HI 1 "register_operand" "y")
1218 (parallel [(match_operand:SI 2 "const_0_to_3_operand" "n")]))))] 1267 (parallel [(match_operand:SI 2 "const_0_to_3_operand" "n")]))))]
1219 "TARGET_SSE || TARGET_3DNOW_A" 1268 "TARGET_SSE || TARGET_3DNOW_A"
1220 "pextrw\t{%2, %1, %0|%0, %1, %2}" 1269 "pextrw\t{%2, %1, %0|%0, %1, %2}"
1221 [(set_attr "type" "mmxcvt") 1270 [(set_attr "type" "mmxcvt")
1271 (set_attr "length_immediate" "1")
1222 (set_attr "mode" "DI")]) 1272 (set_attr "mode" "DI")])
1223 1273
1224 (define_expand "mmx_pshufw" 1274 (define_expand "mmx_pshufw"
1225 [(match_operand:V4HI 0 "register_operand" "") 1275 [(match_operand:V4HI 0 "register_operand" "")
1226 (match_operand:V4HI 1 "nonimmediate_operand" "") 1276 (match_operand:V4HI 1 "nonimmediate_operand" "")
1254 operands[2] = GEN_INT (mask); 1304 operands[2] = GEN_INT (mask);
1255 1305
1256 return "pshufw\t{%2, %1, %0|%0, %1, %2}"; 1306 return "pshufw\t{%2, %1, %0|%0, %1, %2}";
1257 } 1307 }
1258 [(set_attr "type" "mmxcvt") 1308 [(set_attr "type" "mmxcvt")
1309 (set_attr "length_immediate" "1")
1259 (set_attr "mode" "DI")]) 1310 (set_attr "mode" "DI")])
1260 1311
1261 (define_insn "mmx_pswapdv2si2" 1312 (define_insn "mmx_pswapdv2si2"
1262 [(set (match_operand:V2SI 0 "register_operand" "=y") 1313 [(set (match_operand:V2SI 0 "register_operand" "=y")
1263 (vec_select:V2SI 1314 (vec_select:V2SI
1264 (match_operand:V2SI 1 "nonimmediate_operand" "ym") 1315 (match_operand:V2SI 1 "nonimmediate_operand" "ym")
1265 (parallel [(const_int 1) (const_int 0)])))] 1316 (parallel [(const_int 1) (const_int 0)])))]
1266 "TARGET_3DNOW_A" 1317 "TARGET_3DNOW_A"
1267 "pswapd\t{%1, %0|%0, %1}" 1318 "pswapd\t{%1, %0|%0, %1}"
1268 [(set_attr "type" "mmxcvt") 1319 [(set_attr "type" "mmxcvt")
1320 (set_attr "prefix_extra" "1")
1269 (set_attr "mode" "DI")]) 1321 (set_attr "mode" "DI")])
1270 1322
1271 (define_insn "*vec_dupv4hi" 1323 (define_insn "*vec_dupv4hi"
1272 [(set (match_operand:V4HI 0 "register_operand" "=y") 1324 [(set (match_operand:V4HI 0 "register_operand" "=y")
1273 (vec_duplicate:V4HI 1325 (vec_duplicate:V4HI
1274 (truncate:HI 1326 (truncate:HI
1275 (match_operand:SI 1 "register_operand" "0"))))] 1327 (match_operand:SI 1 "register_operand" "0"))))]
1276 "TARGET_SSE || TARGET_3DNOW_A" 1328 "TARGET_SSE || TARGET_3DNOW_A"
1277 "pshufw\t{$0, %0, %0|%0, %0, 0}" 1329 "pshufw\t{$0, %0, %0|%0, %0, 0}"
1278 [(set_attr "type" "mmxcvt") 1330 [(set_attr "type" "mmxcvt")
1331 (set_attr "length_immediate" "1")
1279 (set_attr "mode" "DI")]) 1332 (set_attr "mode" "DI")])
1280 1333
1281 (define_insn "*vec_dupv2si" 1334 (define_insn "*vec_dupv2si"
1282 [(set (match_operand:V2SI 0 "register_operand" "=y") 1335 [(set (match_operand:V2SI 0 "register_operand" "=y")
1283 (vec_duplicate:V2SI 1336 (vec_duplicate:V2SI
1346 unpckhps\t%0, %0 1399 unpckhps\t%0, %0
1347 # 1400 #
1348 # 1401 #
1349 #" 1402 #"
1350 [(set_attr "type" "mmxcvt,sselog1,sselog1,sselog1,mmxmov,ssemov,imov") 1403 [(set_attr "type" "mmxcvt,sselog1,sselog1,sselog1,mmxmov,ssemov,imov")
1404 (set_attr "length_immediate" "*,*,1,*,*,*,*")
1351 (set_attr "mode" "DI,TI,TI,V4SF,SI,SI,SI")]) 1405 (set_attr "mode" "DI,TI,TI,V4SF,SI,SI,SI")])
1352 1406
1353 (define_split 1407 (define_split
1354 [(set (match_operand:SI 0 "register_operand" "") 1408 [(set (match_operand:SI 0 "register_operand" "")
1355 (vec_select:SI 1409 (vec_select:SI
1493 return "pavgb\t{%2, %0|%0, %2}"; 1547 return "pavgb\t{%2, %0|%0, %2}";
1494 else 1548 else
1495 return "pavgusb\t{%2, %0|%0, %2}"; 1549 return "pavgusb\t{%2, %0|%0, %2}";
1496 } 1550 }
1497 [(set_attr "type" "mmxshft") 1551 [(set_attr "type" "mmxshft")
1552 (set (attr "prefix_extra")
1553 (if_then_else
1554 (eq (symbol_ref "(TARGET_SSE || TARGET_3DNOW_A)") (const_int 0))
1555 (const_string "1")
1556 (const_string "*")))
1498 (set_attr "mode" "DI")]) 1557 (set_attr "mode" "DI")])
1499 1558
1500 (define_expand "mmx_uavgv4hi3" 1559 (define_expand "mmx_uavgv4hi3"
1501 [(set (match_operand:V4HI 0 "register_operand" "") 1560 [(set (match_operand:V4HI 0 "register_operand" "")
1502 (truncate:V4HI 1561 (truncate:V4HI
1582 ;; @@@ check ordering of operands in intel/nonintel syntax 1641 ;; @@@ check ordering of operands in intel/nonintel syntax
1583 "maskmovq\t{%2, %1|%1, %2}" 1642 "maskmovq\t{%2, %1|%1, %2}"
1584 [(set_attr "type" "mmxcvt") 1643 [(set_attr "type" "mmxcvt")
1585 (set_attr "mode" "DI")]) 1644 (set_attr "mode" "DI")])
1586 1645
1587 (define_insn "mmx_emms" 1646 (define_expand "mmx_emms"
1588 [(unspec_volatile [(const_int 0)] UNSPECV_EMMS) 1647 [(match_par_dup 0 [(const_int 0)])]
1589 (clobber (reg:XF ST0_REG)) 1648 "TARGET_MMX"
1590 (clobber (reg:XF ST1_REG)) 1649 {
1591 (clobber (reg:XF ST2_REG)) 1650 int regno;
1592 (clobber (reg:XF ST3_REG)) 1651
1593 (clobber (reg:XF ST4_REG)) 1652 operands[0] = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (17));
1594 (clobber (reg:XF ST5_REG)) 1653
1595 (clobber (reg:XF ST6_REG)) 1654 XVECEXP (operands[0], 0, 0)
1596 (clobber (reg:XF ST7_REG)) 1655 = gen_rtx_UNSPEC_VOLATILE (VOIDmode, gen_rtvec (1, const0_rtx),
1597 (clobber (reg:DI MM0_REG)) 1656 UNSPECV_EMMS);
1598 (clobber (reg:DI MM1_REG)) 1657
1599 (clobber (reg:DI MM2_REG)) 1658 for (regno = 0; regno < 8; regno++)
1600 (clobber (reg:DI MM3_REG)) 1659 {
1601 (clobber (reg:DI MM4_REG)) 1660 XVECEXP (operands[0], 0, regno + 1)
1602 (clobber (reg:DI MM5_REG)) 1661 = gen_rtx_CLOBBER (VOIDmode,
1603 (clobber (reg:DI MM6_REG)) 1662 gen_rtx_REG (XFmode, FIRST_STACK_REG + regno));
1604 (clobber (reg:DI MM7_REG))] 1663
1664 XVECEXP (operands[0], 0, regno + 9)
1665 = gen_rtx_CLOBBER (VOIDmode,
1666 gen_rtx_REG (DImode, FIRST_MMX_REG + regno));
1667 }
1668 })
1669
1670 (define_insn "*mmx_emms"
1671 [(match_parallel 0 "emms_operation"
1672 [(unspec_volatile [(const_int 0)] UNSPECV_EMMS)])]
1605 "TARGET_MMX" 1673 "TARGET_MMX"
1606 "emms" 1674 "emms"
1607 [(set_attr "type" "mmx") 1675 [(set_attr "type" "mmx")
1608 (set_attr "memory" "unknown")]) 1676 (set_attr "modrm" "0")
1609 1677 (set_attr "memory" "none")])
1610 (define_insn "mmx_femms" 1678
1611 [(unspec_volatile [(const_int 0)] UNSPECV_FEMMS) 1679 (define_expand "mmx_femms"
1612 (clobber (reg:XF ST0_REG)) 1680 [(match_par_dup 0 [(const_int 0)])]
1613 (clobber (reg:XF ST1_REG)) 1681 "TARGET_3DNOW"
1614 (clobber (reg:XF ST2_REG)) 1682 {
1615 (clobber (reg:XF ST3_REG)) 1683 int regno;
1616 (clobber (reg:XF ST4_REG)) 1684
1617 (clobber (reg:XF ST5_REG)) 1685 operands[0] = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (17));
1618 (clobber (reg:XF ST6_REG)) 1686
1619 (clobber (reg:XF ST7_REG)) 1687 XVECEXP (operands[0], 0, 0)
1620 (clobber (reg:DI MM0_REG)) 1688 = gen_rtx_UNSPEC_VOLATILE (VOIDmode, gen_rtvec (1, const0_rtx),
1621 (clobber (reg:DI MM1_REG)) 1689 UNSPECV_FEMMS);
1622 (clobber (reg:DI MM2_REG)) 1690
1623 (clobber (reg:DI MM3_REG)) 1691 for (regno = 0; regno < 8; regno++)
1624 (clobber (reg:DI MM4_REG)) 1692 {
1625 (clobber (reg:DI MM5_REG)) 1693 XVECEXP (operands[0], 0, regno + 1)
1626 (clobber (reg:DI MM6_REG)) 1694 = gen_rtx_CLOBBER (VOIDmode,
1627 (clobber (reg:DI MM7_REG))] 1695 gen_rtx_REG (XFmode, FIRST_STACK_REG + regno));
1696
1697 XVECEXP (operands[0], 0, regno + 9)
1698 = gen_rtx_CLOBBER (VOIDmode,
1699 gen_rtx_REG (DImode, FIRST_MMX_REG + regno));
1700 }
1701 })
1702
1703 (define_insn "*mmx_femms"
1704 [(match_parallel 0 "emms_operation"
1705 [(unspec_volatile [(const_int 0)] UNSPECV_FEMMS)])]
1628 "TARGET_3DNOW" 1706 "TARGET_3DNOW"
1629 "femms" 1707 "femms"
1630 [(set_attr "type" "mmx") 1708 [(set_attr "type" "mmx")
1709 (set_attr "modrm" "0")
1631 (set_attr "memory" "none")]) 1710 (set_attr "memory" "none")])