Mercurial > hg > CbC > CbC_gcc
comparison gcc/config/m32c/cond.md @ 55:77e2b8dfacca gcc-4.4.5
update it from 4.4.3 to 4.5.0
author | ryoma <e075725@ie.u-ryukyu.ac.jp> |
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date | Fri, 12 Feb 2010 23:39:51 +0900 |
parents | a06113de4d67 |
children | 04ced10e8804 |
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52:c156f1bd5cd9 | 55:77e2b8dfacca |
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56 "#" | 56 "#" |
57 "reload_completed" | 57 "reload_completed" |
58 [(set (reg:CC FLG_REGNO) | 58 [(set (reg:CC FLG_REGNO) |
59 (compare (match_dup 1) | 59 (compare (match_dup 1) |
60 (match_dup 2))) | 60 (match_dup 2))) |
61 (set (pc) (if_then_else (match_dup 4) | 61 (set (pc) (if_then_else (match_op_dup 0 [(reg:CC FLG_REGNO) (const_int 0)]) |
62 (label_ref (match_dup 3)) | 62 (label_ref (match_dup 3)) |
63 (pc)))] | 63 (pc)))] |
64 "operands[4] = m32c_cmp_flg_0 (operands[0]);" | 64 "" |
65 ) | 65 ) |
66 | |
67 (define_insn "bcc_op" | |
68 [(set (pc) | |
69 (if_then_else (match_operator 0 "ordered_comparison_operator" | |
70 [(reg:CC FLG_REGNO) (const_int 0)]) | |
71 (label_ref (match_operand 1 "")) | |
72 (pc)))] | |
73 "" | |
74 "j%c0\t%l1" | |
75 [(set_attr "flags" "n")] | |
76 ) | |
66 | 77 |
67 (define_insn "stzx_16" | 78 (define_insn "stzx_16" |
68 [(set (match_operand:QI 0 "mrai_operand" "=R0w,R0w,R0w") | 79 [(set (match_operand:QI 0 "mrai_operand" "=R0w,R0w,R0w") |
69 (if_then_else:QI (eq (reg:CC FLG_REGNO) (const_int 0)) | 80 (if_then_else:QI (eq (reg:CC FLG_REGNO) (const_int 0)) |
70 (match_operand:QI 1 "const_int_operand" "i,i,0") | 81 (match_operand:QI 1 "const_int_operand" "i,i,0") |
111 (match_operand:QHPSI 1 "mrai_operand" "RraSdi")))] | 122 (match_operand:QHPSI 1 "mrai_operand" "RraSdi")))] |
112 "" | 123 "" |
113 "* return m32c_output_compare(insn, operands); " | 124 "* return m32c_output_compare(insn, operands); " |
114 [(set_attr "flags" "oszc")]) | 125 [(set_attr "flags" "oszc")]) |
115 | 126 |
116 (define_expand "cmp<mode>" | |
117 [(set (reg:CC FLG_REGNO) | |
118 (compare (match_operand:QHPSI 0 "mra_operand" "RraSd") | |
119 (match_operand:QHPSI 1 "mrai_operand" "RraSdi")))] | |
120 "" | |
121 "m32c_pend_compare (operands); DONE;") | |
122 | |
123 (define_insn "b<code>_op" | |
124 [(set (pc) | |
125 (if_then_else (any_cond (reg:CC FLG_REGNO) | |
126 (const_int 0)) | |
127 (label_ref (match_operand 0 "")) | |
128 (pc)))] | |
129 "" | |
130 "j<code>\t%l0" | |
131 [(set_attr "flags" "n")] | |
132 ) | |
133 | |
134 (define_expand "b<code>" | |
135 [(set (pc) | |
136 (if_then_else (any_cond (reg:CC FLG_REGNO) | |
137 (const_int 0)) | |
138 (label_ref (match_operand 0 "")) | |
139 (pc)))] | |
140 "" | |
141 "m32c_unpend_compare ();" | |
142 ) | |
143 | |
144 ;; m32c_conditional_register_usage changes the setcc_gen_code array to | 127 ;; m32c_conditional_register_usage changes the setcc_gen_code array to |
145 ;; point to the _24 variants if needed. | 128 ;; point to the _24 variants if needed. |
146 | 129 |
147 ;; We need to keep the compare and conditional sets together through | 130 ;; We need to keep the compare and conditional sets together through |
148 ;; reload, because reload might need to add address reloads to the | 131 ;; reload, because reload might need to add address reloads to the |
149 ;; set, which would clobber the flags. By keeping them together, the | 132 ;; set, which would clobber the flags. By keeping them together, the |
150 ;; reloads get put before the compare, thus preserving the flags. | 133 ;; reloads get put before the compare, thus preserving the flags. |
151 | 134 |
152 ;; These are the post-split patterns for the conditional sets. | 135 ;; These are the post-split patterns for the conditional sets. |
153 | 136 |
154 (define_insn "s<code>_op" | 137 (define_insn "scc_op" |
155 [(set (match_operand:QI 0 "register_operand" "=Rqi") | 138 [(set (match_operand:QI 0 "register_operand" "=Rqi") |
156 (any_cond:QI (reg:CC FLG_REGNO) (const_int 0)))] | 139 (match_operator:QI 1 "ordered_comparison_operator" |
140 [(reg:CC FLG_REGNO) (const_int 0)]))] | |
157 "TARGET_A16 && reload_completed" | 141 "TARGET_A16 && reload_completed" |
158 "* return m32c_scc_pattern(operands, <CODE>);") | 142 "* return m32c_scc_pattern(operands, GET_CODE (operands[1]));") |
159 | 143 |
160 (define_insn "s<code>_24_op" | 144 (define_insn "scc_24_op" |
161 [(set (match_operand:HI 0 "mra_operand" "=RhiSd") | 145 [(set (match_operand:HI 0 "mra_operand" "=RhiSd") |
162 (any_cond:HI (reg:CC FLG_REGNO) (const_int 0)))] | 146 (match_operator:HI 1 "ordered_comparison_operator" |
147 [(reg:CC FLG_REGNO) (const_int 0)]))] | |
163 "TARGET_A24 && reload_completed" | 148 "TARGET_A24 && reload_completed" |
164 "sc<code>\t%0" | 149 "sc%c1\t%0" |
165 [(set_attr "flags" "n")] | 150 [(set_attr "flags" "n")] |
166 ) | 151 ) |
167 | 152 |
168 ;; These are the pre-split patterns for the conditional sets. Yes, | 153 ;; These are the pre-split patterns for the conditional sets. |
169 ;; there are a lot of permutations. | 154 |
170 | 155 (define_insn_and_split "cstore<mode>4" |
171 (define_insn_and_split "s<code>_<mode>" | |
172 [(set (match_operand:QI 0 "register_operand" "=Rqi") | 156 [(set (match_operand:QI 0 "register_operand" "=Rqi") |
173 (any_cond:QI (match_operand:QHPSI 1 "mra_operand" "RraSd") | 157 (match_operator:QI 1 "ordered_comparison_operator" |
174 (match_operand:QHPSI 2 "mrai_operand" "RraSdi")))] | 158 [(match_operand:QHPSI 2 "mra_operand" "RraSd") |
159 (match_operand:QHPSI 3 "mrai_operand" "RraSdi")]))] | |
175 "TARGET_A16" | 160 "TARGET_A16" |
176 "#" | 161 "#" |
177 "reload_completed" | 162 "reload_completed" |
178 [(set (reg:CC FLG_REGNO) | 163 [(set (reg:CC FLG_REGNO) |
179 (compare (match_dup 1) | 164 (compare (match_dup 2) |
180 (match_dup 2))) | 165 (match_dup 3))) |
181 (set (match_dup 0) | 166 (set (match_dup 0) |
182 (any_cond:QI (reg:CC FLG_REGNO) (const_int 0)))] | 167 (match_op_dup 1 [(reg:CC FLG_REGNO) (const_int 0)]))] |
183 "" | 168 "" |
184 [(set_attr "flags" "x")] | 169 [(set_attr "flags" "x")] |
185 ) | 170 ) |
186 | 171 |
187 (define_insn_and_split "s<code>_<mode>_24" | 172 (define_insn_and_split "cstore<mode>4_24" |
188 [(set (match_operand:HI 0 "mra_nopp_operand" "=RhiSd") | 173 [(set (match_operand:HI 0 "mra_nopp_operand" "=RhiSd") |
189 (any_cond:HI (match_operand:QHPSI 1 "mra_operand" "RraSd") | 174 (match_operator:HI 1 "ordered_comparison_operator" |
190 (match_operand:QHPSI 2 "mrai_operand" "RraSdi")))] | 175 [(match_operand:QHPSI 2 "mra_operand" "RraSd") |
191 "TARGET_A24" | 176 (match_operand:QHPSI 3 "mrai_operand" "RraSdi")]))] |
192 "#" | 177 "TARGET_A24" |
193 "reload_completed" | 178 "#" |
194 [(set (reg:CC FLG_REGNO) | 179 "reload_completed" |
195 (compare (match_dup 1) | 180 [(set (reg:CC FLG_REGNO) |
196 (match_dup 2))) | 181 (compare (match_dup 2) |
197 (set (match_dup 0) | 182 (match_dup 3))) |
198 (any_cond:HI (reg:CC FLG_REGNO) (const_int 0)))] | 183 (set (match_dup 0) |
184 (match_op_dup 1 [(reg:CC FLG_REGNO) (const_int 0)]))] | |
199 "" | 185 "" |
200 [(set_attr "flags" "x")] | 186 [(set_attr "flags" "x")] |
201 ) | 187 ) |
202 | 188 |
203 (define_insn_and_split "movqicc_<code>_<mode>" | 189 (define_insn_and_split "movqicc_<code>_<mode>" |
238 (match_dup 4)))] | 224 (match_dup 4)))] |
239 "" | 225 "" |
240 [(set_attr "flags" "x")] | 226 [(set_attr "flags" "x")] |
241 ) | 227 ) |
242 | 228 |
243 ;; And these are the expanders, which read the pending compare | 229 ;; And these are the expanders. |
244 ;; operands to build a combined insn. | |
245 | |
246 (define_expand "s<code>" | |
247 [(set (match_operand:QI 0 "register_operand" "=Rqi") | |
248 (any_cond:QI (reg:CC FLG_REGNO) (const_int 0)))] | |
249 "TARGET_A16" | |
250 "m32c_expand_scc (<CODE>, operands); DONE;") | |
251 | |
252 (define_expand "s<code>_24" | |
253 [(set (match_operand:HI 0 "mra_nopp_operand" "=RhiSd") | |
254 (any_cond:HI (reg:CC FLG_REGNO) (const_int 0)))] | |
255 "TARGET_A24" | |
256 "m32c_expand_scc (<CODE>, operands); DONE;") | |
257 | |
258 | 230 |
259 (define_expand "movqicc" | 231 (define_expand "movqicc" |
260 [(set (match_operand:QI 0 "register_operand" "") | 232 [(set (match_operand:QI 0 "register_operand" "") |
261 (if_then_else:QI (match_operand 1 "m32c_eqne_operator" "") | 233 (if_then_else:QI (match_operand 1 "m32c_eqne_operator" "") |
262 (match_operand:QI 2 "const_int_operand" "") | 234 (match_operand:QI 2 "const_int_operand" "") |