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comparison gcc/config/mcore/mcore.h @ 55:77e2b8dfacca gcc-4.4.5

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update it from 4.4.3 to 4.5.0
author ryoma <e075725@ie.u-ryukyu.ac.jp>
date Fri, 12 Feb 2010 23:39:51 +0900
parents a06113de4d67
children b7f97abdc517
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52:c156f1bd5cd9 55:77e2b8dfacca
1 /* Definitions of target machine for GNU compiler, 1 /* Definitions of target machine for GNU compiler,
2 for Motorola M*CORE Processor. 2 for Motorola M*CORE Processor.
3 Copyright (C) 1993, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007, 3 Copyright (C) 1993, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007,
4 2008 Free Software Foundation, Inc. 4 2008, 2009 Free Software Foundation, Inc.
5 5
6 This file is part of GCC. 6 This file is part of GCC.
7 7
8 GCC is free software; you can redistribute it and/or modify it 8 GCC is free software; you can redistribute it and/or modify it
9 under the terms of the GNU General Public License as published 9 under the terms of the GNU General Public License as published
301 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, 301 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
302 for any hard reg, then this must be 0 for correct output. */ 302 for any hard reg, then this must be 0 for correct output. */
303 #define MODES_TIEABLE_P(MODE1, MODE2) \ 303 #define MODES_TIEABLE_P(MODE1, MODE2) \
304 ((MODE1) == (MODE2) || GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2)) 304 ((MODE1) == (MODE2) || GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2))
305 305
306 /* Value should be nonzero if functions must have frame pointers.
307 Zero means the frame pointer need not be set up (and parms may be accessed
308 via the stack pointer) in functions that seem suitable. */
309 #define FRAME_POINTER_REQUIRED 0
310
311 /* Definitions for register eliminations. 306 /* Definitions for register eliminations.
312 307
313 We have two registers that can be eliminated on the MCore. First, the 308 We have two registers that can be eliminated on the MCore. First, the
314 frame pointer register can often be eliminated in favor of the stack 309 frame pointer register can often be eliminated in favor of the stack
315 pointer register. Secondly, the argument pointer register can always be 310 pointer register. Secondly, the argument pointer register can always be
327 in order of preference. */ 322 in order of preference. */
328 #define ELIMINABLE_REGS \ 323 #define ELIMINABLE_REGS \
329 {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ 324 {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
330 { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ 325 { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
331 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM},} 326 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM},}
332
333 /* Given FROM and TO register numbers, say whether this elimination
334 is allowed. */
335 #define CAN_ELIMINATE(FROM, TO) \
336 (!((FROM) == FRAME_POINTER_REGNUM && FRAME_POINTER_REQUIRED))
337 327
338 /* Define the offset between two registers, one to be eliminated, and the other 328 /* Define the offset between two registers, one to be eliminated, and the other
339 its replacement, at the start of a routine. */ 329 its replacement, at the start of a routine. */
340 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ 330 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
341 OFFSET = mcore_initial_elimination_offset (FROM, TO) 331 OFFSET = mcore_initial_elimination_offset (FROM, TO)
411 /* The same information, inverted: 401 /* The same information, inverted:
412 Return the class number of the smallest class containing 402 Return the class number of the smallest class containing
413 reg number REGNO. This could be a conditional expression 403 reg number REGNO. This could be a conditional expression
414 or could index an array. */ 404 or could index an array. */
415 405
416 extern const int regno_reg_class[FIRST_PSEUDO_REGISTER]; 406 extern const enum reg_class regno_reg_class[FIRST_PSEUDO_REGISTER];
417 #define REGNO_REG_CLASS(REGNO) regno_reg_class[REGNO] 407 #define REGNO_REG_CLASS(REGNO) regno_reg_class[REGNO]
418 408
419 /* When defined, the compiler allows registers explicitly used in the 409 /* When defined, the compiler allows registers explicitly used in the
420 rtl to be used as spill registers but prevents the compiler from 410 rtl to be used as spill registers but prevents the compiler from
421 extending the lifetime of these registers. */ 411 extending the lifetime of these registers. */
639 the stack pointer does not matter. The value is tested only in 629 the stack pointer does not matter. The value is tested only in
640 functions that have frame pointers. 630 functions that have frame pointers.
641 No definition is equivalent to always zero. */ 631 No definition is equivalent to always zero. */
642 #define EXIT_IGNORE_STACK 0 632 #define EXIT_IGNORE_STACK 0
643 633
644 /* Output assembler code for a block containing the constant parts
645 of a trampoline, leaving space for the variable parts.
646
647 On the MCore, the trampoline looks like:
648 lrw r1, function
649 lrw r13, area
650 jmp r13
651 or r0, r0
652 .literals */
653 #define TRAMPOLINE_TEMPLATE(FILE) \
654 { \
655 fprintf ((FILE), " .short 0x7102\n"); \
656 fprintf ((FILE), " .short 0x7d02\n"); \
657 fprintf ((FILE), " .short 0x00cd\n"); \
658 fprintf ((FILE), " .short 0x1e00\n"); \
659 fprintf ((FILE), " .long 0\n"); \
660 fprintf ((FILE), " .long 0\n"); \
661 }
662
663 /* Length in units of the trampoline for entering a nested function. */ 634 /* Length in units of the trampoline for entering a nested function. */
664 #define TRAMPOLINE_SIZE 12 635 #define TRAMPOLINE_SIZE 12
665 636
666 /* Alignment required for a trampoline in bits. */ 637 /* Alignment required for a trampoline in bits. */
667 #define TRAMPOLINE_ALIGNMENT 32 638 #define TRAMPOLINE_ALIGNMENT 32
668
669 /* Emit RTL insns to initialize the variable parts of a trampoline.
670 FNADDR is an RTX for the address of the function's pure code.
671 CXT is an RTX for the static chain value for the function. */
672 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
673 { \
674 emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 8)), \
675 (CXT)); \
676 emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 12)), \
677 (FNADDR)); \
678 }
679 639
680 /* Macros to check register numbers against specific register classes. */ 640 /* Macros to check register numbers against specific register classes. */
681 641
682 /* These assume that REGNO is a hard or pseudo reg number. 642 /* These assume that REGNO is a hard or pseudo reg number.
683 They give nonzero only if REGNO is a hard reg of the suitable class 643 They give nonzero only if REGNO is a hard reg of the suitable class
757 { \ 717 { \
758 if (GET_CODE (OP) == CONST_INT) \ 718 if (GET_CODE (OP) == CONST_INT) \
759 { \ 719 { \
760 if (GET_MODE_SIZE (MODE) >= 4 \ 720 if (GET_MODE_SIZE (MODE) >= 4 \
761 && (((unsigned HOST_WIDE_INT) INTVAL (OP)) % 4) == 0 \ 721 && (((unsigned HOST_WIDE_INT) INTVAL (OP)) % 4) == 0 \
762 && ((unsigned HOST_WIDE_INT) INTVAL (OP)) <= 64 - GET_MODE_SIZE (MODE)) \ 722 && ((unsigned HOST_WIDE_INT) INTVAL (OP)) \
723 <= (unsigned HOST_WIDE_INT) 64 - GET_MODE_SIZE (MODE)) \
763 goto LABEL; \ 724 goto LABEL; \
764 if (GET_MODE_SIZE (MODE) == 2 \ 725 if (GET_MODE_SIZE (MODE) == 2 \
765 && (((unsigned HOST_WIDE_INT) INTVAL (OP)) % 2) == 0 \ 726 && (((unsigned HOST_WIDE_INT) INTVAL (OP)) % 2) == 0 \
766 && ((unsigned HOST_WIDE_INT) INTVAL (OP)) <= 30) \ 727 && ((unsigned HOST_WIDE_INT) INTVAL (OP)) <= 30) \
767 goto LABEL; \ 728 goto LABEL; \
784 GO_IF_LEGITIMATE_INDEX (MODE, REGNO (xop0), xop1, LABEL); \ 745 GO_IF_LEGITIMATE_INDEX (MODE, REGNO (xop0), xop1, LABEL); \
785 if (BASE_REGISTER_RTX_P (xop1)) \ 746 if (BASE_REGISTER_RTX_P (xop1)) \
786 GO_IF_LEGITIMATE_INDEX (MODE, REGNO (xop1), xop0, LABEL); \ 747 GO_IF_LEGITIMATE_INDEX (MODE, REGNO (xop1), xop0, LABEL); \
787 } \ 748 } \
788 } 749 }
789
790 /* Go to LABEL if ADDR (a legitimate address expression)
791 has an effect that depends on the machine mode it is used for. */
792 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL)
793 750
794 /* Specify the machine mode that this machine uses 751 /* Specify the machine mode that this machine uses
795 for the index in the tablejump instruction. */ 752 for the index in the tablejump instruction. */
796 #define CASE_VECTOR_MODE SImode 753 #define CASE_VECTOR_MODE SImode
797 754