Mercurial > hg > CbC > CbC_gcc
comparison gcc/config/mips/predicates.md @ 55:77e2b8dfacca gcc-4.4.5
update it from 4.4.3 to 4.5.0
author | ryoma <e075725@ie.u-ryukyu.ac.jp> |
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date | Fri, 12 Feb 2010 23:39:51 +0900 |
parents | a06113de4d67 |
children | 04ced10e8804 |
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52:c156f1bd5cd9 | 55:77e2b8dfacca |
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74 (define_predicate "const_0_or_1_operand" | 74 (define_predicate "const_0_or_1_operand" |
75 (and (match_code "const_int") | 75 (and (match_code "const_int") |
76 (ior (match_test "op == CONST0_RTX (GET_MODE (op))") | 76 (ior (match_test "op == CONST0_RTX (GET_MODE (op))") |
77 (match_test "op == CONST1_RTX (GET_MODE (op))")))) | 77 (match_test "op == CONST1_RTX (GET_MODE (op))")))) |
78 | 78 |
79 (define_predicate "qi_mask_operand" | |
80 (and (match_code "const_int") | |
81 (match_test "UINTVAL (op) == 0xff"))) | |
82 | |
83 (define_predicate "hi_mask_operand" | |
84 (and (match_code "const_int") | |
85 (match_test "UINTVAL (op) == 0xffff"))) | |
86 | |
87 (define_predicate "si_mask_operand" | |
88 (and (match_code "const_int") | |
89 (match_test "UINTVAL (op) == 0xffffffff"))) | |
90 | |
91 (define_predicate "and_load_operand" | |
92 (ior (match_operand 0 "qi_mask_operand") | |
93 (match_operand 0 "hi_mask_operand") | |
94 (match_operand 0 "si_mask_operand"))) | |
95 | |
96 (define_predicate "low_bitmask_operand" | |
97 (and (match_test "ISA_HAS_EXT_INS") | |
98 (match_code "const_int") | |
99 (match_test "low_bitmask_len (mode, INTVAL (op)) > 16"))) | |
100 | |
101 (define_predicate "and_reg_operand" | |
102 (ior (match_operand 0 "register_operand") | |
103 (and (match_test "!TARGET_MIPS16") | |
104 (match_operand 0 "const_uns_arith_operand")) | |
105 (match_operand 0 "low_bitmask_operand") | |
106 (match_operand 0 "si_mask_operand"))) | |
107 | |
108 (define_predicate "and_operand" | |
109 (ior (match_operand 0 "and_load_operand") | |
110 (match_operand 0 "and_reg_operand"))) | |
111 | |
79 (define_predicate "d_operand" | 112 (define_predicate "d_operand" |
80 (and (match_code "reg") | 113 (and (match_code "reg") |
81 (match_test "TARGET_MIPS16 | 114 (match_test "TARGET_MIPS16 |
82 ? M16_REG_P (REGNO (op)) | 115 ? M16_REG_P (REGNO (op)) |
83 : GP_REG_P (REGNO (op))"))) | 116 : GP_REG_P (REGNO (op))"))) |
84 | 117 |
85 (define_predicate "lo_operand" | 118 (define_predicate "lo_operand" |
86 (and (match_code "reg") | 119 (and (match_code "reg") |
87 (match_test "REGNO (op) == LO_REGNUM"))) | 120 (match_test "REGNO (op) == LO_REGNUM"))) |
121 | |
122 (define_predicate "hilo_operand" | |
123 (and (match_code "reg") | |
124 (match_test "MD_REG_P (REGNO (op))"))) | |
88 | 125 |
89 (define_predicate "fcc_reload_operand" | 126 (define_predicate "fcc_reload_operand" |
90 (and (match_code "reg,subreg") | 127 (and (match_code "reg,subreg") |
91 (match_test "ST_REG_P (true_regnum (op))"))) | 128 (match_test "ST_REG_P (true_regnum (op))"))) |
92 | 129 |
209 default: | 246 default: |
210 return true; | 247 return true; |
211 } | 248 } |
212 }) | 249 }) |
213 | 250 |
251 (define_predicate "cprestore_save_slot_operand" | |
252 (and (match_code "mem") | |
253 (match_test "mips_cprestore_address_p (XEXP (op, 0), false)"))) | |
254 | |
255 (define_predicate "cprestore_load_slot_operand" | |
256 (and (match_code "mem") | |
257 (match_test "mips_cprestore_address_p (XEXP (op, 0), true)"))) | |
258 | |
214 (define_predicate "consttable_operand" | 259 (define_predicate "consttable_operand" |
215 (match_test "CONSTANT_P (op)")) | 260 (match_test "CONSTANT_P (op)")) |
216 | 261 |
217 (define_predicate "symbolic_operand" | 262 (define_predicate "symbolic_operand" |
218 (match_code "const,symbol_ref,label_ref") | 263 (match_code "const,symbol_ref,label_ref") |
283 (match_code "eq,ne,lt,ltu,ge,geu")) | 328 (match_code "eq,ne,lt,ltu,ge,geu")) |
284 | 329 |
285 (define_predicate "order_operator" | 330 (define_predicate "order_operator" |
286 (match_code "lt,ltu,le,leu,ge,geu,gt,gtu")) | 331 (match_code "lt,ltu,le,leu,ge,geu,gt,gtu")) |
287 | 332 |
333 ;; For NE, cstore uses sltu instructions in which the first operand is $0. | |
334 ;; This isn't possible in mips16 code. | |
335 | |
336 (define_predicate "mips_cstore_operator" | |
337 (ior (match_code "eq,gt,gtu,ge,geu,lt,ltu,le,leu") | |
338 (and (match_code "ne") (match_test "!TARGET_MIPS16")))) | |
288 | 339 |
289 (define_predicate "small_data_pattern" | 340 (define_predicate "small_data_pattern" |
290 (and (match_code "set,parallel,unspec,unspec_volatile,prefetch") | 341 (and (match_code "set,parallel,unspec,unspec_volatile,prefetch") |
291 (match_test "mips_small_data_pattern_p (op)"))) | 342 (match_test "mips_small_data_pattern_p (op)"))) |