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comparison gcc/config/mn10300/mn10300.md @ 55:77e2b8dfacca gcc-4.4.5

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update it from 4.4.3 to 4.5.0
author ryoma <e075725@ie.u-ryukyu.ac.jp>
date Fri, 12 Feb 2010 23:39:51 +0900
parents a06113de4d67
children f6334be47118
comparison
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52:c156f1bd5cd9 55:77e2b8dfacca
824 824
825 ;; ---------------------------------------------------------------------- 825 ;; ----------------------------------------------------------------------
826 ;; TEST INSTRUCTIONS 826 ;; TEST INSTRUCTIONS
827 ;; ---------------------------------------------------------------------- 827 ;; ----------------------------------------------------------------------
828 828
829 ;; Go ahead and define tstsi so we can eliminate redundant tst insns 829 (define_insn "*tst_extqisi_am33"
830 ;; when we start trying to optimize this port. 830 [(set (cc0) (compare
831 (define_insn "tstsi" 831 (zero_extend:SI (match_operand:QI 0 "memory_operand" "dx,!a"))
832 [(set (cc0) (match_operand:SI 0 "register_operand" "dax"))] 832 (const_int 0)))]
833 ""
834 "* return output_tst (operands[0], insn);"
835 [(set_attr "cc" "set_znv")])
836
837 (define_insn ""
838 [(set (cc0) (zero_extend:SI (match_operand:QI 0 "memory_operand" "dx,!a")))]
839 "TARGET_AM33" 833 "TARGET_AM33"
840 "* return output_tst (operands[0], insn);" 834 "* return output_tst (operands[0], insn);"
841 [(set_attr "cc" "set_znv")]) 835 [(set_attr "cc" "set_znv")])
842 836
843 (define_insn "" 837 (define_insn "*tst_extqisi"
844 [(set (cc0) (zero_extend:SI (match_operand:QI 0 "memory_operand" "dx")))] 838 [(set (cc0) (compare
839 (zero_extend:SI (match_operand:QI 0 "memory_operand" "dx"))
840 (const_int 0)))]
845 "" 841 ""
846 "* return output_tst (operands[0], insn);" 842 "* return output_tst (operands[0], insn);"
847 [(set_attr "cc" "set_znv")]) 843 [(set_attr "cc" "set_znv")])
848 844
849 (define_insn "" 845 (define_insn "*tst_exthisi_am33"
850 [(set (cc0) (zero_extend:SI (match_operand:HI 0 "memory_operand" "dx,!a")))] 846 [(set (cc0) (compare
847 (zero_extend:SI (match_operand:HI 0 "memory_operand" "dx,!a"))
848 (const_int 0)))]
851 "TARGET_AM33" 849 "TARGET_AM33"
852 "* return output_tst (operands[0], insn);" 850 "* return output_tst (operands[0], insn);"
853 [(set_attr "cc" "set_znv")]) 851 [(set_attr "cc" "set_znv")])
854 852
855 (define_insn "" 853 (define_insn "*tst_exthisi"
856 [(set (cc0) (zero_extend:SI (match_operand:HI 0 "memory_operand" "dx")))] 854 [(set (cc0) (compare
855 (zero_extend:SI (match_operand:HI 0 "memory_operand" "dx"))
856 (const_int 0)))]
857 "" 857 ""
858 "* return output_tst (operands[0], insn);" 858 "* return output_tst (operands[0], insn);"
859 [(set_attr "cc" "set_znv")]) 859 [(set_attr "cc" "set_znv")])
860 860
861 ;; Ordinarily, the cmp instruction will set the Z bit of cc0 to 1 if 861 ;; Ordinarily, the cmp instruction will set the Z bit of cc0 to 1 if
872 ;; the operands is used for input and the other for output. Since 872 ;; the operands is used for input and the other for output. Since
873 ;; this is not the case, it abort()s. Indeed, such a reload cannot be 873 ;; this is not the case, it abort()s. Indeed, such a reload cannot be
874 ;; possibly satisfied, so just mark the alternative with a `!', so 874 ;; possibly satisfied, so just mark the alternative with a `!', so
875 ;; that it is not considered by reload. 875 ;; that it is not considered by reload.
876 876
877 (define_insn "cmpsi" 877 (define_insn "*cmpsi"
878 [(set (cc0) 878 [(set (cc0)
879 (compare (match_operand:SI 0 "register_operand" "!*d*a*x,dax") 879 (compare (match_operand:SI 0 "register_operand" "!*d*a*x,dax,dax")
880 (match_operand:SI 1 "nonmemory_operand" "*0,daxi")))] 880 (match_operand:SI 1 "nonmemory_operand" "*0,I,daxi")))]
881 "" 881 ""
882 "@ 882 "*
883 btst 0,d0 883 {
884 cmp %1,%0" 884 if (which_alternative == 0)
885 [(set_attr "cc" "compare,compare")]) 885 return \"btst 0,d0\";
886 886 if (which_alternative == 1)
887 (define_insn "cmpsf" 887 return output_tst (operands[0], insn);
888 return \"cmp %1,%0\";
889 }"
890 [(set_attr "cc" "compare,set_znv,compare")])
891
892 (define_insn "*cmpsf"
888 [(set (cc0) 893 [(set (cc0)
889 (compare (match_operand:SF 0 "register_operand" "f,f") 894 (compare (match_operand:SF 0 "register_operand" "f,f")
890 (match_operand:SF 1 "nonmemory_operand" "f,F")))] 895 (match_operand:SF 1 "nonmemory_operand" "f,F")))]
891 "TARGET_AM33_2" 896 "TARGET_AM33_2"
892 "fcmp %1,%0" 897 "fcmp %1,%0"
1508 or %2,%0" 1513 or %2,%0"
1509 [(set_attr "cc" "clobber,clobber,set_znv")]) 1514 [(set_attr "cc" "clobber,clobber,set_znv")])
1510 1515
1511 (define_insn "" 1516 (define_insn ""
1512 [(set (cc0) 1517 [(set (cc0)
1513 (zero_extract:SI (match_operand:SI 0 "register_operand" "dx") 1518 (compare (zero_extract:SI (match_operand:SI 0 "register_operand" "dx")
1514 (match_operand 1 "const_int_operand" "") 1519 (match_operand 1 "const_int_operand" "")
1515 (match_operand 2 "const_int_operand" "")))] 1520 (match_operand 2 "const_int_operand" ""))
1521 (const_int 0)))]
1516 "" 1522 ""
1517 "* 1523 "*
1518 { 1524 {
1519 int len = INTVAL (operands[1]); 1525 int len = INTVAL (operands[1]);
1520 int bit = INTVAL (operands[2]); 1526 int bit = INTVAL (operands[2]);
1535 }" 1541 }"
1536 [(set_attr "cc" "clobber")]) 1542 [(set_attr "cc" "clobber")])
1537 1543
1538 (define_insn "" 1544 (define_insn ""
1539 [(set (cc0) 1545 [(set (cc0)
1540 (zero_extract:SI (match_operand:QI 0 "general_operand" "R,dx") 1546 (compare (zero_extract:SI (match_operand:QI 0 "general_operand" "R,dx")
1541 (match_operand 1 "const_int_operand" "") 1547 (match_operand 1 "const_int_operand" "")
1542 (match_operand 2 "const_int_operand" "")))] 1548 (match_operand 2 "const_int_operand" ""))
1549 (const_int 0)))]
1543 "mask_ok_for_mem_btst (INTVAL (operands[1]), INTVAL (operands[2]))" 1550 "mask_ok_for_mem_btst (INTVAL (operands[1]), INTVAL (operands[2]))"
1544 "* 1551 "*
1545 { 1552 {
1546 int len = INTVAL (operands[1]); 1553 int len = INTVAL (operands[1]);
1547 int bit = INTVAL (operands[2]); 1554 int bit = INTVAL (operands[2]);
1579 return \"\"; 1586 return \"\";
1580 }" 1587 }"
1581 [(set_attr "cc" "clobber")]) 1588 [(set_attr "cc" "clobber")])
1582 1589
1583 (define_insn "" 1590 (define_insn ""
1584 [(set (cc0) (and:SI (match_operand:SI 0 "register_operand" "dx") 1591 [(set (cc0) (compare (and:SI (match_operand:SI 0 "register_operand" "dx")
1585 (match_operand:SI 1 "const_int_operand" "")))] 1592 (match_operand:SI 1 "const_int_operand" ""))
1593 (const_int 0)))]
1586 "" 1594 ""
1587 "btst %1,%0" 1595 "btst %1,%0"
1588 [(set_attr "cc" "clobber")]) 1596 [(set_attr "cc" "clobber")])
1589 1597
1590 (define_insn "" 1598 (define_insn ""
1591 [(set (cc0) 1599 [(set (cc0)
1592 (and:SI 1600 (compare (and:SI
1593 (subreg:SI (match_operand:QI 0 "general_operand" "R,dx") 0) 1601 (subreg:SI (match_operand:QI 0 "general_operand" "R,dx") 0)
1594 (match_operand:SI 1 "const_8bit_operand" "")))] 1602 (match_operand:SI 1 "const_8bit_operand" ""))
1603 (const_int 0)))]
1595 "" 1604 ""
1596 "@ 1605 "@
1597 btst %U1,%A0 1606 btst %U1,%A0
1598 btst %1,%0" 1607 btst %1,%0"
1599 [(set_attr "cc" "clobber")]) 1608 [(set_attr "cc" "clobber")])
1601 1610
1602 ;; ---------------------------------------------------------------------- 1611 ;; ----------------------------------------------------------------------
1603 ;; JUMP INSTRUCTIONS 1612 ;; JUMP INSTRUCTIONS
1604 ;; ---------------------------------------------------------------------- 1613 ;; ----------------------------------------------------------------------
1605 1614
1615 (define_expand "cbranchsi4"
1616 [(set (cc0)
1617 (compare (match_operand:SI 1 "register_operand" "")
1618 (match_operand:SI 2 "nonmemory_operand" "")))
1619 (set (pc)
1620 (if_then_else
1621 (match_operator 0 "ordered_comparison_operator" [(cc0)
1622 (const_int 0)])
1623 (label_ref (match_operand 3 "" ""))
1624 (pc)))]
1625 ""
1626 "")
1627
1628 (define_expand "cbranchsf4"
1629 [(set (cc0)
1630 (compare (match_operand:SF 1 "register_operand" "")
1631 (match_operand:SF 2 "nonmemory_operand" "")))
1632 (set (pc)
1633 (if_then_else
1634 (match_operator 0 "ordered_comparison_operator" [(cc0)
1635 (const_int 0)])
1636 (label_ref (match_operand 3 "" ""))
1637 (pc)))]
1638 "TARGET_AM33_2"
1639 "")
1640
1641
1606 ;; Conditional jump instructions 1642 ;; Conditional jump instructions
1607
1608 (define_expand "ble"
1609 [(set (pc)
1610 (if_then_else (le (cc0)
1611 (const_int 0))
1612 (label_ref (match_operand 0 "" ""))
1613 (pc)))]
1614 ""
1615 "")
1616
1617 (define_expand "bleu"
1618 [(set (pc)
1619 (if_then_else (leu (cc0)
1620 (const_int 0))
1621 (label_ref (match_operand 0 "" ""))
1622 (pc)))]
1623 ""
1624 "")
1625
1626 (define_expand "bge"
1627 [(set (pc)
1628 (if_then_else (ge (cc0)
1629 (const_int 0))
1630 (label_ref (match_operand 0 "" ""))
1631 (pc)))]
1632 ""
1633 "")
1634
1635 (define_expand "bgeu"
1636 [(set (pc)
1637 (if_then_else (geu (cc0)
1638 (const_int 0))
1639 (label_ref (match_operand 0 "" ""))
1640 (pc)))]
1641 ""
1642 "")
1643
1644 (define_expand "blt"
1645 [(set (pc)
1646 (if_then_else (lt (cc0)
1647 (const_int 0))
1648 (label_ref (match_operand 0 "" ""))
1649 (pc)))]
1650 ""
1651 "")
1652
1653 (define_expand "bltu"
1654 [(set (pc)
1655 (if_then_else (ltu (cc0)
1656 (const_int 0))
1657 (label_ref (match_operand 0 "" ""))
1658 (pc)))]
1659 ""
1660 "")
1661
1662 (define_expand "bgt"
1663 [(set (pc)
1664 (if_then_else (gt (cc0)
1665 (const_int 0))
1666 (label_ref (match_operand 0 "" ""))
1667 (pc)))]
1668 ""
1669 "")
1670
1671 (define_expand "bgtu"
1672 [(set (pc)
1673 (if_then_else (gtu (cc0)
1674 (const_int 0))
1675 (label_ref (match_operand 0 "" ""))
1676 (pc)))]
1677 ""
1678 "")
1679
1680 (define_expand "beq"
1681 [(set (pc)
1682 (if_then_else (eq (cc0)
1683 (const_int 0))
1684 (label_ref (match_operand 0 "" ""))
1685 (pc)))]
1686 ""
1687 "")
1688
1689 (define_expand "bne"
1690 [(set (pc)
1691 (if_then_else (ne (cc0)
1692 (const_int 0))
1693 (label_ref (match_operand 0 "" ""))
1694 (pc)))]
1695 ""
1696 "")
1697 1643
1698 (define_insn "" 1644 (define_insn ""
1699 [(set (pc) 1645 [(set (pc)
1700 (if_then_else (match_operator 1 "comparison_operator" 1646 (if_then_else (match_operator 1 "comparison_operator"
1701 [(cc0) (const_int 0)]) 1647 [(cc0) (const_int 0)])
1772 " 1718 "
1773 { 1719 {
1774 rtx table = gen_reg_rtx (SImode); 1720 rtx table = gen_reg_rtx (SImode);
1775 rtx index = gen_reg_rtx (SImode); 1721 rtx index = gen_reg_rtx (SImode);
1776 rtx addr = gen_reg_rtx (Pmode); 1722 rtx addr = gen_reg_rtx (Pmode);
1723 rtx test;
1777 1724
1778 emit_move_insn (table, gen_rtx_LABEL_REF (VOIDmode, operands[3])); 1725 emit_move_insn (table, gen_rtx_LABEL_REF (VOIDmode, operands[3]));
1779 emit_move_insn (index, plus_constant (operands[0], - INTVAL (operands[1]))); 1726 emit_move_insn (index, plus_constant (operands[0], - INTVAL (operands[1])));
1780 emit_insn (gen_cmpsi (index, operands[2])); 1727 test = gen_rtx_fmt_ee (GTU, VOIDmode, index, operands[2]);
1781 emit_jump_insn (gen_bgtu (operands[4])); 1728 emit_jump_insn (gen_cbranchsi4 (test, index, operands[2], operands[4]));
1729
1782 emit_move_insn (index, gen_rtx_ASHIFT (SImode, index, const2_rtx)); 1730 emit_move_insn (index, gen_rtx_ASHIFT (SImode, index, const2_rtx));
1783 emit_move_insn (addr, gen_rtx_MEM (SImode, 1731 emit_move_insn (addr, gen_rtx_MEM (SImode,
1784 gen_rtx_PLUS (SImode, table, index))); 1732 gen_rtx_PLUS (SImode, table, index)));
1785 if (flag_pic) 1733 if (flag_pic)
1786 emit_move_insn (addr, gen_rtx_PLUS (SImode, addr, table)); 1734 emit_move_insn (addr, gen_rtx_PLUS (SImode, addr, table));
2516 ;; check for the Z flag set and C flag clear. 2464 ;; check for the Z flag set and C flag clear.
2517 ;; 2465 ;;
2518 ;; This will work on the mn10200 because we can check the ZX flag 2466 ;; This will work on the mn10200 because we can check the ZX flag
2519 ;; if the comparison is in HImode. 2467 ;; if the comparison is in HImode.
2520 (define_peephole 2468 (define_peephole
2521 [(set (cc0) (match_operand:SI 0 "register_operand" "dx")) 2469 [(set (cc0) (compare (match_operand:SI 0 "register_operand" "dx")
2470 (const_int 0)))
2522 (set (pc) (if_then_else (ge (cc0) (const_int 0)) 2471 (set (pc) (if_then_else (ge (cc0) (const_int 0))
2523 (match_operand 1 "" "") 2472 (match_operand 1 "" "")
2524 (pc)))] 2473 (pc)))]
2525 "dead_or_set_p (ins1, operands[0]) && REG_OK_FOR_INDEX_P (operands[0])" 2474 "dead_or_set_p (ins1, operands[0]) && REG_OK_FOR_INDEX_P (operands[0])"
2526 "add %0,%0\;bcc %1" 2475 "add %0,%0\;bcc %1"
2527 [(set_attr "cc" "clobber")]) 2476 [(set_attr "cc" "clobber")])
2528 2477
2529 (define_peephole 2478 (define_peephole
2530 [(set (cc0) (match_operand:SI 0 "register_operand" "dx")) 2479 [(set (cc0) (compare (match_operand:SI 0 "register_operand" "dx")
2480 (const_int 0)))
2531 (set (pc) (if_then_else (lt (cc0) (const_int 0)) 2481 (set (pc) (if_then_else (lt (cc0) (const_int 0))
2532 (match_operand 1 "" "") 2482 (match_operand 1 "" "")
2533 (pc)))] 2483 (pc)))]
2534 "dead_or_set_p (ins1, operands[0]) && REG_OK_FOR_INDEX_P (operands[0])" 2484 "dead_or_set_p (ins1, operands[0]) && REG_OK_FOR_INDEX_P (operands[0])"
2535 "add %0,%0\;bcs %1" 2485 "add %0,%0\;bcs %1"
2536 [(set_attr "cc" "clobber")]) 2486 [(set_attr "cc" "clobber")])
2537 2487
2538 (define_peephole 2488 (define_peephole
2539 [(set (cc0) (match_operand:SI 0 "register_operand" "dx")) 2489 [(set (cc0) (compare (match_operand:SI 0 "register_operand" "dx")
2490 (const_int 0)))
2540 (set (pc) (if_then_else (ge (cc0) (const_int 0)) 2491 (set (pc) (if_then_else (ge (cc0) (const_int 0))
2541 (pc) 2492 (pc)
2542 (match_operand 1 "" "")))] 2493 (match_operand 1 "" "")))]
2543 "dead_or_set_p (ins1, operands[0]) && REG_OK_FOR_INDEX_P (operands[0])" 2494 "dead_or_set_p (ins1, operands[0]) && REG_OK_FOR_INDEX_P (operands[0])"
2544 "add %0,%0\;bcs %1" 2495 "add %0,%0\;bcs %1"
2545 [(set_attr "cc" "clobber")]) 2496 [(set_attr "cc" "clobber")])
2546 2497
2547 (define_peephole 2498 (define_peephole
2548 [(set (cc0) (match_operand:SI 0 "register_operand" "dx")) 2499 [(set (cc0) (compare (match_operand:SI 0 "register_operand" "dx")
2500 (const_int 0)))
2549 (set (pc) (if_then_else (lt (cc0) (const_int 0)) 2501 (set (pc) (if_then_else (lt (cc0) (const_int 0))
2550 (pc) 2502 (pc)
2551 (match_operand 1 "" "")))] 2503 (match_operand 1 "" "")))]
2552 "dead_or_set_p (ins1, operands[0]) && REG_OK_FOR_INDEX_P (operands[0])" 2504 "dead_or_set_p (ins1, operands[0]) && REG_OK_FOR_INDEX_P (operands[0])"
2553 "add %0,%0\;bcc %1" 2505 "add %0,%0\;bcc %1"