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comparison gcc/config/rs6000/constraints.md @ 55:77e2b8dfacca gcc-4.4.5

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update it from 4.4.3 to 4.5.0
author ryoma <e075725@ie.u-ryukyu.ac.jp>
date Fri, 12 Feb 2010 23:39:51 +0900
parents a06113de4d67
children b7f97abdc517
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52:c156f1bd5cd9 55:77e2b8dfacca
15 ;; 15 ;;
16 ;; You should have received a copy of the GNU General Public License 16 ;; You should have received a copy of the GNU General Public License
17 ;; along with GCC; see the file COPYING3. If not see 17 ;; along with GCC; see the file COPYING3. If not see
18 ;; <http://www.gnu.org/licenses/>. 18 ;; <http://www.gnu.org/licenses/>.
19 19
20 ;; Available constraint letters: "e", "k", "u", "A", "B", "C", "D"
21
20 ;; Register constraints 22 ;; Register constraints
21 23
22 (define_register_constraint "f" "TARGET_HARD_FLOAT && TARGET_FPRS 24 (define_register_constraint "f" "rs6000_constraints[RS6000_CONSTRAINT_f]"
23 ? FLOAT_REGS : NO_REGS" 25 "@internal")
26
27 (define_register_constraint "d" "rs6000_constraints[RS6000_CONSTRAINT_d]"
24 "@internal") 28 "@internal")
25 29
26 (define_register_constraint "b" "BASE_REGS" 30 (define_register_constraint "b" "BASE_REGS"
27 "@internal") 31 "@internal")
28 32
47 (define_register_constraint "y" "CR_REGS" 51 (define_register_constraint "y" "CR_REGS"
48 "@internal") 52 "@internal")
49 53
50 (define_register_constraint "z" "XER_REGS" 54 (define_register_constraint "z" "XER_REGS"
51 "@internal") 55 "@internal")
56
57 ;; Use w as a prefix to add VSX modes
58 ;; vector double (V2DF)
59 (define_register_constraint "wd" "rs6000_constraints[RS6000_CONSTRAINT_wd]"
60 "@internal")
61
62 ;; vector float (V4SF)
63 (define_register_constraint "wf" "rs6000_constraints[RS6000_CONSTRAINT_wf]"
64 "@internal")
65
66 ;; scalar double (DF)
67 (define_register_constraint "ws" "rs6000_constraints[RS6000_CONSTRAINT_ws]"
68 "@internal")
69
70 ;; any VSX register
71 (define_register_constraint "wa" "rs6000_constraints[RS6000_CONSTRAINT_wa]"
72 "@internal")
73
74 ;; Altivec style load/store that ignores the bottom bits of the address
75 (define_memory_constraint "wZ"
76 "Indexed or indirect memory operand, ignoring the bottom 4 bits"
77 (match_operand 0 "altivec_indexed_or_indirect_operand"))
52 78
53 ;; Integer constraints 79 ;; Integer constraints
54 80
55 (define_constraint "I" 81 (define_constraint "I"
56 "A signed 16-bit constant" 82 "A signed 16-bit constant"
107 (and (match_code "const_double") 133 (and (match_code "const_double")
108 (match_test "num_insns_constant (op, mode) == 3"))) 134 (match_test "num_insns_constant (op, mode) == 3")))
109 135
110 ;; Memory constraints 136 ;; Memory constraints
111 137
138 (define_memory_constraint "es"
139 "A ``stable'' memory operand; that is, one which does not include any
140 automodification of the base register. Unlike @samp{m}, this constraint
141 can be used in @code{asm} statements that might access the operand
142 several times, or that might not access it at all."
143 (and (match_code "mem")
144 (match_test "GET_RTX_CLASS (GET_CODE (XEXP (op, 0))) != RTX_AUTOINC")))
145
112 (define_memory_constraint "Q" 146 (define_memory_constraint "Q"
113 "Memory operand that is just an offset from a reg" 147 "Memory operand that is an offset from a register (it is usually better
148 to use @samp{m} or @samp{es} in @code{asm} statements)"
114 (and (match_code "mem") 149 (and (match_code "mem")
115 (match_test "GET_CODE (XEXP (op, 0)) == REG"))) 150 (match_test "GET_CODE (XEXP (op, 0)) == REG")))
116 151
117 (define_memory_constraint "Y" 152 (define_memory_constraint "Y"
118 "Indexed or word-aligned displacement memory operand" 153 "Indexed or word-aligned displacement memory operand"
119 (match_operand 0 "word_offset_memref_operand")) 154 (match_operand 0 "word_offset_memref_operand"))
120 155
121 (define_memory_constraint "Z" 156 (define_memory_constraint "Z"
122 "Indexed or indirect memory operand" 157 "Memory operand that is an indexed or indirect from a register (it is
158 usually better to use @samp{m} or @samp{es} in @code{asm} statements)"
123 (match_operand 0 "indexed_or_indirect_operand")) 159 (match_operand 0 "indexed_or_indirect_operand"))
124 160
125 ;; Address constraints 161 ;; Address constraints
126 162
127 (define_address_constraint "a" 163 (define_address_constraint "a"
157 (not (match_operand 0 "mask64_operand")))) 193 (not (match_operand 0 "mask64_operand"))))
158 194
159 (define_constraint "W" 195 (define_constraint "W"
160 "vector constant that does not require memory" 196 "vector constant that does not require memory"
161 (match_operand 0 "easy_vector_constant")) 197 (match_operand 0 "easy_vector_constant"))
198
199 (define_constraint "j"
200 "Zero vector constant"
201 (match_test "(op == const0_rtx || op == CONST0_RTX (GET_MODE (op)))"))