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comparison gcc/config/rs6000/mpc.md @ 55:77e2b8dfacca gcc-4.4.5

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update it from 4.4.3 to 4.5.0
author ryoma <e075725@ie.u-ryukyu.ac.jp>
date Fri, 12 Feb 2010 23:39:51 +0900
parents a06113de4d67
children 04ced10e8804
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52:c156f1bd5cd9 55:77e2b8dfacca
1 ;; Scheduling description for Motorola PowerPC processor cores. 1 ;; Scheduling description for Motorola PowerPC processor cores.
2 ;; Copyright (C) 2003, 2004, 2007 Free Software Foundation, Inc. 2 ;; Copyright (C) 2003, 2004, 2007, 2009 Free Software Foundation, Inc.
3 ;; 3 ;;
4 ;; This file is part of GCC. 4 ;; This file is part of GCC.
5 ;; 5 ;;
6 ;; GCC is free software; you can redistribute it and/or modify it 6 ;; GCC is free software; you can redistribute it and/or modify it
7 ;; under the terms of the GNU General Public License as published 7 ;; under the terms of the GNU General Public License as published
41 (eq_attr "cpu" "mpccore")) 41 (eq_attr "cpu" "mpccore"))
42 "lsu_mpc") 42 "lsu_mpc")
43 43
44 (define_insn_reservation "mpccore-integer" 1 44 (define_insn_reservation "mpccore-integer" 1
45 (and (eq_attr "type" "integer,insert_word,insert_dword,shift,trap,\ 45 (and (eq_attr "type" "integer,insert_word,insert_dword,shift,trap,\
46 var_shift_rotate,cntlz,exts") 46 var_shift_rotate,cntlz,exts,isel")
47 (eq_attr "cpu" "mpccore")) 47 (eq_attr "cpu" "mpccore"))
48 "iu_mpc") 48 "iu_mpc")
49 49
50 (define_insn_reservation "mpccore-two" 1 50 (define_insn_reservation "mpccore-two" 1
51 (and (eq_attr "type" "two") 51 (and (eq_attr "type" "two")