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comparison gcc/config/rx/rx.h @ 55:77e2b8dfacca gcc-4.4.5

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update it from 4.4.3 to 4.5.0
author ryoma <e075725@ie.u-ryukyu.ac.jp>
date Fri, 12 Feb 2010 23:39:51 +0900
parents
children b7f97abdc517
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52:c156f1bd5cd9 55:77e2b8dfacca
1 /* GCC backend definitions for the Renesas RX processor.
2 Copyright (C) 2008, 2009 Free Software Foundation, Inc.
3 Contributed by Red Hat.
4
5 This file is part of GCC.
6
7 GCC is free software; you can redistribute it and/or modify it
8 under the terms of the GNU General Public License as published
9 by the Free Software Foundation; either version 3, or (at your
10 option) any later version.
11
12 GCC is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
20
21
22 #define TARGET_CPU_CPP_BUILTINS() \
23 do \
24 { \
25 builtin_define ("__RX__"); \
26 builtin_assert ("cpu=RX"); \
27 if (rx_cpu_type == RX610) \
28 builtin_assert ("machine=RX610"); \
29 else \
30 builtin_assert ("machine=RX600"); \
31 \
32 if (TARGET_BIG_ENDIAN_DATA) \
33 builtin_define ("__RX_BIG_ENDIAN__"); \
34 else \
35 builtin_define ("__RX_LITTLE_ENDIAN__");\
36 \
37 if (TARGET_32BIT_DOUBLES) \
38 builtin_define ("__RX_32BIT_DOUBLES__");\
39 else \
40 builtin_define ("__RX_64BIT_DOUBLES__");\
41 \
42 if (ALLOW_RX_FPU_INSNS) \
43 builtin_define ("__RX_FPU_INSNS__"); \
44 \
45 if (TARGET_AS100_SYNTAX) \
46 builtin_define ("__RX_AS100_SYNTAX__"); \
47 else \
48 builtin_define ("__RX_GAS_SYNTAX__"); \
49 } \
50 while (0)
51
52 enum rx_cpu_types
53 {
54 RX600,
55 RX610
56 };
57
58 extern enum rx_cpu_types rx_cpu_type;
59
60 #undef CC1_SPEC
61 #define CC1_SPEC "%{mas100-syntax:%{gdwarf*:%e-mas100-syntax is incompatible with -gdwarf}}"
62
63 #undef STARTFILE_SPEC
64 #define STARTFILE_SPEC "%{pg:gcrt0.o%s}%{!pg:crt0.o%s} crtbegin.o%s"
65
66 #undef ENDFILE_SPEC
67 #define ENDFILE_SPEC "crtend.o%s crtn.o%s"
68
69 #undef ASM_SPEC
70 #define ASM_SPEC "\
71 %{mbig-endian-data:-mbig-endian-data} \
72 %{m32bit-doubles:-m32bit-doubles} \
73 %{!m32bit-doubles:-m64bit-doubles} \
74 %{msmall-data-limit*:-msmall-data-limit} \
75 %{mrelax:-relax} \
76 "
77
78 #undef LIB_SPEC
79 #define LIB_SPEC " \
80 --start-group \
81 -lc \
82 %{msim*:-lsim}%{!msim*:-lnosys} \
83 %{fprofile-arcs|fprofile-generate|coverage:-lgcov} \
84 --end-group \
85 %{!T*: %{msim*:%Trx-sim.ld}%{!msim*:%Trx.ld}} \
86 "
87
88 #undef LINK_SPEC
89 #define LINK_SPEC "%{mbig-endian-data:--oformat elf32-rx-be} %{mrelax:-relax}"
90
91
92 #define BITS_BIG_ENDIAN 0
93 #define BYTES_BIG_ENDIAN TARGET_BIG_ENDIAN_DATA
94 #define WORDS_BIG_ENDIAN TARGET_BIG_ENDIAN_DATA
95
96 #ifdef __RX_BIG_ENDIAN__
97 #define LIBGCC2_WORDS_BIG_ENDIAN 1
98 #else
99 #define LIBGCC2_WORDS_BIG_ENDIAN 0
100 #endif
101
102 #define UNITS_PER_WORD 4
103
104 #define INT_TYPE_SIZE 32
105 #define LONG_TYPE_SIZE 32
106 #define LONG_LONG_TYPE_SIZE 64
107
108 #define FLOAT_TYPE_SIZE 32
109 #define DOUBLE_TYPE_SIZE (TARGET_32BIT_DOUBLES ? 32 : 64)
110 #define LONG_DOUBLE_TYPE_SIZE DOUBLE_TYPE_SIZE
111
112 #ifdef __RX_32BIT_DOUBLES__
113 #define LIBGCC2_HAS_DF_MODE 0
114 #define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 32
115 #define LIBGCC2_DOUBLE_TYPE_SIZE 32
116 #else
117 #define LIBGCC2_HAS_DF_MODE 1
118 #define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 64
119 #define LIBGCC2_DOUBLE_TYPE_SIZE 64
120 #endif
121
122 #define DEFAULT_SIGNED_CHAR 0
123
124 #define STRICT_ALIGNMENT 1
125 #define FUNCTION_BOUNDARY 8
126 #define BIGGEST_ALIGNMENT 32
127 #define STACK_BOUNDARY 32
128 #define PARM_BOUNDARY 8
129
130 #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) 32
131
132 #define STACK_GROWS_DOWNWARD 1
133 #define FRAME_GROWS_DOWNWARD 0
134 #define FIRST_PARM_OFFSET(FNDECL) 0
135
136 #define MAX_REGS_PER_ADDRESS 2
137
138 #define Pmode SImode
139 #define POINTER_SIZE 32
140 #undef SIZE_TYPE
141 #define SIZE_TYPE "long unsigned int"
142 #define POINTERS_EXTEND_UNSIGNED 1
143 #define FUNCTION_MODE QImode
144 #define CASE_VECTOR_MODE Pmode
145 #define WORD_REGISTER_OPERATIONS 1
146 #define HAS_LONG_COND_BRANCH 0
147 #define HAS_LONG_UNCOND_BRANCH 0
148
149 #define MOVE_MAX 4
150 #define STARTING_FRAME_OFFSET 0
151
152 #define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, SIZE) 0
153 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
154
155 #define LEGITIMATE_CONSTANT_P(X) rx_is_legitimate_constant (X)
156
157 #define HANDLE_PRAGMA_PACK_PUSH_POP 1
158
159 #define HAVE_PRE_DECCREMENT 1
160 #define HAVE_POST_INCREMENT 1
161
162 #define MOVE_RATIO(SPEED) ((SPEED) ? 4 : 2)
163 #define SLOW_BYTE_ACCESS 1
164
165 #define STORE_FLAG_VALUE 1
166 #define LOAD_EXTEND_OP(MODE) SIGN_EXTEND
167 #define SHORT_IMMEDIATES_SIGN_EXTEND 1
168
169 enum reg_class
170 {
171 NO_REGS, /* No registers in set. */
172 GR_REGS, /* Integer registers. */
173 ALL_REGS, /* All registers. */
174 LIM_REG_CLASSES /* Max value + 1. */
175 };
176
177 #define REG_CLASS_NAMES \
178 { \
179 "NO_REGS", \
180 "GR_REGS", \
181 "ALL_REGS" \
182 }
183
184 #define REG_CLASS_CONTENTS \
185 { \
186 { 0x00000000 }, /* No registers, */ \
187 { 0x0000ffff }, /* Integer registers. */ \
188 { 0x0000ffff } /* All registers. */ \
189 }
190
191 #define IRA_COVER_CLASSES \
192 { \
193 GR_REGS, LIM_REG_CLASSES \
194 }
195
196 #define SMALL_REGISTER_CLASSES 0
197 #define N_REG_CLASSES (int) LIM_REG_CLASSES
198 #define CLASS_MAX_NREGS(CLASS, MODE) ((GET_MODE_SIZE (MODE) \
199 + UNITS_PER_WORD - 1) \
200 / UNITS_PER_WORD)
201
202 #define GENERAL_REGS GR_REGS
203 #define BASE_REG_CLASS GR_REGS
204 #define INDEX_REG_CLASS GR_REGS
205
206 #define FIRST_PSEUDO_REGISTER 16
207
208 #define REGNO_REG_CLASS(REGNO) ((REGNO) < FIRST_PSEUDO_REGISTER \
209 ? GR_REGS : NO_REGS)
210
211 #define STACK_POINTER_REGNUM 0
212 #define FUNC_RETURN_REGNUM 1
213 #define FRAME_POINTER_REGNUM 6
214 #define ARG_POINTER_REGNUM 7
215 #define STATIC_CHAIN_REGNUM 8
216 #define TRAMPOLINE_TEMP_REGNUM 9
217 #define STRUCT_VAL_REGNUM 15
218
219 /* This is the register which is used to hold the address of the start
220 of the small data area, if that feature is being used. Note - this
221 register must not be call_used because otherwise library functions
222 that are compiled without small data support might clobber it.
223
224 FIXME: The function gcc/config/rx/rx.c:rx_gen_move_template() has a
225 built in copy of this register's name, rather than constructing the
226 name from this #define. */
227 #define GP_BASE_REGNUM 13
228
229 #define ELIMINABLE_REGS \
230 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM }, \
231 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM }, \
232 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM }}
233
234 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
235 (OFFSET) = rx_initial_elimination_offset ((FROM), (TO))
236
237
238 #define FUNCTION_ARG_REGNO_P(N) (((N) >= 1) && ((N) <= 4))
239 #define FUNCTION_VALUE_REGNO_P(N) ((N) == FUNC_RETURN_REGNUM)
240 #define DEFAULT_PCC_STRUCT_RETURN 0
241
242 #define FIXED_REGISTERS \
243 { \
244 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 \
245 }
246
247 #define CALL_USED_REGISTERS \
248 { \
249 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1 \
250 }
251
252 #define CONDITIONAL_REGISTER_USAGE \
253 rx_conditional_register_usage ()
254
255 #define LIBCALL_VALUE(MODE) \
256 gen_rtx_REG (((GET_MODE_CLASS (MODE) != MODE_INT \
257 || GET_MODE_SIZE (MODE) >= 4) \
258 ? (MODE) \
259 : SImode), \
260 FUNC_RETURN_REGNUM)
261
262 /* Order of allocation of registers. */
263
264 #define REG_ALLOC_ORDER \
265 { 7, 10, 11, 12, 13, 14, 4, 3, 2, 1, 9, 8, 6, 5, 15 \
266 }
267
268 #define PREFERRED_RELOAD_CLASS(X,CLASS) CLASS
269
270 #define REGNO_IN_RANGE(REGNO, MIN, MAX) \
271 (IN_RANGE ((REGNO), (MIN), (MAX)) \
272 || (reg_renumber != NULL \
273 && reg_renumber[(REGNO)] >= (MIN) \
274 && reg_renumber[(REGNO)] <= (MAX)))
275
276 #ifdef REG_OK_STRICT
277 #define REGNO_OK_FOR_BASE_P(regno) REGNO_IN_RANGE (regno, 0, 15)
278 #else
279 #define REGNO_OK_FOR_BASE_P(regno) 1
280 #endif
281
282 #define REGNO_OK_FOR_INDEX_P(regno) REGNO_OK_FOR_BASE_P (regno)
283
284 #define RTX_OK_FOR_BASE(X, STRICT) \
285 ((STRICT) ? \
286 ( (REG_P (X) \
287 && REGNO_IN_RANGE (REGNO (X), 0, 15)) \
288 || (GET_CODE (X) == SUBREG \
289 && REG_P (SUBREG_REG (X)) \
290 && REGNO_IN_RANGE (REGNO (SUBREG_REG (X)), 0, 15))) \
291 : \
292 ( (REG_P (X) \
293 || (GET_CODE (X) == SUBREG \
294 && REG_P (SUBREG_REG (X))))))
295
296 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL) \
297 do \
298 { \
299 if (rx_is_mode_dependent_addr (ADDR)) \
300 goto LABEL; \
301 } \
302 while (0)
303
304
305 #define RETURN_ADDR_RTX(COUNT, FRAMEADDR) \
306 ((COUNT) == 0 \
307 ? gen_rtx_MEM (Pmode, gen_rtx_PLUS (Pmode, arg_pointer_rtx, GEN_INT (-4))) \
308 : NULL_RTX)
309
310 #define INCOMING_RETURN_ADDR_RTX gen_rtx_MEM (Pmode, stack_pointer_rtx)
311
312 #define ACCUMULATE_OUTGOING_ARGS 1
313
314 typedef unsigned int CUMULATIVE_ARGS;
315
316 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
317 (CUM) = 0
318
319 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
320 rx_function_arg (& CUM, MODE, TYPE, NAMED)
321
322 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
323 (CUM) += rx_function_arg_size (MODE, TYPE)
324
325 #define TRAMPOLINE_SIZE (! TARGET_BIG_ENDIAN_DATA ? 14 : 20)
326 #define TRAMPOLINE_ALIGNMENT 32
327
328 #define NO_PROFILE_COUNTERS 1
329 #define PROFILE_BEFORE_PROLOGUE 1
330
331 #define FUNCTION_PROFILER(FILE, LABELNO) \
332 fprintf (FILE, "\tbsr\t__mcount\n");
333
334
335 #define HARD_REGNO_NREGS(REGNO, MODE) CLASS_MAX_NREGS (0, MODE)
336
337 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
338 REGNO_REG_CLASS (REGNO) == GR_REGS
339
340 #define MODES_TIEABLE_P(MODE1, MODE2) \
341 ( ( GET_MODE_CLASS (MODE1) == MODE_FLOAT \
342 || GET_MODE_CLASS (MODE1) == MODE_COMPLEX_FLOAT) \
343 == ( GET_MODE_CLASS (MODE2) == MODE_FLOAT \
344 || GET_MODE_CLASS (MODE2) == MODE_COMPLEX_FLOAT))
345
346
347 #define REGISTER_NAMES \
348 { \
349 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
350 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" \
351 };
352
353 #define ADDITIONAL_REGISTER_NAMES \
354 { \
355 { "sp", STACK_POINTER_REGNUM } \
356 , { "fp", FRAME_POINTER_REGNUM } \
357 , { "arg", ARG_POINTER_REGNUM } \
358 , { "chain", STATIC_CHAIN_REGNUM } \
359 }
360
361 #define DATA_SECTION_ASM_OP \
362 (TARGET_AS100_SYNTAX ? "\t.SECTION D,DATA" \
363 : "\t.section D,\"aw\",@progbits\n\t.p2align 2")
364
365 #define SDATA_SECTION_ASM_OP \
366 (TARGET_AS100_SYNTAX ? "\t.SECTION D_2,DATA,ALIGN=2" \
367 : "\t.section D_2,\"aw\",@progbits\n\t.p2align 1")
368
369 #undef READONLY_DATA_SECTION_ASM_OP
370 #define READONLY_DATA_SECTION_ASM_OP \
371 (TARGET_AS100_SYNTAX ? "\t.SECTION C,ROMDATA,ALIGN=4" \
372 : "\t.section C,\"a\",@progbits\n\t.p2align 2")
373
374 #define BSS_SECTION_ASM_OP \
375 (TARGET_AS100_SYNTAX ? "\t.SECTION B,DATA,ALIGN=4" \
376 : "\t.section B,\"w\",@nobits\n\t.p2align 2")
377
378 #define SBSS_SECTION_ASM_OP \
379 (TARGET_AS100_SYNTAX ? "\t.SECTION B_2,DATA,ALIGN=2" \
380 : "\t.section B_2,\"w\",@nobits\n\t.p2align 1")
381
382 /* The following definitions are conditional depending upon whether the
383 compiler is being built or crtstuff.c is being compiled by the built
384 compiler. */
385 #if defined CRT_BEGIN || defined CRT_END
386 # ifdef __RX_AS100_SYNTAX
387 # define TEXT_SECTION_ASM_OP "\t.SECTION P,CODE"
388 # define CTORS_SECTION_ASM_OP "\t.SECTION init_array,CODE"
389 # define DTORS_SECTION_ASM_OP "\t.SECTION fini_array,CODE"
390 # define INIT_ARRAY_SECTION_ASM_OP "\t.SECTION init_array,CODE"
391 # define FINI_ARRAY_SECTION_ASM_OP "\t.SECTION fini_array,CODE"
392 # else
393 # define TEXT_SECTION_ASM_OP "\t.section P,\"ax\""
394 # define CTORS_SECTION_ASM_OP \
395 "\t.section\t.init_array,\"aw\",@init_array"
396 # define DTORS_SECTION_ASM_OP \
397 "\t.section\t.fini_array,\"aw\",@fini_array"
398 # define INIT_ARRAY_SECTION_ASM_OP \
399 "\t.section\t.init_array,\"aw\",@init_array"
400 # define FINI_ARRAY_SECTION_ASM_OP \
401 "\t.section\t.fini_array,\"aw\",@fini_array"
402 # endif
403 #else
404 # define TEXT_SECTION_ASM_OP \
405 (TARGET_AS100_SYNTAX ? "\t.SECTION P,CODE" : "\t.section P,\"ax\"")
406
407 # define CTORS_SECTION_ASM_OP \
408 (TARGET_AS100_SYNTAX ? "\t.SECTION init_array,CODE" \
409 : "\t.section\t.init_array,\"aw\",@init_array")
410
411 # define DTORS_SECTION_ASM_OP \
412 (TARGET_AS100_SYNTAX ? "\t.SECTION fini_array,CODE" \
413 : "\t.section\t.fini_array,\"aw\",@fini_array")
414
415 # define INIT_ARRAY_SECTION_ASM_OP \
416 (TARGET_AS100_SYNTAX ? "\t.SECTION init_array,CODE" \
417 : "\t.section\t.init_array,\"aw\",@init_array")
418
419 # define FINI_ARRAY_SECTION_ASM_OP \
420 (TARGET_AS100_SYNTAX ? "\t.SECTION fini_array,CODE" \
421 : "\t.section\t.fini_array,\"aw\",@fini_array")
422 #endif
423
424 #define GLOBAL_ASM_OP \
425 (TARGET_AS100_SYNTAX ? "\t.GLB\t" : "\t.global\t")
426 #define ASM_COMMENT_START " ;"
427 #define ASM_APP_ON ""
428 #define ASM_APP_OFF ""
429 #define LOCAL_LABEL_PREFIX "L"
430 #undef USER_LABEL_PREFIX
431 #define USER_LABEL_PREFIX "_"
432
433 #define ASM_OUTPUT_ALIGN(STREAM, LOG) \
434 do \
435 { \
436 if ((LOG) == 0) \
437 break; \
438 if (TARGET_AS100_SYNTAX) \
439 { \
440 if ((LOG) >= 2) \
441 fprintf (STREAM, "\t.ALIGN 4\t; %d alignment actually requested\n", 1 << (LOG)); \
442 else \
443 fprintf (STREAM, "\t.ALIGN 2\n"); \
444 } \
445 else \
446 fprintf (STREAM, "\t.balign %d\n", 1 << (LOG)); \
447 } \
448 while (0)
449
450 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
451 fprintf (FILE, TARGET_AS100_SYNTAX ? "\t.LWORD L%d\n" : "\t.long .L%d\n", \
452 VALUE)
453
454 /* This is how to output an element of a case-vector that is relative.
455 Note: The local label referenced by the "3b" below is emitted by
456 the tablejump insn. */
457
458 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
459 fprintf (FILE, TARGET_AS100_SYNTAX \
460 ? "\t.LWORD L%d - ?-\n" : "\t.long .L%d - 1b\n", VALUE)
461
462 #define ASM_OUTPUT_SIZE_DIRECTIVE(STREAM, NAME, SIZE) \
463 do \
464 { \
465 HOST_WIDE_INT size_ = (SIZE); \
466 \
467 /* The as100 assembler does not have an equivalent of the SVR4 \
468 .size pseudo-op. */ \
469 if (TARGET_AS100_SYNTAX) \
470 break; \
471 \
472 fputs (SIZE_ASM_OP, STREAM); \
473 assemble_name (STREAM, NAME); \
474 fprintf (STREAM, ", " HOST_WIDE_INT_PRINT_DEC "\n", size_); \
475 } \
476 while (0)
477
478 #define ASM_OUTPUT_MEASURED_SIZE(STREAM, NAME) \
479 do \
480 { \
481 /* The as100 assembler does not have an equivalent of the SVR4 \
482 .size pseudo-op. */ \
483 if (TARGET_AS100_SYNTAX) \
484 break; \
485 fputs (SIZE_ASM_OP, STREAM); \
486 assemble_name (STREAM, NAME); \
487 fputs (", .-", STREAM); \
488 assemble_name (STREAM, NAME); \
489 putc ('\n', STREAM); \
490 } \
491 while (0)
492
493 #define ASM_OUTPUT_TYPE_DIRECTIVE(STREAM, NAME, TYPE) \
494 do \
495 { \
496 /* The as100 assembler does not have an equivalent of the SVR4 \
497 .size pseudo-op. */ \
498 if (TARGET_AS100_SYNTAX) \
499 break; \
500 fputs (TYPE_ASM_OP, STREAM); \
501 assemble_name (STREAM, NAME); \
502 fputs (", ", STREAM); \
503 fprintf (STREAM, TYPE_OPERAND_FMT, TYPE); \
504 putc ('\n', STREAM); \
505 } \
506 while (0)
507
508 #undef ASM_GENERATE_INTERNAL_LABEL
509 #define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \
510 do \
511 { \
512 sprintf (LABEL, TARGET_AS100_SYNTAX ? "*%s%u" : "*.%s%u", \
513 PREFIX, (unsigned) (NUM)); \
514 } \
515 while (0)
516
517 #undef ASM_OUTPUT_EXTERNAL
518 #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
519 do \
520 { \
521 if (TARGET_AS100_SYNTAX) \
522 targetm.asm_out.globalize_label (FILE, NAME); \
523 default_elf_asm_output_external (FILE, DECL, NAME); \
524 } \
525 while (0)
526
527 #undef ASM_OUTPUT_ALIGNED_COMMON
528 #define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN) \
529 do \
530 { \
531 if (TARGET_AS100_SYNTAX) \
532 { \
533 fprintf ((FILE), "\t.GLB\t"); \
534 assemble_name ((FILE), (NAME)); \
535 fprintf ((FILE), "\n"); \
536 assemble_name ((FILE), (NAME)); \
537 switch ((ALIGN) / BITS_PER_UNIT) \
538 { \
539 case 4: \
540 fprintf ((FILE), ":\t.BLKL\t"HOST_WIDE_INT_PRINT_UNSIGNED"\n",\
541 (SIZE) / 4); \
542 break; \
543 case 2: \
544 fprintf ((FILE), ":\t.BLKW\t"HOST_WIDE_INT_PRINT_UNSIGNED"\n",\
545 (SIZE) / 2); \
546 break; \
547 default: \
548 fprintf ((FILE), ":\t.BLKB\t"HOST_WIDE_INT_PRINT_UNSIGNED"\n",\
549 (SIZE)); \
550 break; \
551 } \
552 } \
553 else \
554 { \
555 fprintf ((FILE), "%s", COMMON_ASM_OP); \
556 assemble_name ((FILE), (NAME)); \
557 fprintf ((FILE), ","HOST_WIDE_INT_PRINT_UNSIGNED",%u\n", \
558 (SIZE), (ALIGN) / BITS_PER_UNIT); \
559 } \
560 } \
561 while (0)
562
563 #undef SKIP_ASM_OP
564 #define SKIP_ASM_OP (TARGET_AS100_SYNTAX ? "\t.BLKB\t" : "\t.zero\t")
565
566 #undef ASM_OUTPUT_LIMITED_STRING
567 #define ASM_OUTPUT_LIMITED_STRING(FILE, STR) \
568 do \
569 { \
570 const unsigned char *_limited_str = \
571 (const unsigned char *) (STR); \
572 unsigned ch; \
573 \
574 fprintf ((FILE), TARGET_AS100_SYNTAX \
575 ? "\t.BYTE\t\"" : "\t.string\t\""); \
576 \
577 for (; (ch = *_limited_str); _limited_str++) \
578 { \
579 int escape; \
580 \
581 switch (escape = ESCAPES[ch]) \
582 { \
583 case 0: \
584 putc (ch, (FILE)); \
585 break; \
586 case 1: \
587 fprintf ((FILE), "\\%03o", ch); \
588 break; \
589 default: \
590 putc ('\\', (FILE)); \
591 putc (escape, (FILE)); \
592 break; \
593 } \
594 } \
595 \
596 fprintf ((FILE), TARGET_AS100_SYNTAX ? "\"\n\t.BYTE\t0\n" : "\"\n");\
597 } \
598 while (0)
599
600 #undef IDENT_ASM_OP
601 #define IDENT_ASM_OP (TARGET_AS100_SYNTAX \
602 ? "\t.END\t; Built by: ": "\t.ident\t")
603
604 /* For PIC put jump tables into the text section so that the offsets that
605 they contain are always computed between two same-section symbols. */
606 #define JUMP_TABLES_IN_TEXT_SECTION (flag_pic)
607
608 #define PRINT_OPERAND(FILE, X, CODE) \
609 rx_print_operand (FILE, X, CODE)
610 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
611 rx_print_operand_address (FILE, ADDR)
612
613 #define CC_NO_CARRY 0400
614 #define NOTICE_UPDATE_CC(EXP, INSN) rx_notice_update_cc (EXP, INSN)
615
616 extern int rx_float_compare_mode;
617
618 /* This is a version of REG_P that also returns TRUE for SUBREGs. */
619 #define RX_REG_P(rtl) (REG_P (rtl) || GET_CODE (rtl) == SUBREG)
620
621 /* Like REG_P except that this macro is true for SET expressions. */
622 #define SET_P(rtl) (GET_CODE (rtl) == SET)
623
624 #define CAN_DEBUG_WITHOUT_FP 1
625
626 /* The AS100 assembler does not support .leb128 and .uleb128, but
627 the compiler-build-time configure tests will have enabled their
628 use because GAS supports them. So default to generating STABS
629 debug information instead of DWARF2 when generating AS100
630 compatible output. */
631 #undef PREFERRED_DEBUGGING_TYPE
632 #define PREFERRED_DEBUGGING_TYPE (TARGET_AS100_SYNTAX \
633 ? DBX_DEBUG : DWARF2_DEBUG)
634
635 #define INCOMING_FRAME_SP_OFFSET 4
636 #define ARG_POINTER_CFA_OFFSET(FNDECL) 4
637 #define FRAME_POINTER_CFA_OFFSET(FNDECL) 4
638
639 extern int rx_enable_fpu;
640
641 /* For some unknown reason LTO compression is not working, at
642 least on my local system. So set the default compression
643 level to none, for now.
644
645 For an explanation of rx_flag_no_fpu see rx_handle_option(). */
646 #define OVERRIDE_OPTIONS \
647 do \
648 { \
649 if (flag_lto_compression_level == -1) \
650 flag_lto_compression_level = 0; \
651 \
652 if (rx_enable_fpu == 1) \
653 set_fast_math_flags (true); \
654 } \
655 while (0)
656
657 /* This macro is used to decide when RX FPU instructions can be used. */
658 #define ALLOW_RX_FPU_INSNS ((rx_enable_fpu != -1) \
659 && flag_unsafe_math_optimizations)