Mercurial > hg > CbC > CbC_gcc
comparison gcc/config/sh/predicates.md @ 55:77e2b8dfacca gcc-4.4.5
update it from 4.4.3 to 4.5.0
author | ryoma <e075725@ie.u-ryukyu.ac.jp> |
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date | Fri, 12 Feb 2010 23:39:51 +0900 |
parents | a06113de4d67 |
children | b7f97abdc517 |
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52:c156f1bd5cd9 | 55:77e2b8dfacca |
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20 ;; TODO: Add a comment here. | 20 ;; TODO: Add a comment here. |
21 | 21 |
22 (define_predicate "trapping_target_operand" | 22 (define_predicate "trapping_target_operand" |
23 (match_code "if_then_else") | 23 (match_code "if_then_else") |
24 { | 24 { |
25 rtx cond, mem, res, tar, and; | 25 rtx cond, mem, res, tar, and_expr; |
26 | 26 |
27 if (GET_MODE (op) != PDImode) | 27 if (GET_MODE (op) != PDImode) |
28 return 0; | 28 return 0; |
29 cond = XEXP (op, 0); | 29 cond = XEXP (op, 0); |
30 mem = XEXP (op, 1); | 30 mem = XEXP (op, 1); |
31 res = XEXP (op, 2); | 31 res = XEXP (op, 2); |
32 if (GET_CODE (mem) != MEM | 32 if (!MEM_P (mem) |
33 || (GET_CODE (res) != SIGN_EXTEND && GET_CODE (res) != TRUNCATE)) | 33 || (GET_CODE (res) != SIGN_EXTEND && GET_CODE (res) != TRUNCATE)) |
34 return 0; | 34 return 0; |
35 tar = XEXP (res, 0); | 35 tar = XEXP (res, 0); |
36 if (!rtx_equal_p (XEXP (mem, 0), tar) | 36 if (!rtx_equal_p (XEXP (mem, 0), tar) |
37 || GET_MODE (tar) != Pmode) | 37 || GET_MODE (tar) != Pmode) |
47 else if (!arith_reg_operand (tar, VOIDmode) | 47 else if (!arith_reg_operand (tar, VOIDmode) |
48 && ! satisfies_constraint_Csy (tar)) | 48 && ! satisfies_constraint_Csy (tar)) |
49 return 0; | 49 return 0; |
50 if (GET_CODE (cond) != EQ) | 50 if (GET_CODE (cond) != EQ) |
51 return 0; | 51 return 0; |
52 and = XEXP (cond, 0); | 52 and_expr = XEXP (cond, 0); |
53 return (GET_CODE (and) == AND | 53 return (GET_CODE (and_expr) == AND |
54 && rtx_equal_p (XEXP (and, 0), tar) | 54 && rtx_equal_p (XEXP (and_expr, 0), tar) |
55 && GET_CODE (XEXP (and, 1)) == CONST_INT | 55 && CONST_INT_P (XEXP (and_expr, 1)) |
56 && GET_CODE (XEXP (cond, 1)) == CONST_INT | 56 && CONST_INT_P (XEXP (cond, 1)) |
57 && INTVAL (XEXP (and, 1)) == 3 | 57 && INTVAL (XEXP (and_expr, 1)) == 3 |
58 && INTVAL (XEXP (cond, 1)) == 3); | 58 && INTVAL (XEXP (cond, 1)) == 3); |
59 }) | 59 }) |
60 | 60 |
61 ;; TODO: Add a comment here. | 61 ;; TODO: Add a comment here. |
62 | 62 |
106 /* FIXME: We should be checking whether the CONST_INT fits in a | 106 /* FIXME: We should be checking whether the CONST_INT fits in a |
107 signed 16-bit here, but this causes reload_cse to crash when | 107 signed 16-bit here, but this causes reload_cse to crash when |
108 attempting to transform a sequence of two 64-bit sets of the | 108 attempting to transform a sequence of two 64-bit sets of the |
109 same register from literal constants into a set and an add, | 109 same register from literal constants into a set and an add, |
110 when the difference is too wide for an add. */ | 110 when the difference is too wide for an add. */ |
111 if (GET_CODE (op) == CONST_INT | 111 if (CONST_INT_P (op) |
112 || satisfies_constraint_Css (op)) | 112 || satisfies_constraint_Css (op)) |
113 return 1; | 113 return 1; |
114 else if (GET_CODE (op) == TRUNCATE | 114 else if (GET_CODE (op) == TRUNCATE |
115 && GET_CODE (XEXP (op, 0)) == REG | 115 && REG_P (XEXP (op, 0)) |
116 && ! system_reg_operand (XEXP (op, 0), VOIDmode) | 116 && ! system_reg_operand (XEXP (op, 0), VOIDmode) |
117 && (mode == VOIDmode || mode == GET_MODE (op)) | 117 && (mode == VOIDmode || mode == GET_MODE (op)) |
118 && (GET_MODE_SIZE (GET_MODE (op)) | 118 && (GET_MODE_SIZE (GET_MODE (op)) |
119 < GET_MODE_SIZE (GET_MODE (XEXP (op, 0)))) | 119 < GET_MODE_SIZE (GET_MODE (XEXP (op, 0)))) |
120 && (! FP_REGISTER_P (REGNO (XEXP (op, 0))) | 120 && (! FP_REGISTER_P (REGNO (XEXP (op, 0))) |
150 { | 150 { |
151 if (register_operand (op, mode)) | 151 if (register_operand (op, mode)) |
152 { | 152 { |
153 int regno; | 153 int regno; |
154 | 154 |
155 if (GET_CODE (op) == REG) | 155 if (REG_P (op)) |
156 regno = REGNO (op); | 156 regno = REGNO (op); |
157 else if (GET_CODE (op) == SUBREG && GET_CODE (SUBREG_REG (op)) == REG) | 157 else if (GET_CODE (op) == SUBREG && REG_P (SUBREG_REG (op))) |
158 regno = REGNO (SUBREG_REG (op)); | 158 regno = REGNO (SUBREG_REG (op)); |
159 else | 159 else |
160 return 1; | 160 return 1; |
161 | 161 |
162 return (regno != T_REG && regno != PR_REG | 162 return (regno != T_REG && regno != PR_REG |
173 && GET_CODE (XEXP (op, 0)) != SUBREG) | 173 && GET_CODE (XEXP (op, 0)) != SUBREG) |
174 return register_operand (XEXP (op, 0), VOIDmode); | 174 return register_operand (XEXP (op, 0), VOIDmode); |
175 #if 0 /* Can't do this because of PROMOTE_MODE for unsigned vars. */ | 175 #if 0 /* Can't do this because of PROMOTE_MODE for unsigned vars. */ |
176 if (GET_MODE (op) == SImode && GET_CODE (op) == SIGN_EXTEND | 176 if (GET_MODE (op) == SImode && GET_CODE (op) == SIGN_EXTEND |
177 && GET_MODE (XEXP (op, 0)) == HImode | 177 && GET_MODE (XEXP (op, 0)) == HImode |
178 && GET_CODE (XEXP (op, 0)) == REG | 178 && REG_P (XEXP (op, 0)) |
179 && REGNO (XEXP (op, 0)) <= LAST_GENERAL_REG) | 179 && REGNO (XEXP (op, 0)) <= LAST_GENERAL_REG) |
180 return register_operand (XEXP (op, 0), VOIDmode); | 180 return register_operand (XEXP (op, 0), VOIDmode); |
181 #endif | 181 #endif |
182 if (GET_MODE_CLASS (GET_MODE (op)) == MODE_VECTOR_INT | 182 if (GET_MODE_CLASS (GET_MODE (op)) == MODE_VECTOR_INT |
183 && GET_CODE (op) == SUBREG | 183 && GET_CODE (op) == SUBREG |
221 (define_special_predicate "cache_address_operand" | 221 (define_special_predicate "cache_address_operand" |
222 (match_code "plus,reg") | 222 (match_code "plus,reg") |
223 { | 223 { |
224 if (GET_CODE (op) == PLUS) | 224 if (GET_CODE (op) == PLUS) |
225 { | 225 { |
226 if (GET_CODE (XEXP (op, 0)) != REG) | 226 if (!REG_P (XEXP (op, 0))) |
227 return 0; | 227 return 0; |
228 if (GET_CODE (XEXP (op, 1)) != CONST_INT | 228 if (!CONST_INT_P (XEXP (op, 1)) |
229 || (INTVAL (XEXP (op, 1)) & 31)) | 229 || (INTVAL (XEXP (op, 1)) & 31)) |
230 return 0; | 230 return 0; |
231 } | 231 } |
232 else if (GET_CODE (op) != REG) | 232 else if (!REG_P (op)) |
233 return 0; | 233 return 0; |
234 return address_operand (op, mode); | 234 return address_operand (op, mode); |
235 }) | 235 }) |
236 | 236 |
237 ;; Return 1 if OP is a valid source operand for shmedia cmpgt / cmpgtu. | 237 ;; Return 1 if OP is a valid source operand for shmedia cmpgt / cmpgtu. |
251 ;; TODO: Add a comment here. | 251 ;; TODO: Add a comment here. |
252 | 252 |
253 (define_predicate "cmpsi_operand" | 253 (define_predicate "cmpsi_operand" |
254 (match_code "subreg,reg,const_int") | 254 (match_code "subreg,reg,const_int") |
255 { | 255 { |
256 if (GET_CODE (op) == REG && REGNO (op) == T_REG | 256 if (REG_P (op) && REGNO (op) == T_REG |
257 && GET_MODE (op) == SImode | 257 && GET_MODE (op) == SImode |
258 && TARGET_SH1) | 258 && TARGET_SH1) |
259 return 1; | 259 return 1; |
260 return arith_operand (op, mode); | 260 return arith_operand (op, mode); |
261 }) | 261 }) |
317 { | 317 { |
318 if (register_operand (op, mode)) | 318 if (register_operand (op, mode)) |
319 { | 319 { |
320 int regno; | 320 int regno; |
321 | 321 |
322 if (GET_CODE (op) == REG) | 322 if (REG_P (op)) |
323 regno = REGNO (op); | 323 regno = REGNO (op); |
324 else if (GET_CODE (op) == SUBREG && GET_CODE (SUBREG_REG (op)) == REG) | 324 else if (GET_CODE (op) == SUBREG && REG_P (SUBREG_REG (op))) |
325 regno = REGNO (SUBREG_REG (op)); | 325 regno = REGNO (SUBREG_REG (op)); |
326 else | 326 else |
327 return 1; | 327 return 1; |
328 | 328 |
329 return (regno >= FIRST_PSEUDO_REGISTER | 329 return (regno >= FIRST_PSEUDO_REGISTER |
335 ;; TODO: Add a comment here. | 335 ;; TODO: Add a comment here. |
336 | 336 |
337 (define_predicate "fpscr_operand" | 337 (define_predicate "fpscr_operand" |
338 (match_code "reg") | 338 (match_code "reg") |
339 { | 339 { |
340 return (GET_CODE (op) == REG | 340 return (REG_P (op) |
341 && (REGNO (op) == FPSCR_REG | 341 && (REGNO (op) == FPSCR_REG |
342 || (REGNO (op) >= FIRST_PSEUDO_REGISTER | 342 || (REGNO (op) >= FIRST_PSEUDO_REGISTER |
343 && !(reload_in_progress || reload_completed))) | 343 && !(reload_in_progress || reload_completed))) |
344 && GET_MODE (op) == PSImode); | 344 && GET_MODE (op) == PSImode); |
345 }) | 345 }) |
350 (match_code "reg") | 350 (match_code "reg") |
351 { | 351 { |
352 if (TARGET_SHMEDIA) | 352 if (TARGET_SHMEDIA) |
353 return fp_arith_reg_operand (op, mode); | 353 return fp_arith_reg_operand (op, mode); |
354 | 354 |
355 return (GET_CODE (op) == REG | 355 return (REG_P (op) |
356 && (REGNO (op) == FPUL_REG || REGNO (op) >= FIRST_PSEUDO_REGISTER) | 356 && (REGNO (op) == FPUL_REG || REGNO (op) >= FIRST_PSEUDO_REGISTER) |
357 && GET_MODE (op) == mode); | 357 && GET_MODE (op) == mode); |
358 }) | 358 }) |
359 | 359 |
360 ;; TODO: Add a comment here. | 360 ;; TODO: Add a comment here. |
372 ;; are subregs of system registers. | 372 ;; are subregs of system registers. |
373 | 373 |
374 (define_predicate "general_movsrc_operand" | 374 (define_predicate "general_movsrc_operand" |
375 (match_code "subreg,reg,const_int,const_double,mem,symbol_ref,label_ref,const,const_vector") | 375 (match_code "subreg,reg,const_int,const_double,mem,symbol_ref,label_ref,const,const_vector") |
376 { | 376 { |
377 if (GET_CODE (op) == MEM) | 377 if (MEM_P (op)) |
378 { | 378 { |
379 rtx inside = XEXP (op, 0); | 379 rtx inside = XEXP (op, 0); |
380 if (GET_CODE (inside) == CONST) | 380 if (GET_CODE (inside) == CONST) |
381 inside = XEXP (inside, 0); | 381 inside = XEXP (inside, 0); |
382 | 382 |
383 if (GET_CODE (inside) == LABEL_REF) | 383 if (GET_CODE (inside) == LABEL_REF) |
384 return 1; | 384 return 1; |
385 | 385 |
386 if (GET_CODE (inside) == PLUS | 386 if (GET_CODE (inside) == PLUS |
387 && GET_CODE (XEXP (inside, 0)) == LABEL_REF | 387 && GET_CODE (XEXP (inside, 0)) == LABEL_REF |
388 && GET_CODE (XEXP (inside, 1)) == CONST_INT) | 388 && CONST_INT_P (XEXP (inside, 1))) |
389 return 1; | 389 return 1; |
390 | 390 |
391 /* Only post inc allowed. */ | 391 /* Only post inc allowed. */ |
392 if (GET_CODE (inside) == PRE_DEC) | 392 if (GET_CODE (inside) == PRE_DEC) |
393 return 0; | 393 return 0; |
409 | 409 |
410 (define_predicate "general_movdst_operand" | 410 (define_predicate "general_movdst_operand" |
411 (match_code "subreg,reg,mem") | 411 (match_code "subreg,reg,mem") |
412 { | 412 { |
413 /* Only pre dec allowed. */ | 413 /* Only pre dec allowed. */ |
414 if (GET_CODE (op) == MEM && GET_CODE (XEXP (op, 0)) == POST_INC) | 414 if (MEM_P (op) && GET_CODE (XEXP (op, 0)) == POST_INC) |
415 return 0; | 415 return 0; |
416 if (mode == DImode && TARGET_SHMEDIA && GET_CODE (op) == SUBREG | 416 if (mode == DImode && TARGET_SHMEDIA && GET_CODE (op) == SUBREG |
417 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (op))) < 8 | 417 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (op))) < 8 |
418 && ! (high_life_started || reload_completed)) | 418 && ! (high_life_started || reload_completed)) |
419 return 0; | 419 return 0; |
426 (define_predicate "unaligned_load_operand" | 426 (define_predicate "unaligned_load_operand" |
427 (match_code "mem") | 427 (match_code "mem") |
428 { | 428 { |
429 rtx inside; | 429 rtx inside; |
430 | 430 |
431 if (GET_CODE (op) != MEM || GET_MODE (op) != mode) | 431 if (!MEM_P (op) || GET_MODE (op) != mode) |
432 return 0; | 432 return 0; |
433 | 433 |
434 inside = XEXP (op, 0); | 434 inside = XEXP (op, 0); |
435 | 435 |
436 if (GET_CODE (inside) == POST_INC) | 436 if (GET_CODE (inside) == POST_INC) |
437 inside = XEXP (inside, 0); | 437 inside = XEXP (inside, 0); |
438 | 438 |
439 if (GET_CODE (inside) == REG) | 439 if (REG_P (inside)) |
440 return 1; | 440 return 1; |
441 | 441 |
442 return 0; | 442 return 0; |
443 }) | 443 }) |
444 | 444 |
455 if (GET_CODE (op) != TRUNCATE || mode != GET_MODE (op)) | 455 if (GET_CODE (op) != TRUNCATE || mode != GET_MODE (op)) |
456 return 0; | 456 return 0; |
457 op = XEXP (op, 0); | 457 op = XEXP (op, 0); |
458 /* Can't use true_regnum here because copy_cost wants to know about | 458 /* Can't use true_regnum here because copy_cost wants to know about |
459 SECONDARY_INPUT_RELOAD_CLASS. */ | 459 SECONDARY_INPUT_RELOAD_CLASS. */ |
460 return GET_CODE (op) == REG && FP_REGISTER_P (REGNO (op)); | 460 return REG_P (op) && FP_REGISTER_P (REGNO (op)); |
461 }) | 461 }) |
462 | 462 |
463 ;; TODO: Add a comment here. | 463 ;; TODO: Add a comment here. |
464 | 464 |
465 (define_special_predicate "int_gpr_dest" | 465 (define_special_predicate "int_gpr_dest" |
530 (define_predicate "mextr_bit_offset" | 530 (define_predicate "mextr_bit_offset" |
531 (match_code "const_int") | 531 (match_code "const_int") |
532 { | 532 { |
533 HOST_WIDE_INT i; | 533 HOST_WIDE_INT i; |
534 | 534 |
535 if (GET_CODE (op) != CONST_INT) | 535 if (!CONST_INT_P (op)) |
536 return 0; | 536 return 0; |
537 i = INTVAL (op); | 537 i = INTVAL (op); |
538 return i >= 1 * 8 && i <= 7 * 8 && (i & 7) == 0; | 538 return i >= 1 * 8 && i <= 7 * 8 && (i & 7) == 0; |
539 }) | 539 }) |
540 | 540 |
550 | 550 |
551 (define_predicate "noncommutative_float_operator" | 551 (define_predicate "noncommutative_float_operator" |
552 (and (match_code "minus,div") | 552 (and (match_code "minus,div") |
553 (match_test "GET_MODE (op) == mode"))) | 553 (match_test "GET_MODE (op) == mode"))) |
554 | 554 |
555 ;; UNORDERED is only supported on SHMEDIA. | |
556 | |
557 (define_predicate "sh_float_comparison_operator" | |
558 (ior (match_operand 0 "ordered_comparison_operator") | |
559 (and (match_test "TARGET_SHMEDIA") | |
560 (match_code "unordered")))) | |
561 | |
562 (define_predicate "shmedia_cbranch_comparison_operator" | |
563 (ior (match_operand 0 "equality_comparison_operator") | |
564 (match_operand 0 "greater_comparison_operator"))) | |
565 | |
555 ;; TODO: Add a comment here. | 566 ;; TODO: Add a comment here. |
556 | 567 |
557 (define_predicate "sh_const_vec" | 568 (define_predicate "sh_const_vec" |
558 (match_code "const_vector") | 569 (match_code "const_vector") |
559 { | 570 { |
562 if (GET_CODE (op) != CONST_VECTOR | 573 if (GET_CODE (op) != CONST_VECTOR |
563 || (GET_MODE (op) != mode && mode != VOIDmode)) | 574 || (GET_MODE (op) != mode && mode != VOIDmode)) |
564 return 0; | 575 return 0; |
565 i = XVECLEN (op, 0) - 1; | 576 i = XVECLEN (op, 0) - 1; |
566 for (; i >= 0; i--) | 577 for (; i >= 0; i--) |
567 if (GET_CODE (XVECEXP (op, 0, i)) != CONST_INT) | 578 if (!CONST_INT_P (XVECEXP (op, 0, i))) |
568 return 0; | 579 return 0; |
569 return 1; | 580 return 1; |
570 }) | 581 }) |
571 | 582 |
572 ;; Determine if OP is a constant vector matching MODE with only one | 583 ;; Determine if OP is a constant vector matching MODE with only one |
584 || (GET_MODE (op) != mode && mode != VOIDmode)) | 595 || (GET_MODE (op) != mode && mode != VOIDmode)) |
585 return 0; | 596 return 0; |
586 /* Determine numbers of last and of least significant elements. */ | 597 /* Determine numbers of last and of least significant elements. */ |
587 last = XVECLEN (op, 0) - 1; | 598 last = XVECLEN (op, 0) - 1; |
588 least = TARGET_LITTLE_ENDIAN ? 0 : last; | 599 least = TARGET_LITTLE_ENDIAN ? 0 : last; |
589 if (GET_CODE (XVECEXP (op, 0, least)) != CONST_INT) | 600 if (!CONST_INT_P (XVECEXP (op, 0, least))) |
590 return 0; | 601 return 0; |
591 sign_ix = least; | 602 sign_ix = least; |
592 if (GET_MODE_UNIT_SIZE (mode) == 1) | 603 if (GET_MODE_UNIT_SIZE (mode) == 1) |
593 sign_ix = TARGET_LITTLE_ENDIAN ? 1 : last - 1; | 604 sign_ix = TARGET_LITTLE_ENDIAN ? 1 : last - 1; |
594 if (GET_CODE (XVECEXP (op, 0, sign_ix)) != CONST_INT) | 605 if (!CONST_INT_P (XVECEXP (op, 0, sign_ix))) |
595 return 0; | 606 return 0; |
596 unit_size = GET_MODE_UNIT_SIZE (GET_MODE (op)); | 607 unit_size = GET_MODE_UNIT_SIZE (GET_MODE (op)); |
597 sign = (INTVAL (XVECEXP (op, 0, sign_ix)) >> (unit_size * BITS_PER_UNIT - 1) | 608 sign = (INTVAL (XVECEXP (op, 0, sign_ix)) >> (unit_size * BITS_PER_UNIT - 1) |
598 ? constm1_rtx : const0_rtx); | 609 ? constm1_rtx : const0_rtx); |
599 i = XVECLEN (op, 0) - 1; | 610 i = XVECLEN (op, 0) - 1; |
647 | 658 |
648 (define_predicate "shift_count_operand" | 659 (define_predicate "shift_count_operand" |
649 (match_code "const_int,const_double,const,symbol_ref,label_ref,subreg,reg,zero_extend,sign_extend") | 660 (match_code "const_int,const_double,const,symbol_ref,label_ref,subreg,reg,zero_extend,sign_extend") |
650 { | 661 { |
651 return (CONSTANT_P (op) | 662 return (CONSTANT_P (op) |
652 ? (GET_CODE (op) == CONST_INT | 663 ? (CONST_INT_P (op) |
653 ? (unsigned) INTVAL (op) < GET_MODE_BITSIZE (mode) | 664 ? (unsigned) INTVAL (op) < GET_MODE_BITSIZE (mode) |
654 : nonmemory_operand (op, mode)) | 665 : nonmemory_operand (op, mode)) |
655 : shift_count_reg_operand (op, mode)); | 666 : shift_count_reg_operand (op, mode)); |
656 }) | 667 }) |
657 | 668 |
715 return 0; | 726 return 0; |
716 | 727 |
717 if (GET_CODE (op) == SUBREG) | 728 if (GET_CODE (op) == SUBREG) |
718 op = XEXP (op, 0); | 729 op = XEXP (op, 0); |
719 | 730 |
720 if (GET_CODE (op) != REG) | 731 if (!REG_P (op)) |
721 return 0; | 732 return 0; |
722 | 733 |
723 /* We must protect ourselves from matching pseudos that are virtual | 734 /* We must protect ourselves from matching pseudos that are virtual |
724 register, because they will eventually be replaced with hardware | 735 register, because they will eventually be replaced with hardware |
725 registers that aren't branch-target registers. */ | 736 registers that aren't branch-target registers. */ |
771 ;; Return 1 if OP is a valid source operand for xor. | 782 ;; Return 1 if OP is a valid source operand for xor. |
772 | 783 |
773 (define_predicate "xor_operand" | 784 (define_predicate "xor_operand" |
774 (match_code "subreg,reg,const_int") | 785 (match_code "subreg,reg,const_int") |
775 { | 786 { |
776 if (GET_CODE (op) == CONST_INT) | 787 if (CONST_INT_P (op)) |
777 return (TARGET_SHMEDIA | 788 return (TARGET_SHMEDIA |
778 ? (satisfies_constraint_I06 (op) | 789 ? (satisfies_constraint_I06 (op) |
779 || (!can_create_pseudo_p () && INTVAL (op) == 0xff)) | 790 || (!can_create_pseudo_p () && INTVAL (op) == 0xff)) |
780 : satisfies_constraint_K08 (op)); | 791 : satisfies_constraint_K08 (op)); |
781 if (TARGET_SHMEDIA | 792 if (TARGET_SHMEDIA |
786 }) | 797 }) |
787 | 798 |
788 (define_predicate "bitwise_memory_operand" | 799 (define_predicate "bitwise_memory_operand" |
789 (match_code "mem") | 800 (match_code "mem") |
790 { | 801 { |
791 if (GET_CODE (op) == MEM) | 802 if (MEM_P (op)) |
792 { | 803 { |
793 if (REG_P (XEXP (op, 0))) | 804 if (REG_P (XEXP (op, 0))) |
794 return 1; | 805 return 1; |
795 | 806 |
796 if (GET_CODE (XEXP (op, 0)) == PLUS | 807 if (GET_CODE (XEXP (op, 0)) == PLUS |
797 && GET_CODE (XEXP (XEXP (op, 0), 0)) == REG | 808 && REG_P (XEXP (XEXP (op, 0), 0)) |
798 && satisfies_constraint_K12 (XEXP (XEXP (op, 0), 1))) | 809 && satisfies_constraint_K12 (XEXP (XEXP (op, 0), 1))) |
799 return 1; | 810 return 1; |
800 } | 811 } |
801 return 0; | 812 return 0; |
802 }) | 813 }) |