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comparison gcc/config/sh/sh.opt @ 55:77e2b8dfacca gcc-4.4.5

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update it from 4.4.3 to 4.5.0
author ryoma <e075725@ie.u-ryukyu.ac.jp>
date Fri, 12 Feb 2010 23:39:51 +0900
parents a06113de4d67
children b7f97abdc517
comparison
equal deleted inserted replaced
52:c156f1bd5cd9 55:77e2b8dfacca
1 ; Options for the SH port of the compiler. 1 ; Options for the SH port of the compiler.
2 2
3 ; Copyright (C) 2005, 2006, 2007, 2008 Free Software Foundation, Inc. 3 ; Copyright (C) 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
4 ; 4 ;
5 ; This file is part of GCC. 5 ; This file is part of GCC.
6 ; 6 ;
7 ; GCC is free software; you can redistribute it and/or modify it under 7 ; GCC is free software; you can redistribute it and/or modify it under
8 ; the terms of the GNU General Public License as published by the Free 8 ; the terms of the GNU General Public License as published by the Free
47 Target RejectNegative Mask(SH2) Condition(SUPPORT_SH2) 47 Target RejectNegative Mask(SH2) Condition(SUPPORT_SH2)
48 Generate SH2 code 48 Generate SH2 code
49 49
50 m2a 50 m2a
51 Target RejectNegative Condition(SUPPORT_SH2A) 51 Target RejectNegative Condition(SUPPORT_SH2A)
52 Generate SH2a code 52 Generate default double-precision SH2a-FPU code
53 53
54 m2a-nofpu 54 m2a-nofpu
55 Target RejectNegative Condition(SUPPORT_SH2A_NOFPU) 55 Target RejectNegative Condition(SUPPORT_SH2A_NOFPU)
56 Generate SH2a FPU-less code 56 Generate SH2a FPU-less code
57 57
58 m2a-single 58 m2a-single
59 Target RejectNegative Condition(SUPPORT_SH2A_SINGLE) 59 Target RejectNegative Condition(SUPPORT_SH2A_SINGLE)
60 Generate default single-precision SH2a code 60 Generate default single-precision SH2a-FPU code
61 61
62 m2a-single-only 62 m2a-single-only
63 Target RejectNegative Condition(SUPPORT_SH2A_SINGLE_ONLY) 63 Target RejectNegative Condition(SUPPORT_SH2A_SINGLE_ONLY)
64 Generate only single-precision SH2a code 64 Generate only single-precision SH2a-FPU code
65 65
66 m2e 66 m2e
67 Target RejectNegative Condition(SUPPORT_SH2E) 67 Target RejectNegative Condition(SUPPORT_SH2E)
68 Generate SH2e code 68 Generate SH2e code
69 69
222 222
223 mcbranchdi 223 mcbranchdi
224 Target Var(TARGET_CBRANCHDI4) 224 Target Var(TARGET_CBRANCHDI4)
225 Enable cbranchdi4 pattern 225 Enable cbranchdi4 pattern
226 226
227 mexpand-cbranchdi
228 Target Var(TARGET_EXPAND_CBRANCHDI4)
229 Expand cbranchdi4 pattern early into separate comparisons and branches.
230
231 mcmpeqdi 227 mcmpeqdi
232 Target Var(TARGET_CMPEQDI_T) 228 Target Var(TARGET_CMPEQDI_T)
233 Emit cmpeqdi_t pattern even when -mcbranchdi and -mexpand-cbranchdi are in effect. 229 Emit cmpeqdi_t pattern even when -mcbranchdi is in effect.
234 230
235 mcut2-workaround 231 mcut2-workaround
236 Target RejectNegative Var(TARGET_SH5_CUT2_WORKAROUND) 232 Target RejectNegative Var(TARGET_SH5_CUT2_WORKAROUND)
237 Enable SH5 cut2 workaround 233 Enable SH5 cut2 workaround
238 234
246 242
247 mdivsi3_libfunc= 243 mdivsi3_libfunc=
248 Target RejectNegative Joined Var(sh_divsi3_libfunc) Init("") 244 Target RejectNegative Joined Var(sh_divsi3_libfunc) Init("")
249 Specify name for 32 bit signed division function 245 Specify name for 32 bit signed division function
250 246
247 mfmovd
248 Target RejectNegative Mask(FMOVD)
249 Enable the use of 64-bit floating point registers in fmov instructions. See -mdalign if 64-bit alignment is required.
250
251 mfixed-range= 251 mfixed-range=
252 Target RejectNegative Joined Var(sh_fixed_range_str) 252 Target RejectNegative Joined Var(sh_fixed_range_str)
253 Specify range of registers to make fixed 253 Specify range of registers to make fixed
254
255 mfmovd
256 Target RejectNegative Mask(FMOVD) Undocumented
257 254
258 mfused-madd 255 mfused-madd
259 Target Var(TARGET_FMAC) 256 Target Var(TARGET_FMAC)
260 Enable the use of the fused floating point multiply-accumulate operation 257 Enable the use of the fused floating point multiply-accumulate operation
261 258
317 Target Mask(HITACHI) MaskExists 314 Target Mask(HITACHI) MaskExists
318 Follow Renesas (formerly Hitachi) / SuperH calling conventions 315 Follow Renesas (formerly Hitachi) / SuperH calling conventions
319 316
320 mspace 317 mspace
321 Target Report RejectNegative Mask(SMALLCODE) 318 Target Report RejectNegative Mask(SMALLCODE)
322 Deprecated. Use -Os instead 319 Deprecated. Use -Os instead
323 320
324 multcost= 321 multcost=
325 Target RejectNegative Joined UInteger Var(sh_multcost) Init(-1) 322 Target RejectNegative Joined UInteger Var(sh_multcost) Init(-1)
326 Cost to assume for a multiply insn 323 Cost to assume for a multiply insn
327 324