comparison gcc/config/vax/vax.h @ 55:77e2b8dfacca gcc-4.4.5

update it from 4.4.3 to 4.5.0
author ryoma <e075725@ie.u-ryukyu.ac.jp>
date Fri, 12 Feb 2010 23:39:51 +0900
parents a06113de4d67
children f6334be47118
comparison
equal deleted inserted replaced
52:c156f1bd5cd9 55:77e2b8dfacca
1 /* Definitions of target machine for GNU compiler. VAX version. 1 /* Definitions of target machine for GNU compiler. VAX version.
2 Copyright (C) 1987, 1988, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 2 Copyright (C) 1987, 1988, 1991, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2008 3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2008, 2009
4 Free Software Foundation, Inc. 4 Free Software Foundation, Inc.
5 5
6 This file is part of GCC. 6 This file is part of GCC.
7 7
8 GCC is free software; you can redistribute it and/or modify 8 GCC is free software; you can redistribute it and/or modify
61 /* Run-time compilation parameters selecting different hardware subsets. */ 61 /* Run-time compilation parameters selecting different hardware subsets. */
62 62
63 /* Nonzero if ELF. Redefined by vax/elf.h. */ 63 /* Nonzero if ELF. Redefined by vax/elf.h. */
64 #define TARGET_ELF 0 64 #define TARGET_ELF 0
65 65
66 /* Use BSD names for udiv and umod libgcc calls. */
67 #define TARGET_BSD_DIVMOD 1
68
66 /* Default target_flags if no switches specified. */ 69 /* Default target_flags if no switches specified. */
67 70
68 #ifndef TARGET_DEFAULT 71 #ifndef TARGET_DEFAULT
69 #define TARGET_DEFAULT (MASK_UNIX_ASM) 72 #define TARGET_DEFAULT (MASK_UNIX_ASM)
70 #endif 73 #endif
102 105
103 /* Every structure's size must be a multiple of this. */ 106 /* Every structure's size must be a multiple of this. */
104 #define STRUCTURE_SIZE_BOUNDARY 8 107 #define STRUCTURE_SIZE_BOUNDARY 8
105 108
106 /* A bit-field declared as `int' forces `int' alignment for the struct. */ 109 /* A bit-field declared as `int' forces `int' alignment for the struct. */
107 #define PCC_BITFIELD_TYPE_MATTERS (!TARGET_VAXC_ALIGNMENT) 110 #define PCC_BITFIELD_TYPE_MATTERS (! TARGET_VAXC_ALIGNMENT)
108 111
109 /* No data type wants to be aligned rounder than this. */ 112 /* No data type wants to be aligned rounder than this. */
110 #define BIGGEST_ALIGNMENT 32 113 #define BIGGEST_ALIGNMENT 32
111 114
112 /* No structure field wants to be aligned rounder than this. */ 115 /* No structure field wants to be aligned rounder than this. */
173 #define STACK_POINTER_REGNUM VAX_SP_REGNUM 176 #define STACK_POINTER_REGNUM VAX_SP_REGNUM
174 177
175 /* Base register for access to local variables of the function. */ 178 /* Base register for access to local variables of the function. */
176 #define FRAME_POINTER_REGNUM VAX_FP_REGNUM 179 #define FRAME_POINTER_REGNUM VAX_FP_REGNUM
177 180
178 /* Value should be nonzero if functions must have frame pointers. 181 /* Offset from the frame pointer register value to the top of stack. */
179 Zero means the frame pointer need not be set up (and parms 182 #define FRAME_POINTER_CFA_OFFSET(FNDECL) 0
180 may be accessed via the stack pointer) in functions that seem suitable.
181 This is computed in `reload', in reload1.c. */
182 #define FRAME_POINTER_REQUIRED 1
183 183
184 /* Base register for access to arguments of the function. */ 184 /* Base register for access to arguments of the function. */
185 #define ARG_POINTER_REGNUM VAX_AP_REGNUM 185 #define ARG_POINTER_REGNUM VAX_AP_REGNUM
186 186
187 /* Register in which static-chain is passed to a function. */ 187 /* Register in which static-chain is passed to a function. */
226 /* Give names of register classes as strings for dump file. */ 226 /* Give names of register classes as strings for dump file. */
227 227
228 #define REG_CLASS_NAMES \ 228 #define REG_CLASS_NAMES \
229 { "NO_REGS", "ALL_REGS" } 229 { "NO_REGS", "ALL_REGS" }
230 230
231 /* The following macro defines cover classes for Integrated Register
232 Allocator. Cover classes is a set of non-intersected register
233 classes covering all hard registers used for register allocation
234 purpose. Any move between two registers of a cover class should be
235 cheaper than load or store of the registers. The macro value is
236 array of register classes with LIM_REG_CLASSES used as the end
237 marker. */
238 #define IRA_COVER_CLASSES { ALL_REGS, LIM_REG_CLASSES }
239
240 /* Return the maximum number of consecutive registers
241 needed to represent mode MODE in a register of class CLASS. */
242 #define CLASS_MAX_NREGS(CLASS, MODE) \
243 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
244
231 /* Define which registers fit in which classes. 245 /* Define which registers fit in which classes.
232 This is an initializer for a vector of HARD_REG_SET 246 This is an initializer for a vector of HARD_REG_SET
233 of length N_REG_CLASSES. */ 247 of length N_REG_CLASSES. */
234 248
235 #define REG_CLASS_CONTENTS {{0}, {0xffff}} 249 #define REG_CLASS_CONTENTS {{0}, {0xffff}}
243 257
244 /* The class value for index registers, and the one for base regs. */ 258 /* The class value for index registers, and the one for base regs. */
245 259
246 #define INDEX_REG_CLASS ALL_REGS 260 #define INDEX_REG_CLASS ALL_REGS
247 #define BASE_REG_CLASS ALL_REGS 261 #define BASE_REG_CLASS ALL_REGS
248
249 /* Get reg_class from a letter such as appears in the machine description. */
250
251 #define REG_CLASS_FROM_LETTER(C) NO_REGS
252
253 /* The letters I, J, K, L, M, N, and O in a register constraint string
254 can be used to stand for particular ranges of immediate operands.
255 This macro defines what the ranges are.
256 C is the letter, and VALUE is a constant value.
257 Return 1 if VALUE is in the range specified by C.
258
259 `I' is the constant zero.
260 `J' is a value between 0 .. 63 (inclusive)
261 `K' is a value between -128 and 127 (inclusive)
262 'L' is a value between -32768 and 32767 (inclusive)
263 `M' is a value between 0 and 255 (inclusive)
264 'N' is a value between 0 and 65535 (inclusive)
265 `O' is a value between -63 and -1 (inclusive) */
266
267 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
268 ( (C) == 'I' ? (VALUE) == 0 \
269 : (C) == 'J' ? 0 <= (VALUE) && (VALUE) < 64 \
270 : (C) == 'O' ? -63 <= (VALUE) && (VALUE) < 0 \
271 : (C) == 'K' ? -128 <= (VALUE) && (VALUE) < 128 \
272 : (C) == 'M' ? 0 <= (VALUE) && (VALUE) < 256 \
273 : (C) == 'L' ? -32768 <= (VALUE) && (VALUE) < 32768 \
274 : (C) == 'N' ? 0 <= (VALUE) && (VALUE) < 65536 \
275 : 0)
276
277 /* Similar, but for floating constants, and defining letters G and H.
278 Here VALUE is the CONST_DOUBLE rtx itself.
279
280 `G' is a floating-point zero. */
281
282 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
283 ((C) == 'G' ? ((VALUE) == CONST0_RTX (DFmode) \
284 || (VALUE) == CONST0_RTX (SFmode)) \
285 : 0)
286
287 /* Optional extra constraints for this machine.
288
289 For the VAX, `Q' means that OP is a MEM that does not have a mode-dependent
290 address. */
291
292 #define EXTRA_CONSTRAINT(OP, C) \
293 ((C) == 'Q' \
294 ? MEM_P (OP) && !mode_dependent_address_p (XEXP (OP, 0)) \
295 : 0)
296 262
297 /* Given an rtx X being reloaded into a reg required to be 263 /* Given an rtx X being reloaded into a reg required to be
298 in class CLASS, return the class of reg to actually use. 264 in class CLASS, return the class of reg to actually use.
299 In general this is just CLASS; but on some machines 265 In general this is just CLASS; but on some machines
300 in some cases it is preferable to use a more restrictive class. */ 266 in some cases it is preferable to use a more restrictive class. */
460 On the VAX, FRAME_POINTER_REQUIRED is always 1, so the definition of this 426 On the VAX, FRAME_POINTER_REQUIRED is always 1, so the definition of this
461 macro doesn't matter. But it must be defined. */ 427 macro doesn't matter. But it must be defined. */
462 428
463 #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) (DEPTH) = 0; 429 #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) (DEPTH) = 0;
464 430
465 /* Output assembler code for a block containing the constant parts
466 of a trampoline, leaving space for the variable parts. */
467
468 /* On the VAX, the trampoline contains an entry mask and two instructions:
469 .word NN
470 movl $STATIC,r0 (store the functions static chain)
471 jmp *$FUNCTION (jump to function code at address FUNCTION) */
472
473 #define TRAMPOLINE_TEMPLATE(FILE) \
474 { \
475 assemble_aligned_integer (2, const0_rtx); \
476 assemble_aligned_integer (2, GEN_INT (0x8fd0)); \
477 assemble_aligned_integer (4, const0_rtx); \
478 assemble_aligned_integer (1, GEN_INT (0x50 + STATIC_CHAIN_REGNUM)); \
479 assemble_aligned_integer (2, GEN_INT (0x9f17)); \
480 assemble_aligned_integer (4, const0_rtx); \
481 }
482
483 /* Length in units of the trampoline for entering a nested function. */ 431 /* Length in units of the trampoline for entering a nested function. */
484 432
485 #define TRAMPOLINE_SIZE 15 433 #define TRAMPOLINE_SIZE 15
486
487 /* Emit RTL insns to initialize the variable parts of a trampoline.
488 FNADDR is an RTX for the address of the function's pure code.
489 CXT is an RTX for the static chain value for the function. */
490
491 /* We copy the register-mask from the function's pure code
492 to the start of the trampoline. */
493 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
494 { \
495 emit_move_insn (gen_rtx_MEM (HImode, TRAMP), \
496 gen_rtx_MEM (HImode, FNADDR)); \
497 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 4)), CXT); \
498 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 11)), \
499 plus_constant (FNADDR, 2)); \
500 emit_insn (gen_sync_istream ()); \
501 }
502 434
503 /* Byte offset of return address in a stack frame. The "saved PC" field 435 /* Byte offset of return address in a stack frame. The "saved PC" field
504 is in element [4] when treating the frame as an array of longwords. */ 436 is in element [4] when treating the frame as an array of longwords. */
505 437
506 #define RETURN_ADDRESS_OFFSET (4 * UNITS_PER_WORD) /* 16 */ 438 #define RETURN_ADDRESS_OFFSET (4 * UNITS_PER_WORD) /* 16 */
569 501
570 /* Nonzero if X is a hard reg that can be used as a base reg 502 /* Nonzero if X is a hard reg that can be used as a base reg
571 or if it is a pseudo reg. */ 503 or if it is a pseudo reg. */
572 #define REG_OK_FOR_BASE_P(X) 1 504 #define REG_OK_FOR_BASE_P(X) 1
573 505
574 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
575 that is a valid memory address for an instruction. */
576 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
577 { if (legitimate_address_p ((MODE), (X), 0)) goto ADDR; }
578
579 #else 506 #else
580 507
581 /* Nonzero if X is a hard reg that can be used as an index. */ 508 /* Nonzero if X is a hard reg that can be used as an index. */
582 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) 509 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
583 510
584 /* Nonzero if X is a hard reg that can be used as a base reg. */ 511 /* Nonzero if X is a hard reg that can be used as a base reg. */
585 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) 512 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
586
587 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
588 that is a valid memory address for an instruction. */
589 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
590 { if (legitimate_address_p ((MODE), (X), 1)) goto ADDR; }
591 513
592 #endif 514 #endif
593 515
594 /* Go to LABEL if ADDR (a legitimate address expression) 516 /* Go to LABEL if ADDR (a legitimate address expression)
595 has an effect that depends on the machine mode it is used for. */ 517 has an effect that depends on the machine mode it is used for. */
618 #define FIXUNS_TRUNC_LIKE_FIX_TRUNC 540 #define FIXUNS_TRUNC_LIKE_FIX_TRUNC
619 541
620 /* Max number of bytes we can move from memory to memory 542 /* Max number of bytes we can move from memory to memory
621 in one reasonably fast instruction. */ 543 in one reasonably fast instruction. */
622 #define MOVE_MAX 8 544 #define MOVE_MAX 8
545
546 /* If a memory-to-memory move would take MOVE_RATIO or more simple
547 move-instruction pairs, we will do a movmem or libcall instead. */
548 #define MOVE_RATIO(speed) ((speed) ? 6 : 3)
549 #define CLEAR_RATIO(speed) ((speed) ? 6 : 2)
623 550
624 /* Nonzero if access to memory by bytes is slow and undesirable. */ 551 /* Nonzero if access to memory by bytes is slow and undesirable. */
625 #define SLOW_BYTE_ACCESS 0 552 #define SLOW_BYTE_ACCESS 0
626 553
627 /* Define if shifts truncate the shift count 554 /* Define if shifts truncate the shift count
826 if `%z3' was used to print operand 3, then CODE is 'z'. 753 if `%z3' was used to print operand 3, then CODE is 'z'.
827 754
828 VAX operand formatting codes: 755 VAX operand formatting codes:
829 756
830 letter print 757 letter print
758 c direct branch condition
831 C reverse branch condition 759 C reverse branch condition
832 D 64-bit immediate operand 760 D 64-bit immediate operand
833 B the low 8 bits of the complement of a constant operand 761 B the low 8 bits of the complement of a constant operand
834 H the low 16 bits of the complement of a constant operand 762 H the low 16 bits of the complement of a constant operand
835 M a mask for the N highest bits of a word 763 M a mask for the N highest bits of a word
849 # define NEG_HWI_PRINT_HEX16 HOST_WIDE_INT_PRINT_HEX 777 # define NEG_HWI_PRINT_HEX16 HOST_WIDE_INT_PRINT_HEX
850 #else 778 #else
851 # define NEG_HWI_PRINT_HEX16 "0xffffffff%08lx" 779 # define NEG_HWI_PRINT_HEX16 "0xffffffff%08lx"
852 #endif 780 #endif
853 781
854 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \ 782 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
855 ((CODE) == '#' || (CODE) == '|') 783 ((CODE) == '#' || (CODE) == '|')
856 784
857 #define PRINT_OPERAND(FILE, X, CODE) \ 785 #define PRINT_OPERAND(FILE, X, CODE) \
858 { if (CODE == '#') fputc (ASM_DOUBLE_CHAR, FILE); \ 786 print_operand (FILE, X, CODE)
859 else if (CODE == '|') \
860 fputs (REGISTER_PREFIX, FILE); \
861 else if (CODE == 'C') \
862 fputs (rev_cond_name (X), FILE); \
863 else if (CODE == 'D' && CONST_INT_P (X) && INTVAL (X) < 0) \
864 fprintf (FILE, "$" NEG_HWI_PRINT_HEX16, INTVAL (X)); \
865 else if (CODE == 'P' && CONST_INT_P (X)) \
866 fprintf (FILE, "$" HOST_WIDE_INT_PRINT_DEC, INTVAL (X) + 1); \
867 else if (CODE == 'N' && CONST_INT_P (X)) \
868 fprintf (FILE, "$" HOST_WIDE_INT_PRINT_DEC, ~ INTVAL (X)); \
869 /* rotl instruction cannot deal with negative arguments. */ \
870 else if (CODE == 'R' && CONST_INT_P (X)) \
871 fprintf (FILE, "$" HOST_WIDE_INT_PRINT_DEC, 32 - INTVAL (X)); \
872 else if (CODE == 'H' && CONST_INT_P (X)) \
873 fprintf (FILE, "$%d", (int) (0xffff & ~ INTVAL (X))); \
874 else if (CODE == 'h' && CONST_INT_P (X)) \
875 fprintf (FILE, "$%d", (short) - INTVAL (x)); \
876 else if (CODE == 'B' && CONST_INT_P (X)) \
877 fprintf (FILE, "$%d", (int) (0xff & ~ INTVAL (X))); \
878 else if (CODE == 'b' && CONST_INT_P (X)) \
879 fprintf (FILE, "$%d", (int) (0xff & - INTVAL (X))); \
880 else if (CODE == 'M' && CONST_INT_P (X)) \
881 fprintf (FILE, "$%d", ~((1 << INTVAL (x)) - 1)); \
882 else if (REG_P (X)) \
883 fprintf (FILE, "%s", reg_names[REGNO (X)]); \
884 else if (MEM_P (X)) \
885 output_address (XEXP (X, 0)); \
886 else if (GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) == SFmode) \
887 { char dstr[30]; \
888 real_to_decimal (dstr, CONST_DOUBLE_REAL_VALUE (X), \
889 sizeof (dstr), 0, 1); \
890 fprintf (FILE, "$0f%s", dstr); } \
891 else if (GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) == DFmode) \
892 { char dstr[30]; \
893 real_to_decimal (dstr, CONST_DOUBLE_REAL_VALUE (X), \
894 sizeof (dstr), 0, 1); \
895 fprintf (FILE, "$0%c%s", ASM_DOUBLE_CHAR, dstr); } \
896 else { putc ('$', FILE); output_addr_const (FILE, X); }}
897 787
898 /* Print a memory operand whose address is X, on file FILE. 788 /* Print a memory operand whose address is X, on file FILE.
899 This uses a function in output-vax.c. */ 789 This uses a function in output-vax.c. */
900 790
901 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \ 791 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \