comparison gcc/modulo-sched.c @ 55:77e2b8dfacca gcc-4.4.5

update it from 4.4.3 to 4.5.0
author ryoma <e075725@ie.u-ryukyu.ac.jp>
date Fri, 12 Feb 2010 23:39:51 +0900
parents a06113de4d67
children b7f97abdc517
comparison
equal deleted inserted replaced
52:c156f1bd5cd9 55:77e2b8dfacca
94 its own iv, not otherwise used in the loop (at-least for now), which 94 its own iv, not otherwise used in the loop (at-least for now), which
95 initializes a register before the loop to the number of iterations. 95 initializes a register before the loop to the number of iterations.
96 Currently SMS relies on the do-loop pattern to recognize such loops, 96 Currently SMS relies on the do-loop pattern to recognize such loops,
97 where (1) the control part comprises of all insns defining and/or 97 where (1) the control part comprises of all insns defining and/or
98 using a certain 'count' register and (2) the loop count can be 98 using a certain 'count' register and (2) the loop count can be
99 adjusted by modifying this register prior to the loop. 99 adjusted by modifying this register prior to the loop.
100 TODO: Rely on cfgloop analysis instead. */ 100 TODO: Rely on cfgloop analysis instead. */
101 101
102 /* This page defines partial-schedule structures and functions for 102 /* This page defines partial-schedule structures and functions for
103 modulo scheduling. */ 103 modulo scheduling. */
104 104
166 rtx new_reg; 166 rtx new_reg;
167 struct undo_replace_buff_elem *next; 167 struct undo_replace_buff_elem *next;
168 }; 168 };
169 169
170 170
171 171
172 static partial_schedule_ptr create_partial_schedule (int ii, ddg_ptr, int history); 172 static partial_schedule_ptr create_partial_schedule (int ii, ddg_ptr, int history);
173 static void free_partial_schedule (partial_schedule_ptr); 173 static void free_partial_schedule (partial_schedule_ptr);
174 static void reset_partial_schedule (partial_schedule_ptr, int new_ii); 174 static void reset_partial_schedule (partial_schedule_ptr, int new_ii);
175 void print_partial_schedule (partial_schedule_ptr, FILE *); 175 void print_partial_schedule (partial_schedule_ptr, FILE *);
176 static void verify_partial_schedule (partial_schedule_ptr, sbitmap); 176 static void verify_partial_schedule (partial_schedule_ptr, sbitmap);
268 NULL, 268 NULL,
269 NULL, 269 NULL,
270 NULL, 270 NULL,
271 sms_print_insn, 271 sms_print_insn,
272 NULL, 272 NULL,
273 NULL, /* insn_finishes_block_p */
273 NULL, NULL, 274 NULL, NULL,
274 NULL, NULL, 275 NULL, NULL,
275 0, 0, 276 0, 0,
276 277
277 NULL, NULL, NULL, 278 NULL, NULL, NULL,
278 0 279 0
279 }; 280 };
280 281
281 /* Given HEAD and TAIL which are the first and last insns in a loop; 282 /* Given HEAD and TAIL which are the first and last insns in a loop;
282 return the register which controls the loop. Return zero if it has 283 return the register which controls the loop. Return zero if it has
346 return NULL_RTX; 347 return NULL_RTX;
347 348
348 get_ebb_head_tail (pre_header, pre_header, &head, &tail); 349 get_ebb_head_tail (pre_header, pre_header, &head, &tail);
349 350
350 for (insn = tail; insn != PREV_INSN (head); insn = PREV_INSN (insn)) 351 for (insn = tail; insn != PREV_INSN (head); insn = PREV_INSN (insn))
351 if (INSN_P (insn) && single_set (insn) && 352 if (NONDEBUG_INSN_P (insn) && single_set (insn) &&
352 rtx_equal_p (count_reg, SET_DEST (single_set (insn)))) 353 rtx_equal_p (count_reg, SET_DEST (single_set (insn))))
353 { 354 {
354 rtx pat = single_set (insn); 355 rtx pat = single_set (insn);
355 356
356 if (GET_CODE (SET_SRC (pat)) == CONST_INT) 357 if (CONST_INT_P (SET_SRC (pat)))
357 { 358 {
358 *count = INTVAL (SET_SRC (pat)); 359 *count = INTVAL (SET_SRC (pat));
359 return insn; 360 return insn;
360 } 361 }
361 362
370 utilization of various units. */ 371 utilization of various units. */
371 static int 372 static int
372 res_MII (ddg_ptr g) 373 res_MII (ddg_ptr g)
373 { 374 {
374 if (targetm.sched.sms_res_mii) 375 if (targetm.sched.sms_res_mii)
375 return targetm.sched.sms_res_mii (g); 376 return targetm.sched.sms_res_mii (g);
376 377
377 return (g->num_nodes / issue_rate); 378 return ((g->num_nodes - g->num_debug) / issue_rate);
378 } 379 }
379 380
380 381
381 /* Points to the array that contains the sched data for each node. */ 382 /* Points to the array that contains the sched data for each node. */
382 static node_sched_params_ptr node_sched_params; 383 static node_sched_params_ptr node_sched_params;
702 rtx count_reg, rtx count_init) 703 rtx count_reg, rtx count_init)
703 { 704 {
704 int i; 705 int i;
705 int last_stage = PS_STAGE_COUNT (ps) - 1; 706 int last_stage = PS_STAGE_COUNT (ps) - 1;
706 edge e; 707 edge e;
707 708
708 /* Generate the prolog, inserting its insns on the loop-entry edge. */ 709 /* Generate the prolog, inserting its insns on the loop-entry edge. */
709 start_sequence (); 710 start_sequence ();
710 711
711 if (!count_init) 712 if (!count_init)
712 { 713 {
724 emit_move_insn (count_reg, sub_reg); 725 emit_move_insn (count_reg, sub_reg);
725 } 726 }
726 727
727 for (i = 0; i < last_stage; i++) 728 for (i = 0; i < last_stage; i++)
728 duplicate_insns_of_cycles (ps, 0, i, 1, count_reg); 729 duplicate_insns_of_cycles (ps, 0, i, 1, count_reg);
729 730
730 /* Put the prolog on the entry edge. */ 731 /* Put the prolog on the entry edge. */
731 e = loop_preheader_edge (loop); 732 e = loop_preheader_edge (loop);
732 split_edge_and_insert (e, get_insns ()); 733 split_edge_and_insert (e, get_insns ());
733 734
734 end_sequence (); 735 end_sequence ();
736 /* Generate the epilog, inserting its insns on the loop-exit edge. */ 737 /* Generate the epilog, inserting its insns on the loop-exit edge. */
737 start_sequence (); 738 start_sequence ();
738 739
739 for (i = 0; i < last_stage; i++) 740 for (i = 0; i < last_stage; i++)
740 duplicate_insns_of_cycles (ps, i + 1, last_stage, 0, count_reg); 741 duplicate_insns_of_cycles (ps, i + 1, last_stage, 0, count_reg);
741 742
742 /* Put the epilogue on the exit edge. */ 743 /* Put the epilogue on the exit edge. */
743 gcc_assert (single_exit (loop)); 744 gcc_assert (single_exit (loop));
744 e = single_exit (loop); 745 e = single_exit (loop);
745 split_edge_and_insert (e, get_insns ()); 746 split_edge_and_insert (e, get_insns ());
746 end_sequence (); 747 end_sequence ();
766 have only notes labels or jumps. */ 767 have only notes labels or jumps. */
767 get_ebb_head_tail (bbs[i], bbs[i], &head, &tail); 768 get_ebb_head_tail (bbs[i], bbs[i], &head, &tail);
768 for (; head != NEXT_INSN (tail); head = NEXT_INSN (head)) 769 for (; head != NEXT_INSN (tail); head = NEXT_INSN (head))
769 { 770 {
770 if (NOTE_P (head) || LABEL_P (head) 771 if (NOTE_P (head) || LABEL_P (head)
771 || (INSN_P (head) && JUMP_P (head))) 772 || (INSN_P (head) && (DEBUG_INSN_P (head) || JUMP_P (head))))
772 continue; 773 continue;
773 empty_bb = false; 774 empty_bb = false;
774 break; 775 break;
775 } 776 }
776 777
806 if (!single_exit (loop)) 807 if (!single_exit (loop))
807 { 808 {
808 if (dump_file) 809 if (dump_file)
809 { 810 {
810 rtx insn = BB_END (loop->header); 811 rtx insn = BB_END (loop->header);
811 812
812 fprintf (dump_file, "SMS loop many exits "); 813 fprintf (dump_file, "SMS loop many exits ");
813 fprintf (dump_file, " %s %d (file, line)\n", 814 fprintf (dump_file, " %s %d (file, line)\n",
814 insn_file (insn), insn_line (insn)); 815 insn_file (insn), insn_line (insn));
815 } 816 }
816 return false; 817 return false;
819 if (! SIMPLE_SMS_LOOP_P (loop) && ! loop_single_full_bb_p (loop)) 820 if (! SIMPLE_SMS_LOOP_P (loop) && ! loop_single_full_bb_p (loop))
820 { 821 {
821 if (dump_file) 822 if (dump_file)
822 { 823 {
823 rtx insn = BB_END (loop->header); 824 rtx insn = BB_END (loop->header);
824 825
825 fprintf (dump_file, "SMS loop many BBs. "); 826 fprintf (dump_file, "SMS loop many BBs. ");
826 fprintf (dump_file, " %s %d (file, line)\n", 827 fprintf (dump_file, " %s %d (file, line)\n",
827 insn_file (insn), insn_line (insn)); 828 insn_file (insn), insn_line (insn));
828 } 829 }
829 return false; 830 return false;
1008 continue; 1009 continue;
1009 } 1010 }
1010 1011
1011 /* Don't handle BBs with calls or barriers, or !single_set insns, 1012 /* Don't handle BBs with calls or barriers, or !single_set insns,
1012 or auto-increment insns (to avoid creating invalid reg-moves 1013 or auto-increment insns (to avoid creating invalid reg-moves
1013 for the auto-increment insns). 1014 for the auto-increment insns).
1014 ??? Should handle auto-increment insns. 1015 ??? Should handle auto-increment insns.
1015 ??? Should handle insns defining subregs. */ 1016 ??? Should handle insns defining subregs. */
1016 for (insn = head; insn != NEXT_INSN (tail); insn = NEXT_INSN (insn)) 1017 for (insn = head; insn != NEXT_INSN (tail); insn = NEXT_INSN (insn))
1017 { 1018 {
1018 rtx set; 1019 rtx set;
1019 1020
1020 if (CALL_P (insn) 1021 if (CALL_P (insn)
1021 || BARRIER_P (insn) 1022 || BARRIER_P (insn)
1022 || (INSN_P (insn) && !JUMP_P (insn) 1023 || (NONDEBUG_INSN_P (insn) && !JUMP_P (insn)
1023 && !single_set (insn) && GET_CODE (PATTERN (insn)) != USE) 1024 && !single_set (insn) && GET_CODE (PATTERN (insn)) != USE)
1024 || (FIND_REG_INC_NOTE (insn, NULL_RTX) != 0) 1025 || (FIND_REG_INC_NOTE (insn, NULL_RTX) != 0)
1025 || (INSN_P (insn) && (set = single_set (insn)) 1026 || (INSN_P (insn) && (set = single_set (insn))
1026 && GET_CODE (SET_DEST (set)) == SUBREG)) 1027 && GET_CODE (SET_DEST (set)) == SUBREG))
1027 break; 1028 break;
1035 fprintf (dump_file, "SMS loop-with-call\n"); 1036 fprintf (dump_file, "SMS loop-with-call\n");
1036 else if (BARRIER_P (insn)) 1037 else if (BARRIER_P (insn))
1037 fprintf (dump_file, "SMS loop-with-barrier\n"); 1038 fprintf (dump_file, "SMS loop-with-barrier\n");
1038 else if (FIND_REG_INC_NOTE (insn, NULL_RTX) != 0) 1039 else if (FIND_REG_INC_NOTE (insn, NULL_RTX) != 0)
1039 fprintf (dump_file, "SMS reg inc\n"); 1040 fprintf (dump_file, "SMS reg inc\n");
1040 else if ((INSN_P (insn) && !JUMP_P (insn) 1041 else if ((NONDEBUG_INSN_P (insn) && !JUMP_P (insn)
1041 && !single_set (insn) && GET_CODE (PATTERN (insn)) != USE)) 1042 && !single_set (insn) && GET_CODE (PATTERN (insn)) != USE))
1042 fprintf (dump_file, "SMS loop-with-not-single-set\n"); 1043 fprintf (dump_file, "SMS loop-with-not-single-set\n");
1043 else 1044 else
1044 fprintf (dump_file, "SMS loop with subreg in lhs\n"); 1045 fprintf (dump_file, "SMS loop with subreg in lhs\n");
1045 print_rtl_single (dump_file, insn); 1046 print_rtl_single (dump_file, insn);
1154 ASAP. */ 1155 ASAP. */
1155 set_node_sched_params (g); 1156 set_node_sched_params (g);
1156 1157
1157 ps = sms_schedule_by_order (g, mii, maxii, node_order); 1158 ps = sms_schedule_by_order (g, mii, maxii, node_order);
1158 1159
1159 if (ps) 1160 if (ps){
1160 stage_count = PS_STAGE_COUNT (ps); 1161 stage_count = PS_STAGE_COUNT (ps);
1162 gcc_assert(stage_count >= 1);
1163 }
1161 1164
1162 /* Stage count of 1 means that there is no interleaving between 1165 /* Stage count of 1 means that there is no interleaving between
1163 iterations, let the scheduling passes do the job. */ 1166 iterations, let the scheduling passes do the job. */
1164 if (stage_count < 1 1167 if (stage_count <= 1
1165 || (count_init && (loop_count <= stage_count)) 1168 || (count_init && (loop_count <= stage_count))
1166 || (flag_branch_probabilities && (trip_count <= stage_count))) 1169 || (flag_branch_probabilities && (trip_count <= stage_count)))
1167 { 1170 {
1168 if (dump_file) 1171 if (dump_file)
1169 { 1172 {
1193 1196
1194 /* Set the stage boundaries. If the DDG is built with closing_branch_deps, 1197 /* Set the stage boundaries. If the DDG is built with closing_branch_deps,
1195 the closing_branch was scheduled and should appear in the last (ii-1) 1198 the closing_branch was scheduled and should appear in the last (ii-1)
1196 row. Otherwise, we are free to schedule the branch, and we let nodes 1199 row. Otherwise, we are free to schedule the branch, and we let nodes
1197 that were scheduled at the first PS_MIN_CYCLE cycle appear in the first 1200 that were scheduled at the first PS_MIN_CYCLE cycle appear in the first
1198 row; this should reduce stage_count to minimum. 1201 row; this should reduce stage_count to minimum.
1199 TODO: Revisit the issue of scheduling the insns of the 1202 TODO: Revisit the issue of scheduling the insns of the
1200 control part relative to the branch when the control part 1203 control part relative to the branch when the control part
1201 has more than one insn. */ 1204 has more than one insn. */
1202 normalize_sched_times (ps); 1205 normalize_sched_times (ps);
1203 rotate_partial_schedule (ps, PS_MIN_CYCLE (ps)); 1206 rotate_partial_schedule (ps, PS_MIN_CYCLE (ps));
1204 set_columns_for_ps (ps); 1207 set_columns_for_ps (ps);
1205 1208
1206 canon_loop (loop); 1209 canon_loop (loop);
1207 1210
1208 /* case the BCT count is not known , Do loop-versioning */ 1211 /* case the BCT count is not known , Do loop-versioning */
1209 if (count_reg && ! count_init) 1212 if (count_reg && ! count_init)
1210 { 1213 {
1236 reg_move_replaces = generate_reg_moves (ps, true); 1239 reg_move_replaces = generate_reg_moves (ps, true);
1237 if (dump_file) 1240 if (dump_file)
1238 print_node_sched_params (dump_file, g->num_nodes, g); 1241 print_node_sched_params (dump_file, g->num_nodes, g);
1239 /* Generate prolog and epilog. */ 1242 /* Generate prolog and epilog. */
1240 generate_prolog_epilog (ps, loop, count_reg, count_init); 1243 generate_prolog_epilog (ps, loop, count_reg, count_init);
1241 1244
1242 free_undo_replace_buff (reg_move_replaces); 1245 free_undo_replace_buff (reg_move_replaces);
1243 } 1246 }
1244 1247
1245 free_partial_schedule (ps); 1248 free_partial_schedule (ps);
1246 free (node_sched_params); 1249 free (node_sched_params);
1372 for (e = u_node->in; e != 0; e = e->next_in) 1375 for (e = u_node->in; e != 0; e = e->next_in)
1373 { 1376 {
1374 ddg_node_ptr v_node = e->src; 1377 ddg_node_ptr v_node = e->src;
1375 1378
1376 if (dump_file) 1379 if (dump_file)
1377 { 1380 {
1378 fprintf (dump_file, "\nProcessing edge: "); 1381 fprintf (dump_file, "\nProcessing edge: ");
1379 print_ddg_edge (dump_file, e); 1382 print_ddg_edge (dump_file, e);
1380 fprintf (dump_file, 1383 fprintf (dump_file,
1381 "\nScheduling %d (%d) in psp_not_empty," 1384 "\nScheduling %d (%d) in psp_not_empty,"
1382 " checking p %d (%d): ", u_node->cuid, 1385 " checking p %d (%d): ", u_node->cuid,
1390 1393
1391 early_start = 1394 early_start =
1392 MAX (early_start, p_st + e->latency - (e->distance * ii)); 1395 MAX (early_start, p_st + e->latency - (e->distance * ii));
1393 1396
1394 if (dump_file) 1397 if (dump_file)
1395 fprintf (dump_file, 1398 fprintf (dump_file,
1396 "pred st = %d; early_start = %d; latency: %d", 1399 "pred st = %d; early_start = %d; latency: %d",
1397 p_st, early_start, e->latency); 1400 p_st, early_start, e->latency);
1398 1401
1399 if (e->data_type == MEM_DEP) 1402 if (e->data_type == MEM_DEP)
1400 end = MIN (end, SCHED_TIME (v_node) + ii - 1); 1403 end = MIN (end, SCHED_TIME (v_node) + ii - 1);
1439 1442
1440 late_start = MIN (late_start, 1443 late_start = MIN (late_start,
1441 s_st - e->latency + (e->distance * ii)); 1444 s_st - e->latency + (e->distance * ii));
1442 1445
1443 if (dump_file) 1446 if (dump_file)
1444 fprintf (dump_file, 1447 fprintf (dump_file,
1445 "succ st = %d; late_start = %d; latency = %d", 1448 "succ st = %d; late_start = %d; latency = %d",
1446 s_st, late_start, e->latency); 1449 s_st, late_start, e->latency);
1447 1450
1448 if (e->data_type == MEM_DEP) 1451 if (e->data_type == MEM_DEP)
1449 end = MAX (end, SCHED_TIME (v_node) - ii + 1); 1452 end = MAX (end, SCHED_TIME (v_node) - ii + 1);
1498 early_start = MAX (early_start, 1501 early_start = MAX (early_start,
1499 p_st + e->latency 1502 p_st + e->latency
1500 - (e->distance * ii)); 1503 - (e->distance * ii));
1501 1504
1502 if (dump_file) 1505 if (dump_file)
1503 fprintf (dump_file, 1506 fprintf (dump_file,
1504 "pred st = %d; early_start = %d; latency = %d", 1507 "pred st = %d; early_start = %d; latency = %d",
1505 p_st, early_start, e->latency); 1508 p_st, early_start, e->latency);
1506 1509
1507 if (e->type == TRUE_DEP && e->data_type == REG_DEP) 1510 if (e->type == TRUE_DEP && e->data_type == REG_DEP)
1508 count_preds++; 1511 count_preds++;
1536 late_start = MIN (late_start, 1539 late_start = MIN (late_start,
1537 s_st - e->latency 1540 s_st - e->latency
1538 + (e->distance * ii)); 1541 + (e->distance * ii));
1539 1542
1540 if (dump_file) 1543 if (dump_file)
1541 fprintf (dump_file, 1544 fprintf (dump_file,
1542 "succ st = %d; late_start = %d; latency = %d", 1545 "succ st = %d; late_start = %d; latency = %d",
1543 s_st, late_start, e->latency); 1546 s_st, late_start, e->latency);
1544 1547
1545 if (e->type == TRUE_DEP && e->data_type == REG_DEP) 1548 if (e->type == TRUE_DEP && e->data_type == REG_DEP)
1546 count_succs++; 1549 count_succs++;
1660 && ((SCHED_TIME (e->dest) - e->latency + (e->distance * ii)) == 1663 && ((SCHED_TIME (e->dest) - e->latency + (e->distance * ii)) ==
1661 last_cycle_in_window) 1664 last_cycle_in_window)
1662 && e->latency == 0 1665 && e->latency == 0
1663 we use the fact that latency is non-negative: 1666 we use the fact that latency is non-negative:
1664 SCHED_TIME (e->dest) + (e->distance * ii) >= 1667 SCHED_TIME (e->dest) + (e->distance * ii) >=
1665 SCHED_TIME (e->dest) - e->latency + (e->distance * ii)) >= 1668 SCHED_TIME (e->dest) - e->latency + (e->distance * ii)) >=
1666 last_cycle_in_window 1669 last_cycle_in_window
1667 and check only if 1670 and check only if
1668 SCHED_TIME (e->dest) + (e->distance * ii) == last_cycle_in_window */ 1671 SCHED_TIME (e->dest) + (e->distance * ii) == last_cycle_in_window */
1669 for (e = u_node->out; e != 0; e = e->next_out) 1672 for (e = u_node->out; e != 0; e = e->next_out)
1670 if (TEST_BIT (sched_nodes, e->dest->cuid) 1673 if (TEST_BIT (sched_nodes, e->dest->cuid)
1749 { 1752 {
1750 int u = nodes_order[i]; 1753 int u = nodes_order[i];
1751 ddg_node_ptr u_node = &ps->g->nodes[u]; 1754 ddg_node_ptr u_node = &ps->g->nodes[u];
1752 rtx insn = u_node->insn; 1755 rtx insn = u_node->insn;
1753 1756
1754 if (!INSN_P (insn)) 1757 if (!NONDEBUG_INSN_P (insn))
1755 { 1758 {
1756 RESET_BIT (tobe_scheduled, u); 1759 RESET_BIT (tobe_scheduled, u);
1757 continue; 1760 continue;
1758 } 1761 }
1759 1762
1830 verify_partial_schedule (ps, sched_nodes); 1833 verify_partial_schedule (ps, sched_nodes);
1831 break; 1834 break;
1832 } 1835 }
1833 1836
1834 num_splits++; 1837 num_splits++;
1838 /* The scheduling window is exclusive of 'end'
1839 whereas compute_split_window() expects an inclusive,
1840 ordered range. */
1835 if (step == 1) 1841 if (step == 1)
1836 split_row = compute_split_row (sched_nodes, start, end, 1842 split_row = compute_split_row (sched_nodes, start, end - 1,
1837 ps->ii, u_node); 1843 ps->ii, u_node);
1838 else 1844 else
1839 split_row = compute_split_row (sched_nodes, end, start, 1845 split_row = compute_split_row (sched_nodes, end + 1, start,
1840 ps->ii, u_node); 1846 ps->ii, u_node);
1841 1847
1842 ps_insert_empty_row (ps, split_row, sched_nodes); 1848 ps_insert_empty_row (ps, split_row, sched_nodes);
1843 i--; /* Go back and retry node i. */ 1849 i--; /* Go back and retry node i. */
1844 1850
2072 fprintf (dump_file, "%d ", u); 2078 fprintf (dump_file, "%d ", u);
2073 gcc_assert (u < num_nodes && u >= 0 && !TEST_BIT (tmp, u)); 2079 gcc_assert (u < num_nodes && u >= 0 && !TEST_BIT (tmp, u));
2074 2080
2075 SET_BIT (tmp, u); 2081 SET_BIT (tmp, u);
2076 } 2082 }
2077 2083
2078 if (dump_file) 2084 if (dump_file)
2079 fprintf (dump_file, "\n"); 2085 fprintf (dump_file, "\n");
2080 2086
2081 sbitmap_free (tmp); 2087 sbitmap_free (tmp);
2082 } 2088 }
2083 2089
2084 /* Order the nodes of G for scheduling and pass the result in 2090 /* Order the nodes of G for scheduling and pass the result in
2085 NODE_ORDER. Also set aux.count of each node to ASAP. 2091 NODE_ORDER. Also set aux.count of each node to ASAP.
2614 2620
2615 return true; 2621 return true;
2616 } 2622 }
2617 2623
2618 /* Advances the PS_INSN one column in its current row; returns false 2624 /* Advances the PS_INSN one column in its current row; returns false
2619 in failure and true in success. Bit N is set in MUST_FOLLOW if 2625 in failure and true in success. Bit N is set in MUST_FOLLOW if
2620 the node with cuid N must be come after the node pointed to by 2626 the node with cuid N must be come after the node pointed to by
2621 PS_I when scheduled in the same cycle. */ 2627 PS_I when scheduled in the same cycle. */
2622 static int 2628 static int
2623 ps_insn_advance_column (partial_schedule_ptr ps, ps_insn_ptr ps_i, 2629 ps_insn_advance_column (partial_schedule_ptr ps, ps_insn_ptr ps_i,
2624 sbitmap must_follow) 2630 sbitmap must_follow)
2625 { 2631 {
2663 2669
2664 return true; 2670 return true;
2665 } 2671 }
2666 2672
2667 /* Inserts a DDG_NODE to the given partial schedule at the given cycle. 2673 /* Inserts a DDG_NODE to the given partial schedule at the given cycle.
2668 Returns 0 if this is not possible and a PS_INSN otherwise. Bit N is 2674 Returns 0 if this is not possible and a PS_INSN otherwise. Bit N is
2669 set in MUST_PRECEDE/MUST_FOLLOW if the node with cuid N must be come 2675 set in MUST_PRECEDE/MUST_FOLLOW if the node with cuid N must be come
2670 before/after (respectively) the node pointed to by PS_I when scheduled 2676 before/after (respectively) the node pointed to by PS_I when scheduled
2671 in the same cycle. */ 2677 in the same cycle. */
2672 static ps_insn_ptr 2678 static ps_insn_ptr
2673 add_node_to_ps (partial_schedule_ptr ps, ddg_node_ptr node, int cycle, 2679 add_node_to_ps (partial_schedule_ptr ps, ddg_node_ptr node, int cycle,
2674 sbitmap must_precede, sbitmap must_follow) 2680 sbitmap must_precede, sbitmap must_follow)
2675 { 2681 {
2735 crr_insn; 2741 crr_insn;
2736 crr_insn = crr_insn->next_in_row) 2742 crr_insn = crr_insn->next_in_row)
2737 { 2743 {
2738 rtx insn = crr_insn->node->insn; 2744 rtx insn = crr_insn->node->insn;
2739 2745
2740 if (!INSN_P (insn)) 2746 if (!NONDEBUG_INSN_P (insn))
2741 continue; 2747 continue;
2742 2748
2743 /* Check if there is room for the current insn. */ 2749 /* Check if there is room for the current insn. */
2744 if (!can_issue_more || state_dead_lock_p (curr_state)) 2750 if (!can_issue_more || state_dead_lock_p (curr_state))
2745 return true; 2751 return true;
2766 return false; 2772 return false;
2767 } 2773 }
2768 2774
2769 /* Checks if the given node causes resource conflicts when added to PS at 2775 /* Checks if the given node causes resource conflicts when added to PS at
2770 cycle C. If not the node is added to PS and returned; otherwise zero 2776 cycle C. If not the node is added to PS and returned; otherwise zero
2771 is returned. Bit N is set in MUST_PRECEDE/MUST_FOLLOW if the node with 2777 is returned. Bit N is set in MUST_PRECEDE/MUST_FOLLOW if the node with
2772 cuid N must be come before/after (respectively) the node pointed to by 2778 cuid N must be come before/after (respectively) the node pointed to by
2773 PS_I when scheduled in the same cycle. */ 2779 PS_I when scheduled in the same cycle. */
2774 ps_insn_ptr 2780 ps_insn_ptr
2775 ps_add_node_check_conflicts (partial_schedule_ptr ps, ddg_node_ptr n, 2781 ps_add_node_check_conflicts (partial_schedule_ptr ps, ddg_node_ptr n,
2776 int c, sbitmap must_precede, 2782 int c, sbitmap must_precede,
2777 sbitmap must_follow) 2783 sbitmap must_follow)