CbC/CbC_gcc: gcc/reload1.c comparison

comparison gcc/reload1.c @ 55:77e2b8dfacca gcc-4.4.5

update it from 4.4.3 to 4.5.0

author	ryoma <e075725@ie.u-ryukyu.ac.jp>
date	Fri, 12 Feb 2010 23:39:51 +0900
parents	a06113de4d67
children	b7f97abdc517

comparison

equal deleted inserted replaced

-:c156f1bd5cd9
+:77e2b8dfacca
 {
 int from;			/* Register number to be eliminated.  */
 int to;			/* Register number used as replacement.  */
 HOST_WIDE_INT initial_offset;	/* Initial difference between values.  */
 int can_eliminate;		/* Nonzero if this elimination can be done.  */
-int can_eliminate_previous;	/* Value of CAN_ELIMINATE in previous scan over
+int can_eliminate_previous;	/* Value returned by TARGET_CAN_ELIMINATE
-				   insns made by reload.  */
+				   target hook in previous scan over insns
+				   made by reload.  */
 HOST_WIDE_INT offset;		/* Current offset between the two regs.  */
 HOST_WIDE_INT previous_offset;/* Offset at end of previous insn.  */
 int ref_outside_mem;		/* "to" has been referenced outside a MEM.  */
 rtx from_rtx;			/* REG rtx for the register to be eliminated.
 				   We cannot simply compare the number since
 static void delete_address_reloads_1 (rtx, rtx, rtx);
 static rtx inc_for_reload (rtx, rtx, rtx, int);
 #ifdef AUTO_INC_DEC
 static void add_auto_inc_notes (rtx, rtx);
 #endif
-static void copy_eh_notes (rtx, rtx);
 static void substitute (rtx *, const_rtx, rtx);
 static bool gen_reload_chain_without_interm_reg_p (int, int);
 static int reloads_conflict (int, int);
 static rtx gen_reload (rtx, rtx, int, enum reload_type);
 static rtx emit_insn_if_valid_for_reload (rtx);
 basic_block *tos, *worklist, bb;
 /* If we're not optimizing, then just err on the safe side.  */
 if (!optimize)
 return true;
 /* First determine which blocks can reach exit via normal paths.  */
 tos = worklist = XNEWVEC (basic_block, n_basic_blocks + 1);
 FOR_EACH_BB (bb)
 bb->flags &= ~BB_REACHABLE;
 /* Place the exit block on our worklist.  */
 EXIT_BLOCK_PTR->flags |= BB_REACHABLE;
 *tos++ = EXIT_BLOCK_PTR;
 /* Iterate: find everything reachable from what we've already seen.  */
 while (tos != worklist)
 {
 bb = *--tos;
 	 previously-marked insns left by say regmove.  */
 if (INSN_P (insn) && GET_CODE (PATTERN (insn)) == USE
 	  && GET_MODE (insn) != VOIDmode)
 	PUT_MODE (insn, VOIDmode);
-if (INSN_P (insn))
+if (NONDEBUG_INSN_P (insn))
 	scan_paradoxical_subregs (PATTERN (insn));
 if (set != 0 && REG_P (SET_DEST (set)))
 	{
 	  rtx note = find_reg_note (insn, REG_EQUIV, NULL_RTX);
 Do not touch virtual registers.  */
 temp_pseudo_reg_arr = XNEWVEC (int, max_regno - LAST_VIRTUAL_REGISTER - 1);
 for (n = 0, i = LAST_VIRTUAL_REGISTER + 1; i < max_regno; i++)
 temp_pseudo_reg_arr[n++] = i;
 if (ira_conflicts_p)
 /* Ask IRA to order pseudo-registers for better stack slot
 sharing.  */
 ira_sort_regnos_for_alter_reg (temp_pseudo_reg_arr, n, reg_max_ref_width);
 	 so this problem goes away.  But that's very hairy.  */
 for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
 	if (reg_renumber[i] < 0 && reg_equiv_memory_loc[i])
 	  {
-	    rtx x = eliminate_regs (reg_equiv_memory_loc[i], 0, NULL_RTX);
+	    rtx x = eliminate_regs (reg_equiv_memory_loc[i], VOIDmode,
+				    NULL_RTX);
-	    if (strict_memory_address_p (GET_MODE (regno_reg_rtx[i]),
-					 XEXP (x, 0)))
+	    if (strict_memory_address_addr_space_p
+		  (GET_MODE (regno_reg_rtx[i]), XEXP (x, 0),
+		   MEM_ADDR_SPACE (x)))
 	      reg_equiv_mem[i] = x, reg_equiv_address[i] = 0;
 	    else if (CONSTANT_P (XEXP (x, 0))
 		     || (REG_P (XEXP (x, 0))
 			 && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
 		     || (GET_CODE (XEXP (x, 0)) == PLUS
 	 since it might have changed elimination offsets.  */
 if (starting_frame_size != get_frame_size ())
 	something_changed = 1;
 /* Even if the frame size remained the same, we might still have
 	 changed elimination offsets, e.g. if find_reloads called
 	 force_const_mem requiring the back end to allocate a constant
 	 pool base register that needs to be saved on the stack.  */
 else if (!verify_initial_elim_offsets ())
 	something_changed = 1;
 pseudo.  */
 if (! frame_pointer_needed)
 FOR_EACH_BB (bb)
 bitmap_clear_bit (df_get_live_in (bb), HARD_FRAME_POINTER_REGNUM);
 /* Come here (with failure set nonzero) if we can't get enough spill
 regs.  */
 failed:
 CLEAR_REG_SET (&changed_allocation_pseudos);
 		}
 	      MEM_NOTRAP_P (reg) = 1;
 	    }
 	  else if (reg_equiv_mem[i])
 	    XEXP (reg_equiv_mem[i], 0) = addr;
+	}
+/* We don't want complex addressing modes in debug insns
+	 if simpler ones will do, so delegitimize equivalences
+	 in debug insns.  */
+if (MAY_HAVE_DEBUG_INSNS && reg_renumber[i] < 0)
+	{
+	  rtx reg = regno_reg_rtx[i];
+	  rtx equiv = 0;
+	  df_ref use, next;
+	  if (reg_equiv_constant[i])
+	    equiv = reg_equiv_constant[i];
+	  else if (reg_equiv_invariant[i])
+	    equiv = reg_equiv_invariant[i];
+	  else if (reg && MEM_P (reg))
+	    equiv = targetm.delegitimize_address (reg);
+	  else if (reg && REG_P (reg) && (int)REGNO (reg) != i)
+	    equiv = reg;
+	  if (equiv == reg)
+	    continue;
+	  for (use = DF_REG_USE_CHAIN (i); use; use = next)
+	    {
+	      insn = DF_REF_INSN (use);
+	      /* Make sure the next ref is for a different instruction,
+		 so that we're not affected by the rescan.  */
+	      next = DF_REF_NEXT_REG (use);
+	      while (next && DF_REF_INSN (next) == insn)
+		next = DF_REF_NEXT_REG (next);
+	      if (DEBUG_INSN_P (insn))
+		{
+		  if (!equiv)
+		    {
+		      INSN_VAR_LOCATION_LOC (insn) = gen_rtx_UNKNOWN_VAR_LOC ();
+		      df_insn_rescan_debug_internal (insn);
+		    }
+		  else
+		    INSN_VAR_LOCATION_LOC (insn)
+		      = simplify_replace_rtx (INSN_VAR_LOCATION_LOC (insn),
+					      reg, equiv);
+		}
+	    }
 	}
 }
 /* We must set reload_completed now since the cleanup_subreg_operands call
 below will re-recognize each insn and reload may have generated insns
 		   to do so at other times because that would change the
 		   structure of the insn in a way that reload can't handle.
 		   We special-case the commonest situation in
 		   eliminate_regs_in_insn, so just replace a PLUS with a
 		   PLUS here, unless inside a MEM.  */
-		if (mem_mode != 0 && GET_CODE (XEXP (x, 1)) == CONST_INT
+		if (mem_mode != 0 && CONST_INT_P (XEXP (x, 1))
 		    && INTVAL (XEXP (x, 1)) == - ep->previous_offset)
 		  return ep->to_rtx;
 		else
 		  return gen_rtx_PLUS (Pmode, ep->to_rtx,
 				       plus_constant (XEXP (x, 1),
 		     && REGNO (new0) >= FIRST_PSEUDO_REGISTER
 		     && reg_renumber[REGNO (new0)] < 0
 		     && reg_equiv_constant[REGNO (new0)] != 0)
 	      new0 = reg_equiv_constant[REGNO (new0)];
-	    new_rtx = form_sum (new0, new1);
+	    new_rtx = form_sum (GET_MODE (x), new0, new1);
 	    /* As above, if we are not inside a MEM we do not want to
 	       turn a PLUS into something else.  We might try to do so here
 	       for an addition of 0 if we aren't optimizing.  */
 	    if (! mem_mode && GET_CODE (new_rtx) != PLUS)
 	 so that we have (plus (mult ..) ..).  This is needed in order
 	 to keep load-address insns valid.   This case is pathological.
 	 We ignore the possibility of overflow here.  */
 if (REG_P (XEXP (x, 0))
 	  && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER
-	  && GET_CODE (XEXP (x, 1)) == CONST_INT)
+	  && CONST_INT_P (XEXP (x, 1)))
 	for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS];
 	     ep++)
 	  if (ep->from_rtx == XEXP (x, 0) && ep->can_eliminate)
 	    {
 	      if (! mem_mode
 	      if (REG_NOTE_KIND (x) == REG_DEAD)
 		return (XEXP (x, 1)
 			? eliminate_regs_1 (XEXP (x, 1), mem_mode, insn, true)
 			: NULL_RTX);
-	      x = gen_rtx_EXPR_LIST (REG_NOTE_KIND (x), new_rtx, XEXP (x, 1));
+	      x = alloc_reg_note (REG_NOTE_KIND (x), new_rtx, XEXP (x, 1));
 	    }
 	}
 /* ... fall through ...  */
 				  eliminate_regs_1 (XEXP (x, 0), GET_MODE (x),
 						    insn, true));
 case USE:
 /* Handle insn_list USE that a call to a pure function may generate.  */
-new_rtx = eliminate_regs_1 (XEXP (x, 0), 0, insn, false);
+new_rtx = eliminate_regs_1 (XEXP (x, 0), VOIDmode, insn, false);
 if (new_rtx != XEXP (x, 0))
 	return gen_rtx_USE (GET_MODE (x), new_rtx);
 return x;
 case CLOBBER:
 		   this elimination can't be done.  */
 		rtx src = SET_SRC (x);
 		if (GET_CODE (src) == PLUS
 		    && XEXP (src, 0) == SET_DEST (x)
-		    && GET_CODE (XEXP (src, 1)) == CONST_INT)
+		    && CONST_INT_P (XEXP (src, 1)))
 		  ep->offset -= INTVAL (XEXP (src, 1));
 		else
 		  ep->can_eliminate = 0;
 	      }
 	}
-elimination_effects (SET_DEST (x), 0);
+elimination_effects (SET_DEST (x), VOIDmode);
-elimination_effects (SET_SRC (x), 0);
+elimination_effects (SET_SRC (x), VOIDmode);
 return;
 case MEM:
 /* Our only special processing is to pass the mode of the MEM to our
 	 recursive call.  */
 {
 gcc_assert (GET_CODE (PATTERN (insn)) == USE
 		  || GET_CODE (PATTERN (insn)) == CLOBBER
 		  || GET_CODE (PATTERN (insn)) == ADDR_VEC
 		  || GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC
-		  || GET_CODE (PATTERN (insn)) == ASM_INPUT);
+		  || GET_CODE (PATTERN (insn)) == ASM_INPUT
+		  || DEBUG_INSN_P (insn));
 return 0;
 }
 if (old_set != 0 && REG_P (SET_DEST (old_set))
 && REGNO (SET_DEST (old_set)) < FIRST_PSEUDO_REGISTER)
 		while (base != ep->to_rtx)
 		  {
 		    rtx prev_insn, prev_set;
 		    if (GET_CODE (base) == PLUS
-		        && GET_CODE (XEXP (base, 1)) == CONST_INT)
+		        && CONST_INT_P (XEXP (base, 1)))
 		      {
 		        offset += INTVAL (XEXP (base, 1));
 		        base = XEXP (base, 0);
 		      }
 		    else if ((prev_insn = prev_nonnote_insn (base_insn)) != 0
 {
 if (GET_CODE (SET_SRC (old_set)) == PLUS)
 	plus_src = SET_SRC (old_set);
 /* First see if the source is of the form (plus (...) CST).  */
 if (plus_src
-	  && GET_CODE (XEXP (plus_src, 1)) == CONST_INT)
+	  && CONST_INT_P (XEXP (plus_src, 1)))
 	plus_cst_src = plus_src;
 else if (REG_P (SET_SRC (old_set))
 	       || plus_src)
 	{
 	  /* Otherwise, see if we have a REG_EQUAL note of the form
 	  for (links = REG_NOTES (insn); links; links = XEXP (links, 1))
 	    {
 	      if ((REG_NOTE_KIND (links) == REG_EQUAL
 		   || REG_NOTE_KIND (links) == REG_EQUIV)
 		  && GET_CODE (XEXP (links, 0)) == PLUS
-		  && GET_CODE (XEXP (XEXP (links, 0), 1)) == CONST_INT)
+		  && CONST_INT_P (XEXP (XEXP (links, 0), 1)))
 		{
 		  plus_cst_src = XEXP (links, 0);
 		  break;
 		}
 	    }
 		old_set = single_set (insn);
 		/* First see if this insn remains valid when we make the
 		   change.  If not, try to replace the whole pattern with
 		   a simple set (this may help if the original insn was a
 		   PARALLEL that was only recognized as single_set due to
 		   REG_UNUSED notes).  If this isn't valid either, keep
 		   the INSN_CODE the same and let reload fix it up.  */
 		if (!validate_change (insn, &SET_SRC (old_set), new_src, 0))
 		  {
 		    rtx new_pat = gen_rtx_SET (VOIDmode,
 	    goto done;
 	  }
 }
 /* Determine the effects of this insn on elimination offsets.  */
-elimination_effects (old_body, 0);
+elimination_effects (old_body, VOIDmode);
 /* Eliminate all eliminable registers occurring in operands that
 can be handled by reload.  */
 extract_insn (insn);
 for (i = 0; i < recog_data.n_operands; i++)
 	      && (recog_data.operand_loc[i] == &XEXP (plus_src, 0)
 		  || recog_data.operand_loc[i] == &XEXP (plus_src, 1)))
 	    in_plus = true;
 	  substed_operand[i]
-	    = eliminate_regs_1 (recog_data.operand[i], 0,
+	    = eliminate_regs_1 (recog_data.operand[i], VOIDmode,
 			        replace ? insn : NULL_RTX,
 				is_set_src || in_plus);
 	  if (substed_operand[i] != orig_operand[i])
 	    val = 1;
 	  /* Terminate the search in check_eliminable_occurrences at
 to a register that we eliminate and could cause a different number
 of spill registers to be needed in the final reload pass than in
 the pre-passes.  */
 if (val && REG_NOTES (insn) != 0)
 REG_NOTES (insn)
-= eliminate_regs_1 (REG_NOTES (insn), 0, REG_NOTES (insn), true);
+= eliminate_regs_1 (REG_NOTES (insn), VOIDmode, REG_NOTES (insn), true);
 return val;
 }
 /* Loop through all elimination pairs.
 for (i = 0; i < NUM_ELIMINABLE_REGS; i++)
 if (reg_eliminate[i].can_eliminate && dest == reg_eliminate[i].to_rtx
 	&& (GET_CODE (x) != SET
 	    || GET_CODE (SET_SRC (x)) != PLUS
 	    || XEXP (SET_SRC (x), 0) != dest
-	    || GET_CODE (XEXP (SET_SRC (x), 1)) != CONST_INT))
+	    || !CONST_INT_P (XEXP (SET_SRC (x), 1))))
 {
 	reg_eliminate[i].can_eliminate_previous
 	  = reg_eliminate[i].can_eliminate = 0;
 	num_eliminable--;
 }
 {
 int previous_frame_pointer_needed = frame_pointer_needed;
 struct elim_table *ep;
 for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
-if ((ep->from == HARD_FRAME_POINTER_REGNUM && FRAME_POINTER_REQUIRED)
+if ((ep->from == HARD_FRAME_POINTER_REGNUM
+&& targetm.frame_pointer_required ())
 #ifdef ELIMINABLE_REGS
-	|| ! CAN_ELIMINATE (ep->from, ep->to)
+	|| ! targetm.can_eliminate (ep->from, ep->to)
 #endif
 	)
 ep->can_eliminate = 0;
 /* Look for the case where we have discovered that we can't replace
 ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++, ep1++)
 {
 ep->from = ep1->from;
 ep->to = ep1->to;
 ep->can_eliminate = ep->can_eliminate_previous
-	= (CAN_ELIMINATE (ep->from, ep->to)
+	= (targetm.can_eliminate (ep->from, ep->to)
 	   && ! (ep->to == STACK_POINTER_REGNUM
 		 && frame_pointer_needed
 		 && (! SUPPORTS_STACK_ALIGNMENT
 		     || ! stack_realign_fp)));
 }
 #else
 reg_eliminate[0].from = reg_eliminate_1[0].from;
 {
 	/* Record the current hard register the pseudo is allocated to
 	   in pseudo_previous_regs so we avoid reallocating it to the
 	   same hard reg in a later pass.  */
 	gcc_assert (reg_renumber[i] >= 0);
 	SET_HARD_REG_BIT (pseudo_previous_regs[i], reg_renumber[i]);
 	/* Mark it as no longer having a hard register home.  */
 	reg_renumber[i] = -1;
 	if (ira_conflicts_p)
 	  /* Inform IRA about the change.  */
 static void
 fixup_eh_region_note (rtx insn, rtx prev, rtx next)
 {
 rtx note = find_reg_note (insn, REG_EH_REGION, NULL_RTX);
-unsigned int trap_count;
-rtx i;
 if (note == NULL)
 return;
+if (!insn_could_throw_p (insn))
-if (may_trap_p (PATTERN (insn)))
+remove_note (insn, note);
-trap_count = 1;
+copy_reg_eh_region_note_forward (note, NEXT_INSN (prev), next);
-else
-{
-remove_note (insn, note);
-trap_count = 0;
-}
-for (i = NEXT_INSN (prev); i != next; i = NEXT_INSN (i))
-if (INSN_P (i) && i != insn && may_trap_p (PATTERN (i)))
-{
-	trap_count++;
-	add_reg_note (i, REG_EH_REGION, XEXP (note, 0));
-}
 }
 /* Reload pseudo-registers into hard regs around each insn as needed.
 Additional register load insns are output before the insn that needs it
 and perhaps store insns after insns that modify the reloaded pseudo reg.
 			  n = count_occurrences (PATTERN (p), reload_reg, 0);
 			  if (! n)
 			    continue;
 			  if (n == 1)
 			    {
-			      n = validate_replace_rtx (reload_reg,
+			      rtx replace_reg
-							gen_rtx_fmt_e (code,
+				= gen_rtx_fmt_e (code, mode, reload_reg);
-								       mode,
-								       reload_reg),
+			      validate_replace_rtx_group (reload_reg,
-							p);
+							  replace_reg, p);
+			      n = verify_changes (0);
 			      /* We must also verify that the constraints
-				 are met after the replacement.  */
+				 are met after the replacement.  Make sure
-			      extract_insn (p);
+				 extract_insn is only called for an insn
+				 where the replacements were found to be
+				 valid so far. */
 			      if (n)
-				n = constrain_operands (1);
+				{
+				  extract_insn (p);
+				  n = constrain_operands (1);
+				}
+			      /* If the constraints were not met, then
+				 undo the replacement, else confirm it.  */
+			      if (!n)
+				cancel_changes (0);
 			      else
-				break;
+				confirm_change_group ();
-			      /* If the constraints were not met, then
-				 undo the replacement.  */
-			      if (!n)
-				{
-				  validate_replace_rtx (gen_rtx_fmt_e (code,
-								       mode,
-								       reload_reg),
-							reload_reg, p);
-				  break;
-				}
 			    }
 			  break;
 			}
 		      if (n == 1)
 			{
 /* Discard all record of any value reloaded from X,
 or reloaded in X from someplace else;
 unless X is an output reload reg of the current insn.
 X may be a hard reg (the reload reg)
 or it may be a pseudo reg that was reloaded from.
 When DATA is non-NULL just mark the registers in regset
 to be forgotten later.  */
 static void
 	  /* We want constrain operands to treat this insn strictly in
 	     its validity determination, i.e., the way it would after
 	     reload has completed.  */
 	  result = constrain_operands (1);
 	}
 delete_insns_since (last);
 return result;
 }
 /* It looks like other cases in gen_reload are not possible for
 chain reloads or do need an intermediate hard registers.  */
 return true;
 }
 	   && ! conflicts_with_override (reloadreg)
 	   && free_for_value_p (REGNO (reloadreg), rl->mode, rl->opnum,
 				rl->when_needed, old, rl->out, j, 0))
 {
 rtx temp = PREV_INSN (insn);
-while (temp && NOTE_P (temp))
+while (temp && (NOTE_P (temp) || DEBUG_INSN_P (temp)))
 	temp = PREV_INSN (temp);
 if (temp
 	  && NONJUMP_INSN_P (temp)
 	  && GET_CODE (PATTERN (temp)) == SET
 	  && SET_DEST (PATTERN (temp)) == old
 		    /* Inform IRA about the change.  */
 		    ira_mark_allocation_change (REGNO (old));
 		  alter_reg (REGNO (old), -1, false);
 		}
 	      special = 1;
+	      /* Adjust any debug insns between temp and insn.  */
+	      while ((temp = NEXT_INSN (temp)) != insn)
+		if (DEBUG_INSN_P (temp))
+		  replace_rtx (PATTERN (temp), old, reloadreg);
+		else
+		  gcc_assert (NOTE_P (temp));
 	    }
 	  else
 	    {
 	      SET_DEST (PATTERN (temp)) = old;
 	    }
 	  if (new_class == NO_REGS && sri.icode == CODE_FOR_nothing)
 	    second_reload_reg = 0;
 	  else if (new_class == NO_REGS)
 	    {
 	      if (reload_adjust_reg_for_icode (&second_reload_reg,
-					       third_reload_reg, sri.icode))
+					       third_reload_reg,
-		icode = sri.icode, third_reload_reg = 0;
+					       (enum insn_code) sri.icode))
+		{
+		  icode = (enum insn_code) sri.icode;
+		  third_reload_reg = 0;
+		}
 	      else
-		oldequiv = old, real_oldequiv = real_old;
+		{
+		  oldequiv = old;
+		  real_oldequiv = real_old;
+		}
 	    }
 	  else if (sri.icode != CODE_FOR_nothing)
 	    /* We currently lack a way to express this in reloads.  */
 	    gcc_unreachable ();
 	  else
 	      if (new_t_class == NO_REGS && sri2.icode == CODE_FOR_nothing)
 		{
 		  if (reload_adjust_reg_for_temp (&second_reload_reg,
 						  third_reload_reg,
 						  new_class, mode))
-		    third_reload_reg = 0, tertiary_icode = sri2.icode;
+		    {
+		      third_reload_reg = 0;
+		      tertiary_icode = (enum insn_code) sri2.icode;
+		    }
 		  else
-		    oldequiv = old, real_oldequiv = real_old;
+		    {
+		      oldequiv = old;
+		      real_oldequiv = real_old;
+		    }
 		}
 	      else if (new_t_class == NO_REGS && sri2.icode != CODE_FOR_nothing)
 		{
 		  rtx intermediate = second_reload_reg;
 		  if (reload_adjust_reg_for_temp (&intermediate, NULL,
 						  new_class, mode)
 		      && reload_adjust_reg_for_icode (&third_reload_reg, NULL,
-						      sri2.icode))
+						      ((enum insn_code)
+						       sri2.icode)))
 		    {
 		      second_reload_reg = intermediate;
-		      tertiary_icode = sri2.icode;
+		      tertiary_icode = (enum insn_code) sri2.icode;
 		    }
 		  else
-		    oldequiv = old, real_oldequiv = real_old;
+		    {
+		      oldequiv = old;
+		      real_oldequiv = real_old;
+		    }
 		}
 	      else if (new_t_class != NO_REGS && sri2.icode == CODE_FOR_nothing)
 		{
 		  rtx intermediate = second_reload_reg;
 						  new_class, mode)
 		      && reload_adjust_reg_for_temp (&third_reload_reg, NULL,
 						      new_t_class, mode))
 		    {
 		      second_reload_reg = intermediate;
-		      tertiary_icode = sri2.icode;
+		      tertiary_icode = (enum insn_code) sri2.icode;
 		    }
 		  else
-		    oldequiv = old, real_oldequiv = real_old;
+		    {
+		      oldequiv = old;
+		      real_oldequiv = real_old;
+		    }
 		}
 	      else
-		/* This could be handled more intelligently too.  */
+		{
-		oldequiv = old, real_oldequiv = real_old;
+		  /* This could be handled more intelligently too.  */
+		  oldequiv = old;
+		  real_oldequiv = real_old;
+		}
 	    }
 	}
 /* If we still need a secondary reload register, check
 	 to see if it is being used as a scratch or intermediate
 gen_reload (reloadreg, real_oldequiv, rl->opnum,
 		  rl->when_needed);
 }
 if (flag_non_call_exceptions)
-copy_eh_notes (insn, get_insns ());
+copy_reg_eh_region_note_forward (insn, get_insns (), NULL);
 /* End this sequence.  */
 *where = get_insns ();
 end_sequence ();
 }
 else
 output_reload_insns[rl->opnum] = get_insns ();
 if (flag_non_call_exceptions)
-copy_eh_notes (insn, get_insns ());
+copy_reg_eh_region_note_forward (insn, get_insns (), NULL);
 end_sequence ();
 }
 /* Do input reloading for reload RL, which is for the insn described by CHAIN
 		      reg_reloaded_insn[src_regno + k] = store_insn;
 		      CLEAR_HARD_REG_BIT (reg_reloaded_dead, src_regno + k);
 		      SET_HARD_REG_BIT (reg_reloaded_valid, src_regno + k);
 		      if (HARD_REGNO_CALL_PART_CLOBBERED (src_regno + k,
 							  mode))
 			SET_HARD_REG_BIT (reg_reloaded_call_part_clobbered,
 					  src_regno + k);
 		      else
 			CLEAR_HARD_REG_BIT (reg_reloaded_call_part_clobbered,
 					    src_regno + k);
 		      SET_HARD_REG_BIT (reg_is_output_reload, src_regno + k);
 			SET_HARD_REG_BIT (reg_reloaded_died, src_regno);
 		      else
 			CLEAR_HARD_REG_BIT (reg_reloaded_died, src_regno);
 		    }
 		  reg_last_reload_reg[out_regno] = src_reg;
 		  /* We have to set reg_has_output_reload here, or else
 		     forget_old_reloads_1 will clear reg_last_reload_reg
 		     right away.  */
 		  SET_REGNO_REG_SET (&reg_has_output_reload,
 				     out_regno);
 		}
 if (CALL_P (insn) && CALL_INSN_FUNCTION_USAGE (insn))
 n_occurrences += count_occurrences (CALL_INSN_FUNCTION_USAGE (insn),
 					reg, 0);
 if (substed)
 n_occurrences += count_occurrences (PATTERN (insn),
-					eliminate_regs (substed, 0,
+					eliminate_regs (substed, VOIDmode,
 							NULL_RTX), 0);
 for (i1 = reg_equiv_alt_mem_list[REGNO (reg)]; i1; i1 = XEXP (i1, 1))
 {
 gcc_assert (!rtx_equal_p (XEXP (i1, 0), substed));
 n_occurrences += count_occurrences (PATTERN (insn), XEXP (i1, 0), 0);
 return;
 set = single_set (next);
 set2 = single_set (prev);
 if (! set || ! set2
 || GET_CODE (SET_SRC (set)) != PLUS || GET_CODE (SET_SRC (set2)) != PLUS
-|| GET_CODE (XEXP (SET_SRC (set), 1)) != CONST_INT
+|| !CONST_INT_P (XEXP (SET_SRC (set), 1))
-|| GET_CODE (XEXP (SET_SRC (set2), 1)) != CONST_INT)
+|| !CONST_INT_P (XEXP (SET_SRC (set2), 1)))
 return;
 dst = SET_DEST (set);
 if (! rtx_equal_p (dst, SET_DEST (set2))
 || ! rtx_equal_p (dst, XEXP (SET_SRC (set), 0))
 || ! rtx_equal_p (dst, XEXP (SET_SRC (set2), 0))
 	 RELOADREG, save that back, then decrement RELOADREG so it has
 	 the original value.  */
 emit_insn (gen_add2_insn (reloadreg, inc));
 store = emit_insn (gen_move_insn (incloc, reloadreg));
-if (GET_CODE (inc) == CONST_INT)
+if (CONST_INT_P (inc))
 	emit_insn (gen_add2_insn (reloadreg, GEN_INT (-INTVAL (inc))));
 else
 	emit_insn (gen_sub2_insn (reloadreg, inc));
 }
 	for (j = XVECLEN (x, i) - 1; j >= 0; j--)
 	  add_auto_inc_notes (insn, XVECEXP (x, i, j));
 }
 }
 #endif
-/* Copy EH notes from an insn to its reloads.  */
-static void
-copy_eh_notes (rtx insn, rtx x)
-{
-rtx eh_note = find_reg_note (insn, REG_EH_REGION, NULL_RTX);
-if (eh_note)
-{
-for (; x != 0; x = NEXT_INSN (x))
-	{
-	  if (may_trap_p (PATTERN (x)))
-	    add_reg_note (x, REG_EH_REGION, XEXP (eh_note, 0));
-	}
-}
-}
 /* This is used by reload pass, that does emit some instructions after
 abnormal calls moving basic block end, but in fact it wants to emit
 them on the edge.  Looks for abnormal call edges, find backward the
 proper call and fix the damage.
 		  insn = next;
 		}
 	    }
 	  /* It may be that we don't find any such trapping insn.  In this
 	     case we discovered quite late that the insn that had been
 	     marked as can_throw_internal in fact couldn't trap at all.
 	     So we should in fact delete the EH edges out of the block.  */
 	  else
 	    purge_dead_edges (bb);
 	}

Mercurial > hg > CbC > CbC_gcc

comparison gcc/reload1.c @ 55:77e2b8dfacca gcc-4.4.5