Mercurial > hg > CbC > CbC_gcc
comparison gcc/config/aarch64/aarch64.opt @ 131:84e7813d76e9
gcc-8.2
author | mir3636 |
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date | Thu, 25 Oct 2018 07:37:49 +0900 |
parents | 04ced10e8804 |
children | 1830386684a0 |
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111:04ced10e8804 | 131:84e7813d76e9 |
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1 ; Machine description for AArch64 architecture. | 1 ; Machine description for AArch64 architecture. |
2 ; Copyright (C) 2009-2017 Free Software Foundation, Inc. | 2 ; Copyright (C) 2009-2018 Free Software Foundation, Inc. |
3 ; Contributed by ARM Ltd. | 3 ; Contributed by ARM Ltd. |
4 ; | 4 ; |
5 ; This file is part of GCC. | 5 ; This file is part of GCC. |
6 ; | 6 ; |
7 ; GCC is free software; you can redistribute it and/or modify it | 7 ; GCC is free software; you can redistribute it and/or modify it |
83 mcmodel= | 83 mcmodel= |
84 Target RejectNegative Joined Enum(cmodel) Var(aarch64_cmodel_var) Init(AARCH64_CMODEL_SMALL) Save | 84 Target RejectNegative Joined Enum(cmodel) Var(aarch64_cmodel_var) Init(AARCH64_CMODEL_SMALL) Save |
85 Specify the code model. | 85 Specify the code model. |
86 | 86 |
87 mstrict-align | 87 mstrict-align |
88 Target Report RejectNegative Mask(STRICT_ALIGN) Save | 88 Target Report Mask(STRICT_ALIGN) Save |
89 Don't assume that unaligned accesses are handled by the system. | 89 Don't assume that unaligned accesses are handled by the system. |
90 | 90 |
91 momit-leaf-frame-pointer | 91 momit-leaf-frame-pointer |
92 Target Report Var(flag_omit_leaf_frame_pointer) Init(2) Save | 92 Target Report Var(flag_omit_leaf_frame_pointer) Init(2) Save |
93 Omit the frame pointer in leaf functions. | 93 Omit the frame pointer in leaf functions. |
115 EnumValue | 115 EnumValue |
116 Enum(aarch64_tls_size) String(48) Value(48) | 116 Enum(aarch64_tls_size) String(48) Value(48) |
117 | 117 |
118 march= | 118 march= |
119 Target RejectNegative ToLower Joined Var(aarch64_arch_string) | 119 Target RejectNegative ToLower Joined Var(aarch64_arch_string) |
120 -march=ARCH Use features of architecture ARCH. | 120 Use features of architecture ARCH. |
121 | 121 |
122 mcpu= | 122 mcpu= |
123 Target RejectNegative ToLower Joined Var(aarch64_cpu_string) | 123 Target RejectNegative ToLower Joined Var(aarch64_cpu_string) |
124 -mcpu=CPU Use features of and optimize for CPU. | 124 Use features of and optimize for CPU. |
125 | 125 |
126 mtune= | 126 mtune= |
127 Target RejectNegative ToLower Joined Var(aarch64_tune_string) | 127 Target RejectNegative ToLower Joined Var(aarch64_tune_string) |
128 -mtune=CPU Optimize for CPU. | 128 Optimize for CPU. |
129 | 129 |
130 mabi= | 130 mabi= |
131 Target RejectNegative Joined Enum(aarch64_abi) Var(aarch64_abi) Init(AARCH64_ABI_DEFAULT) | 131 Target RejectNegative Joined Enum(aarch64_abi) Var(aarch64_abi) Init(AARCH64_ABI_DEFAULT) |
132 -mabi=ABI Generate code that conforms to the specified ABI. | 132 Generate code that conforms to the specified ABI. |
133 | 133 |
134 moverride= | 134 moverride= |
135 Target RejectNegative ToLower Joined Var(aarch64_override_tune_string) | 135 Target RejectNegative ToLower Joined Var(aarch64_override_tune_string) |
136 -moverride=STRING Power users only! Override CPU optimization parameters. | 136 -moverride=<string> Power users only! Override CPU optimization parameters. |
137 | 137 |
138 Enum | 138 Enum |
139 Name(aarch64_abi) Type(int) | 139 Name(aarch64_abi) Type(int) |
140 Known AArch64 ABIs (for use with the -mabi= option): | 140 Known AArch64 ABIs (for use with the -mabi= option): |
141 | 141 |
165 | 165 |
166 EnumValue | 166 EnumValue |
167 Enum(aarch64_ra_sign_scope_t) String(all) Value(AARCH64_FUNCTION_ALL) | 167 Enum(aarch64_ra_sign_scope_t) String(all) Value(AARCH64_FUNCTION_ALL) |
168 | 168 |
169 mlow-precision-recip-sqrt | 169 mlow-precision-recip-sqrt |
170 Common Var(flag_mrecip_low_precision_sqrt) Optimization | 170 Target Var(flag_mrecip_low_precision_sqrt) Optimization |
171 Enable the reciprocal square root approximation. Enabling this reduces | 171 Enable the reciprocal square root approximation. Enabling this reduces |
172 precision of reciprocal square root results to about 16 bits for | 172 precision of reciprocal square root results to about 16 bits for |
173 single precision and to 32 bits for double precision. | 173 single precision and to 32 bits for double precision. |
174 | 174 |
175 mlow-precision-sqrt | 175 mlow-precision-sqrt |
176 Common Var(flag_mlow_precision_sqrt) Optimization | 176 Target Var(flag_mlow_precision_sqrt) Optimization |
177 Enable the square root approximation. Enabling this reduces | 177 Enable the square root approximation. Enabling this reduces |
178 precision of square root results to about 16 bits for | 178 precision of square root results to about 16 bits for |
179 single precision and to 32 bits for double precision. | 179 single precision and to 32 bits for double precision. |
180 If enabled, it implies -mlow-precision-recip-sqrt. | 180 If enabled, it implies -mlow-precision-recip-sqrt. |
181 | 181 |
182 mlow-precision-div | 182 mlow-precision-div |
183 Common Var(flag_mlow_precision_div) Optimization | 183 Target Var(flag_mlow_precision_div) Optimization |
184 Enable the division approximation. Enabling this reduces | 184 Enable the division approximation. Enabling this reduces |
185 precision of division results to about 16 bits for | 185 precision of division results to about 16 bits for |
186 single precision and to 32 bits for double precision. | 186 single precision and to 32 bits for double precision. |
187 | 187 |
188 Enum | |
189 Name(sve_vector_bits) Type(enum aarch64_sve_vector_bits_enum) | |
190 The possible SVE vector lengths: | |
191 | |
192 EnumValue | |
193 Enum(sve_vector_bits) String(scalable) Value(SVE_SCALABLE) | |
194 | |
195 EnumValue | |
196 Enum(sve_vector_bits) String(128) Value(SVE_128) | |
197 | |
198 EnumValue | |
199 Enum(sve_vector_bits) String(256) Value(SVE_256) | |
200 | |
201 EnumValue | |
202 Enum(sve_vector_bits) String(512) Value(SVE_512) | |
203 | |
204 EnumValue | |
205 Enum(sve_vector_bits) String(1024) Value(SVE_1024) | |
206 | |
207 EnumValue | |
208 Enum(sve_vector_bits) String(2048) Value(SVE_2048) | |
209 | |
210 msve-vector-bits= | |
211 Target RejectNegative Joined Enum(sve_vector_bits) Var(aarch64_sve_vector_bits) Init(SVE_SCALABLE) | |
212 -msve-vector-bits=<number> Set the number of bits in an SVE vector register to N. | |
213 | |
188 mverbose-cost-dump | 214 mverbose-cost-dump |
189 Common Undocumented Var(flag_aarch64_verbose_cost) | 215 Target Undocumented Var(flag_aarch64_verbose_cost) |
190 Enables verbose cost model dumping in the debug dump files. | 216 Enables verbose cost model dumping in the debug dump files. |
217 | |
218 mtrack-speculation | |
219 Target Var(aarch64_track_speculation) | |
220 Generate code to track when the CPU might be speculating incorrectly. |