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date Thu, 25 Oct 2018 07:37:49 +0900
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111:04ced10e8804 131:84e7813d76e9
1 /* Declarations for the C-SKY back end.
2 Copyright (C) 2018 Free Software Foundation, Inc.
3 Contributed by C-SKY Microsystems and Mentor Graphics.
4
5 This file is part of GCC.
6
7 GCC is free software; you can redistribute it and/or modify it
8 under the terms of the GNU General Public License as published
9 by the Free Software Foundation; either version 3, or (at your
10 option) any later version.
11
12 GCC is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
20
21
22 #ifndef GCC_CSKY_H
23 #define GCC_CSKY_H
24
25 /* In some places e.g. csky_secondary_reload, we use -1 to indicate an
26 invalid register. In other places where N is unsigned the comparison
27 to zero would give an error, so explicitly cast to int here. */
28 #define CSKY_GENERAL_REGNO_P(N) \
29 ((N) < CSKY_NGPR_REGS && (int)(N) >= 0)
30
31 #define CSKY_VREG_P(N) \
32 ((N) >= CSKY_FIRST_VFP_REGNUM && (N) <= CSKY_LAST_VFP_REGNUM)
33
34 #define CSKY_HILO_REG_P(N) \
35 ((N) == CSKY_HI_REGNUM || (N) == CSKY_LO_REGNUM)
36
37 /* Helper macros for constant constraints and predicates. */
38 #define CSKY_VALUE_BETWEEN(VALUE, LOW, HIGH) \
39 ((VALUE) >= (LOW) && (VALUE) <= (HIGH))
40
41 #define CSKY_CONST_OK_FOR_I(VALUE) \
42 CSKY_VALUE_BETWEEN (VALUE, 0, 65535)
43
44 #define CSKY_CONST_OK_FOR_J(VALUE) \
45 CSKY_VALUE_BETWEEN (VALUE, 1, 32)
46
47 #define CSKY_CONST_OK_FOR_K(VALUE) \
48 CSKY_VALUE_BETWEEN (VALUE, 0, 31)
49
50 #define CSKY_CONST_OK_FOR_L(VALUE) \
51 CSKY_VALUE_BETWEEN (VALUE, 1, 8)
52
53 #define CSKY_CONST_OK_FOR_M(VALUE) \
54 CSKY_VALUE_BETWEEN (VALUE, 1, 4096)
55
56 #define CSKY_CONST_OK_FOR_N(VALUE) \
57 CSKY_VALUE_BETWEEN (VALUE, 1, 256)
58
59 #define CSKY_CONST_OK_FOR_O(VALUE) \
60 CSKY_VALUE_BETWEEN (VALUE, 0, 4095)
61
62 #define CSKY_CONST_OK_FOR_P(VALUE) \
63 (((VALUE) & 0x3) == 0 && CSKY_VALUE_BETWEEN (VALUE, 4, 508))
64
65 #define CSKY_CONST_OK_FOR_T(VALUE) \
66 CSKY_VALUE_BETWEEN (VALUE, -256, -1)
67
68 #define CSKY_CONST_OK_FOR_Ub(VALUE) \
69 (exact_log2 (VALUE & 0xFFFFFFFF) >= 0)
70
71 #define CSKY_CONST_OK_FOR_Uc(VALUE) \
72 ((VALUE) == (HOST_WIDE_INT) -1 \
73 || (exact_log2 ((VALUE) + 1) >= 0 \
74 && exact_log2 ((VALUE) + 1) <= 31))
75
76 #define CSKY_CONST_OK_FOR_Ud(VALUE) \
77 ((CSKY_CONST_OK_FOR_I ((VALUE) & 0xffffffff) \
78 || CSKY_CONST_OK_FOR_Ub ((VALUE)) \
79 || CSKY_CONST_OK_FOR_Uc (((VALUE) << 32) >> 32)) \
80 && (CSKY_CONST_OK_FOR_I ((VALUE) >> 32) \
81 || CSKY_CONST_OK_FOR_Ub ((VALUE) >> 32) \
82 || CSKY_CONST_OK_FOR_Uc ((VALUE) >> 32))) \
83
84 #define CSKY_CONST_OK_FOR_Ug(VALUE) \
85 (((VALUE) & 0x3) == 0 && CSKY_VALUE_BETWEEN (VALUE, -508, -4))
86
87 #define CSKY_CONST_OK_FOR_Uh(VALUE) \
88 CSKY_VALUE_BETWEEN (VALUE, -31, 0)
89
90 #define CSKY_CONST_OK_FOR_Uj(VALUE) \
91 (((VALUE) & 0x3) == 0 && CSKY_VALUE_BETWEEN (VALUE, 1, 1024))
92
93 #define CSKY_CONST_OK_FOR_Uk(VALUE) \
94 CSKY_VALUE_BETWEEN (VALUE, 1, 65536)
95
96 #define CSKY_CONST_OK_FOR_Ul(VALUE) \
97 (((VALUE) & 0x3) == 0 && CSKY_VALUE_BETWEEN (VALUE, -1024, -4))
98
99 #define CSKY_CONST_OK_FOR_Um(VALUE) \
100 CSKY_VALUE_BETWEEN (VALUE, -4096, -1)
101
102 #define CSKY_CONST_OK_FOR_US(VALUE) \
103 CSKY_VALUE_BETWEEN (VALUE, -8, -1)
104
105 #define CSKY_CONST_OK_FOR_MOVIH(VALUE) \
106 (((VALUE) & 0xFFFF) == 0)
107
108 #ifndef TARGET_CPU_DEFAULT
109 #define TARGET_CPU_DEFAULT CSKY_TARGET_CORE_GET(ck810f)
110 #endif
111
112 /* Options that are enabled by default are specified as such in the
113 .opt file. */
114 #define TARGET_DEFAULT 0
115
116 /* The highest CSKY architecture version supported by the target. */
117 #define CSKY_TARGET_ARCH(arch) \
118 (csky_base_arch == CSKY_TARGET_ARCH_GET (arch))
119
120 /* Define some macros for target code generation options. */
121 #define TARGET_SOFT_FPU \
122 (csky_fpu_index == TARGET_FPU_fpv2_sf)
123 #define TARGET_CASESI \
124 (optimize_size && TARGET_CONSTANT_POOL \
125 && (CSKY_TARGET_ARCH (CK801) || CSKY_TARGET_ARCH (CK802)))
126 #define TARGET_TLS \
127 (CSKY_TARGET_ARCH (CK807) || CSKY_TARGET_ARCH (CK810))
128
129 /* Number of loads/stores handled by ldm/stm. */
130 #define CSKY_MIN_MULTIPLE_STLD 3
131 #define CSKY_MAX_MULTIPLE_STLD 12
132
133 /* Pull in enums and defines for processor/arch variants. This makes
134 it possible to use CSKY_TARGET_ARCH in macros defined in this file. */
135 #include "csky_opts.h"
136 extern enum csky_base_architecture csky_base_arch;
137
138 /* Pull in enums and defines for ISA features. Likewise required to
139 support use of CSKY_ISA_FEATURE in this file.
140 Note that the CSKY_ISA_FEATURE macro tests properties of the
141 particular processor we're compiling for, not code generation
142 options that may have dependencies on those features. The latter
143 are handled by TARGET_xxxx macros/variables instead. See csky.opt. */
144 #include "csky_isa.h"
145 extern int csky_arch_isa_features[];
146 #define CSKY_ISA_FEATURE(IDENT) \
147 csky_arch_isa_features[CSKY_ISA_FEATURE_GET (IDENT)]
148
149 /******************************************************************
150 * Storage Layout *
151 ******************************************************************/
152
153
154 /* Define this if most significant bit is lowest numbered
155 in instructions that operate on numbered bit-fields. */
156 #define BITS_BIG_ENDIAN 0
157
158 /* If the most significant byte of a word is the lowest numbered. */
159 #define BYTES_BIG_ENDIAN (TARGET_BIG_ENDIAN != 0)
160
161 /* If the most significant word of a multiword number is the lowest. */
162 #define WORDS_BIG_ENDIAN (BYTES_BIG_ENDIAN)
163
164 /* Width of a word, in units (bytes). */
165 #define UNITS_PER_WORD 4
166
167 /* Define this macro if it is advisable to hold scalars in registers
168 in a wider mode than that declared by the program. In such cases,
169 the value is constrained to be within the bounds of the declared
170 type, but kept valid in the wider mode. The signedness of the
171 extension may differ from that of the type. */
172 #define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \
173 if (GET_MODE_CLASS (MODE) == MODE_INT \
174 && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \
175 (MODE) = SImode;
176
177
178 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
179 #define PARM_BOUNDARY 32
180
181 /* Boundary (in *bits*) on which stack pointer should be aligned.
182 Per C-SKY, the published V2 ABI document is incorrect and the proper
183 alignment is on a 4-byte boundary rather than 8 bytes. */
184 #define STACK_BOUNDARY 32
185
186 /* Align definitions of arrays, unions and structures so that
187 initializations and copies can be made more efficient. This is not
188 ABI-changing, so it only affects places where we can see the
189 definition. Increasing the alignment tends to introduce padding,
190 so don't do this when optimizing for size/conserving stack space. */
191 #define CSKY_EXPAND_ALIGNMENT(COND, EXP, ALIGN) \
192 (((COND) && ((ALIGN) < BITS_PER_WORD) \
193 && (TREE_CODE (EXP) == ARRAY_TYPE \
194 || TREE_CODE (EXP) == UNION_TYPE \
195 || TREE_CODE (EXP) == RECORD_TYPE)) \
196 ? BITS_PER_WORD : (ALIGN))
197
198 /* Align global data. */
199 #define DATA_ALIGNMENT(EXP, ALIGN) \
200 CSKY_EXPAND_ALIGNMENT (!optimize_size, EXP, ALIGN)
201
202 /* Similarly, make sure that objects on the stack are sensibly aligned. */
203 #define LOCAL_ALIGNMENT(EXP, ALIGN) \
204 CSKY_EXPAND_ALIGNMENT (!flag_conserve_stack, EXP, ALIGN)
205
206 /* No data type wants to be aligned rounder than this. */
207 #define BIGGEST_ALIGNMENT 32
208
209 /* Every structures size must be a multiple of 8 bits. */
210 #define STRUCTURE_SIZE_BOUNDARY 8
211
212 /* Look at the fundamental type that is used for a bit-field and use
213 that to impose alignment on the enclosing structure.
214 struct s {int a:8}; should have same alignment as "int", not "char". */
215 #define PCC_BITFIELD_TYPE_MATTERS 1
216
217 /* Largest integer machine mode for structures. If undefined, the default
218 is GET_MODE_SIZE(DImode). */
219 #define MAX_FIXED_MODE_SIZE 64
220
221 /* Allocation boundary (in *bits*) for the code of a function.
222 Optimize ck801 and ck802 a little harder for size. */
223 #define FUNCTION_BOUNDARY \
224 (((CSKY_TARGET_ARCH (CK801) || CSKY_TARGET_ARCH (CK802)) \
225 && optimize_size) \
226 ? 16 : 32)
227
228 /* C-SKY does not support unaligned access. */
229 #define STRICT_ALIGNMENT 1
230
231 #undef SIZE_TYPE
232 #define SIZE_TYPE "unsigned int"
233
234 #undef PTRDIFF_TYPE
235 #define PTRDIFF_TYPE "int"
236
237 #undef WCHAR_TYPE
238 #define WCHAR_TYPE "long int"
239
240 #undef UINT_LEAST32_TYPE
241 #define UINT_LEAST32_TYPE "unsigned int"
242
243 #undef INT_LEAST32_TYPE
244 #define INT_LEAST32_TYPE "int"
245
246 #undef WCHAR_TYPE_SIZE
247 #define WCHAR_TYPE_SIZE BITS_PER_WORD
248
249 /******************************************************************
250 * Layout of Source Language Data Types *
251 ******************************************************************/
252
253
254 /* 'char' is unsigned by default for backward compatibility. */
255 #define DEFAULT_SIGNED_CHAR 0
256
257
258 /******************************************************************
259 * Stack Layout and Calling Conventions *
260 ******************************************************************/
261
262
263 /* Basic Stack Layout */
264
265
266 /* Define this if pushing a word on the stack
267 makes the stack pointer a smaller address. */
268 #define STACK_GROWS_DOWNWARD 1
269
270 /* Define this to nonzero if the nominal address of the stack frame
271 is at the high-address end of the local variables;
272 that is, each additional local variable allocated
273 goes at a more negative offset in the frame. */
274 #define FRAME_GROWS_DOWNWARD 1
275
276 /* Offset of first parameter from the argument pointer register value. */
277 #define FIRST_PARM_OFFSET(FNDECL) 0
278
279 /* A C expression whose value is RTL representing the value of the return
280 address for the frame COUNT steps up from the current frame. */
281 #define RETURN_ADDR_RTX(COUNT, FRAME) \
282 csky_return_addr (COUNT, FRAME)
283
284 /* Pick up the return address upon entry to a procedure. Used for
285 dwarf2 unwind information. This also enables the table driven
286 mechanism. */
287 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, CSKY_LR_REGNUM)
288
289
290 /* Exception Handling Support */
291
292 /* The register that holds the return address in exception handlers. */
293 #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (SImode, CSKY_EH_STACKADJ_REGNUM)
294
295
296 /* Registers That Address the Stack Frame */
297
298
299 /* Register to use for pushing function arguments. */
300 #define STACK_POINTER_REGNUM CSKY_SP_REGNUM
301
302 /* Base register for access to local variables of the function. */
303 #define FRAME_POINTER_REGNUM 8
304
305 /* Base register for access to arguments of the function. This is a fake
306 register that is always eliminated. */
307 #define ARG_POINTER_REGNUM 32
308
309 /* Static chain register.
310 Register use is more restricted on CK801. */
311 #define STATIC_CHAIN_REGNUM (CSKY_TARGET_ARCH (CK801) ? 13 : 12)
312
313
314 /* Eliminating Frame Pointer and Arg Pointer */
315
316
317 /* Definitions for register eliminations.
318
319 This is an array of structures. Each structure initializes one pair
320 of eliminable registers. The "from" register number is given first,
321 followed by "to". Eliminations of the same "from" register are listed
322 in order of preference.
323
324 We have two registers that can be eliminated on the CSKY. First, the
325 arg pointer register can often be eliminated in favor of the stack
326 pointer register. Secondly, the pseudo frame pointer register can always
327 be eliminated; it is replaced with the stack pointer. */
328 #define ELIMINABLE_REGS \
329 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM },\
330 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM },\
331 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM }}
332
333 /* Define the offset between two registers, one to be eliminated, and the
334 other its replacement, at the start of a routine. */
335 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
336 (OFFSET) = csky_initial_elimination_offset (FROM, TO)
337
338
339 /* Passing Function Arguments on the Stack */
340
341
342 /* Define this if the maximum size of all the outgoing args is to be
343 accumulated and pushed during the prologue. The amount can be
344 found in the variable crtl->outgoing_args_size. */
345 #define ACCUMULATE_OUTGOING_ARGS 1
346
347
348 /* Passing Arguments in Registers */
349
350
351 /* A C type for declaring a variable that is used as the first argument of
352 TARGET_ FUNCTION_ARG and other related values. */
353 #define CUMULATIVE_ARGS int
354
355 /* Initialize a variable CUM of type CUMULATIVE_ARGS
356 for a call to a function whose data type is FNTYPE.
357 For a library call, FNTYPE is 0.
358
359 On CSKY, the offset always starts at 0: the first parm reg is always
360 the same reg. */
361 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
362 ((CUM) = 0)
363
364 /* True if N is a possible register number for function argument passing.
365 On the CSKY, r0-r3 are used to pass args.
366 The int cast is to prevent a complaint about unsigned comparison to
367 zero, since CSKY_FIRST_PARM_REGNUM is zero. */
368 #define FUNCTION_ARG_REGNO_P(REGNO) \
369 (((int)(REGNO) >= CSKY_FIRST_PARM_REGNUM) && \
370 ((REGNO) < (CSKY_NPARM_REGS + CSKY_FIRST_PARM_REGNUM)))
371
372 /* How Large Values Are Returned */
373
374
375 /* Define DEFAULT_PCC_STRUCT_RETURN to 1 if all structure and union return
376 values must be in memory. On the CSKY, small
377 structures (eight bytes or fewer) are returned in
378 the register pair r0/r1. */
379 #define DEFAULT_PCC_STRUCT_RETURN 0
380
381 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
382 the stack pointer does not matter. The value is tested only in
383 functions that have frame pointers.
384 No definition is equivalent to always zero.
385
386 On the CSKY, the function epilogue recovers the stack pointer from the
387 frame. */
388 #define EXIT_IGNORE_STACK 1
389
390
391 /******************************************************************
392 * Register Usage & Register Classes *
393 ******************************************************************/
394
395
396 #define FIRST_PSEUDO_REGISTER 71
397
398 /* 1 for registers that have pervasive standard uses
399 and are not available for the register allocator.
400 On C-SKY, r14 is SP, r26 is used by linker,
401 r27 is used by assembler, r28 is data base address,
402 r29 is GOT base address, r30 is handler base address,
403 r31 is TLS register. */
404 #define FIXED_REGISTERS \
405 /* r0 r1 r2 r3 r4 r5 r6 r7 */ \
406 { 0, 0, 0, 0, 0, 0, 0, 0, \
407 /* r8 r9 r10 r11 r12 r13 r14 r15 */ \
408 0, 0, 0, 0, 0, 0, 1, 0, \
409 /* r16 r17 r18 r19 r20 r21 r22 r23 */ \
410 0, 0, 0, 0, 0, 0, 0, 0, \
411 /* r24 r25 r26 r27 r28 r29 r30 tls */ \
412 0, 0, 1, 1, 1, 1, 1, 1, \
413 /* reserved c hi lo */ \
414 1, 1, 0, 0, \
415 /* reserved */ \
416 1, 1, 1, 1, 1, 1, 1, 1, \
417 1, 1, 1, 1, 1, 1, 1, 1, \
418 /* vr0 vr1 vr2 vr3 vr4 vr5 vr6 vr7 */ \
419 0, 0, 0, 0, 0, 0, 0, 0, \
420 /* vr8 vr9 vr10 vr11 vr12 vr13 vr14 vr15 */ \
421 0, 0, 0, 0, 0, 0, 0, 0 , \
422 /* reserved */ \
423 1, 1, \
424 /* epc */ \
425 1 \
426 }
427
428 /* 1 for registers that is clobbered (in general) by function calls.
429 If a register has 0, the compiler automatically saves it on
430 function entry and restores it on function exit, if the register
431 is used within the function. */
432 #define CALL_USED_REGISTERS \
433 /* r0 r1 r2 r3 r4 r5 r6 r7 */ \
434 { 1, 1, 1, 1, 0, 0, 0, 0, \
435 /* r8 r9 r10 r11 r12 r13 r14 r15 */ \
436 0, 0, 0, 0, 1, 1, 1, 0, \
437 /* r16 r17 r18 r19 r20 r21 r22 r23 */ \
438 0, 0, 1, 1, 1, 1, 1, 1, \
439 /* r24 r25 r26 r27 r28 r29 r30 r31 */ \
440 1, 1, 1, 1, 1, 1, 1, 1, \
441 /* reserved c hi lo */ \
442 1, 1, 1, 1, \
443 /* reserved */ \
444 1, 1, 1, 1, 1, 1, 1, 1, \
445 1, 1, 1, 1, 1, 1, 1, 1, \
446 /* vr0 vr1 vr2 vr3 vr4 vr5 vr6 vr7 */ \
447 1, 1, 1, 1, 1, 1, 1, 1, \
448 /* vr8 vr9 vr10 vr11 vr12 vr13 vr14 vr15 */ \
449 1, 1, 1, 1, 1, 1, 1, 1, \
450 /* reserved */ \
451 1, 1, \
452 /* epc */ \
453 1 \
454 }
455
456 /* Like `CALL_USED_REGISTERS' but used to overcome a historical
457 problem which makes CALL_USED_REGISTERS *always* include
458 all the FIXED_REGISTERS. Until this problem has been
459 resolved this macro can be used to overcome this situation.
460 In particular, block_propagate() requires this list
461 be accurate, or we can remove registers which should be live.
462 This macro is used in get_csky_live_regs(). */
463 #define CALL_REALLY_USED_REGISTERS \
464 /* r0 r1 r2 r3 r4 r5 r6 r7 */ \
465 { 1, 1, 1, 1, 0, 0, 0, 0, \
466 /* r8 r9 r10 r11 r12 r13 r14 r15 */ \
467 0, 0, 0, 0, 1, 1, 1, 0, \
468 /* r16 r17 r18 r19 r20 r21 r22 r23 */ \
469 0, 0, 1, 1, 1, 1, 1, 1, \
470 /* r24 r25 r26 r27 r28 r29 r30 r31 */ \
471 1, 1, 1, 1, 1, 1, 1, 1, \
472 /* reserved c hi lo */ \
473 1, 1, 1, 1, \
474 /* reserved */ \
475 1, 1, 1, 1, 1, 1, 1, 1, \
476 1, 1, 1, 1, 1, 1, 1, 1, \
477 /* vr0 vr1 vr2 vr3 vr4 vr5 vr6 vr7 */ \
478 1, 1, 1, 1, 1, 1, 1, 1, \
479 /* vr8 vr9 vr10 vr11 vr12 vr13 vr14 vr15 */ \
480 1, 1, 1, 1, 1, 1, 1, 1, \
481 /* reserved */ \
482 1, 1, \
483 /* epc */ \
484 1 \
485 }
486
487 #define REGISTER_NAMES \
488 { \
489 "a0", "a1", "a2", "a3", "l0", "l1", "l2", "l3", \
490 "l4", "l5", "l6", "l7", "t0", "t1", "sp", "lr", \
491 "l8", "l9", "t2", "t3", "t4", "t5", "t6", "t7", \
492 "t8", "t9", "r26", "r27", "gb", "r29", "svbr", "r31", \
493 /* reserved */ \
494 "reserved", \
495 /* CC register: 33 */ \
496 "c", \
497 /* DSP instruction register: 34, 35 */ \
498 "hi", "lo", \
499 "reserved", "reserved", "reserved", "reserved", "reserved", \
500 "reserved", "reserved", "reserved", "reserved", "reserved", \
501 "reserved", "reserved", "reserved", "reserved", "reserved", \
502 "reserved", \
503 /* V registers: 52~67 */ \
504 "vr0", "vr1", "vr2", "vr3", "vr4", "vr5", "vr6", "vr7", \
505 "vr8", "vr9", "vr10", "vr11", "vr12", "vr13", "vr14", "vr15", \
506 "reserved", "reserved", \
507 "epc" \
508 }
509
510 /* Table of additional register names to use in user input. */
511 #define ADDITIONAL_REGISTER_NAMES \
512 { \
513 {"r0", 0}, \
514 {"r1", 1}, \
515 {"r2", 2}, \
516 {"r3", 3}, \
517 {"r4", 4}, \
518 {"r5", 5}, \
519 {"r6", 6}, \
520 {"r7", 7}, \
521 {"r8", 8}, \
522 {"r9", 9}, \
523 {"r10", 10}, \
524 {"r11", 11}, \
525 {"r12", 12}, \
526 {"r13", 13}, \
527 {"r14", 14}, \
528 {"r15", 15}, \
529 {"r16", 16}, \
530 {"r17", 17}, \
531 {"r18", 18}, \
532 {"r19", 19}, \
533 {"r20", 20}, \
534 {"r21", 21}, \
535 {"r22", 22}, \
536 {"r23", 23}, \
537 {"r24", 24}, \
538 {"r25", 25}, \
539 {"r26", 26}, \
540 {"r27", 27}, \
541 {"r28", 28}, \
542 {"r29", 29}, \
543 {"r30", 30}, \
544 {"r31", 31}, \
545 }
546
547 /* The order in which registers should be allocated.
548 It is better to use the registers the caller need not save.
549 Allocate r0 through r3 in reverse order since r3 is least likely
550 to contain a function parameter; in addition results are returned
551 in r0. It is quite good to use lr since other calls may clobber
552 it anyway. */
553 #define REG_ALLOC_ORDER \
554 /* r3 r2 r1 r0 r12 r13 r18 r19 */ \
555 { 3, 2, 1, 0, 12, 13, 18, 19, \
556 /* r20 r21 r22 r23 r24 r25 */ \
557 20, 21, 22, 23, 24, 25, \
558 /* r15 r4 r5 r6 r7 r8 r9 r10 r11 */ \
559 15, 4, 5, 6, 7, 8, 9, 10, 11, \
560 /* r16 r17 r26 r27 r28 r29 r30 hi lo */ \
561 16, 17, 26, 27, 28, 29, 30, 34, 35, \
562 /* vr0 vr1 vr2 vr3 vr4 vr5 vr6 vr7 */ \
563 52, 53, 54, 55, 56, 57, 58, 59, \
564 /* vr8 vr9 vr10 vr11 vr12 vr13 vr14 vr15 */ \
565 60, 61, 62, 63, 64, 65, 66, 67, \
566 /* reserved */ \
567 36, 37, 38, 39, 40, 41, 42, 43, \
568 44, 45, 46, 47, 48, 49, 50, 51, \
569 /* sp tls reserved c reserved epc */ \
570 14, 31, 32, 33, 68, 69, 70 }
571
572 /* Register classes. */
573 enum reg_class
574 {
575 NO_REGS,
576 MINI_REGS,
577 SP_REGS,
578 LOW_REGS,
579 GENERAL_REGS,
580 C_REGS,
581 HI_REGS,
582 LO_REGS,
583 HILO_REGS,
584 V_REGS,
585 OTHER_REGS,
586 RESERVE_REGS,
587 ALL_REGS,
588 LIM_REG_CLASSES
589 };
590
591 #define N_REG_CLASSES (int) LIM_REG_CLASSES
592
593 /* Give names of register classes as strings for dump file. */
594 #define REG_CLASS_NAMES \
595 { \
596 "NO_REGS", \
597 "MINI_REGS", \
598 "SP_REGS", \
599 "LOW_REGS", \
600 "GENERAL_REGS", \
601 "C_REGS", \
602 "HI_REGS", \
603 "LO_REGS", \
604 "HILO_REGS", \
605 "V_REGS", \
606 "OTHER_REGS", \
607 "RESERVE_REGS", \
608 "ALL_REGS", \
609 }
610
611 /* Define which registers fit in which classes. This is an initializer
612 for a vector of HARD_REG_SET of length N_REG_CLASSES. */
613 #define REG_CLASS_CONTENTS \
614 { \
615 {0x00000000, 0x00000000, 0x00000000 }, /* NO_REGS */ \
616 {0x000000FF, 0x00000000, 0x00000000 }, /* MINI_REGS */ \
617 {0x00004000, 0x00000000, 0x00000000 }, /* SP_REGS */ \
618 {0x0000FFFF, 0x00000000, 0x00000000 }, /* LOW_REGS */ \
619 {0xFFFFFFFF, 0x00000000, 0x00000000 }, /* GENERAL_REGS */ \
620 {0x00000000, 0x00000002, 0x00000000 }, /* C_REGS */ \
621 {0x00000000, 0x00000004, 0x00000000 }, /* HI_REG */ \
622 {0x00000000, 0x00000008, 0x00000000 }, /* LO_REG */ \
623 {0x00000000, 0x0000000c, 0x00000000 }, /* HILO_REGS */ \
624 {0x00000000, 0xFFF00000, 0x0000000F }, /* V_REGS */ \
625 {0x00000000, 0x00000000, 0x00000040 }, /* OTHER_REGS */ \
626 {0x00000000, 0x0FF00001, 0x00000030 }, /* RESERVE_REGS */ \
627 {0xFFFFFFFF, 0xFFFFFFFF, 0x0000007F }, /* ALL_REGS */ \
628 }
629
630 /* Return register class from regno. */
631 extern enum reg_class regno_reg_class[FIRST_PSEUDO_REGISTER];
632 #define REGNO_REG_CLASS(REGNO) regno_reg_class[REGNO]
633
634 /* The class value for index registers, and the one for base regs. */
635 #define INDEX_REG_CLASS (CSKY_ISA_FEATURE (2E3) ? GENERAL_REGS : NO_REGS)
636 #define BASE_REG_CLASS GENERAL_REGS
637
638 /* TODO is it necessary to set it to MINI_REGS to emit more 16-bit
639 instructions? */
640 #define MODE_BASE_REG_CLASS(MODE) GENERAL_REGS
641
642 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
643 and check its validity for a certain class.
644 We have two alternate definitions for each of them.
645 The usual definition accepts all pseudo regs; the other rejects
646 them unless they have been allocated suitable hard regs.
647 The symbol REG_OK_STRICT causes the latter definition to be used.
648
649 Most source files want to accept pseudo regs in the hope that
650 they will get allocated to the class that the insn wants them to be in.
651 Source files for reload pass need to be strict.
652 After reload, it makes no difference, since pseudo regs have
653 been eliminated by then.
654
655 The reg_renumber is used to map pseudo regs into hardware
656 regs, it is set up as a result of register allocation. */
657 #ifdef REG_OK_STRICT
658 #define REGNO_OK_FOR_BASE_P(REGNO) \
659 (CSKY_GENERAL_REGNO_P (REGNO) \
660 || CSKY_GENERAL_REGNO_P (reg_renumber[(REGNO)]) )
661 #else
662 #define REGNO_OK_FOR_BASE_P(REGNO) \
663 (CSKY_GENERAL_REGNO_P (REGNO) \
664 || (REGNO) >= FIRST_PSEUDO_REGISTER)
665 #endif
666
667
668 #ifdef REG_OK_STRICT
669 #define REGNO_OK_FOR_INDEX_P(REGNO) \
670 (CSKY_GENERAL_REGNO_P (REGNO) \
671 || CSKY_GENERAL_REGNO_P (reg_renumber[(REGNO)]) )
672 #else
673 #define REGNO_OK_FOR_INDEX_P(REGNO) \
674 (CSKY_GENERAL_REGNO_P (REGNO) \
675 || (REGNO) >= FIRST_PSEUDO_REGISTER)
676 #endif
677
678
679 /******************************************************************
680 * Addressing Modes *
681 ******************************************************************/
682
683
684 /* Recognize any constant value that is a valid address. */
685 #define CONSTANT_ADDRESS_P(X) \
686 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF)
687
688 /* Maximum number of registers that can appear in a valid memory address.
689 Shifts in addresses can't be by a register. */
690 #define MAX_REGS_PER_ADDRESS 2
691
692
693 /******************************************************************
694 * Run-time Target *
695 ******************************************************************/
696
697
698 #define TARGET_CPU_CPP_BUILTINS() \
699 csky_cpu_cpp_builtins (pfile)
700
701 /******************************************************************
702 * Per-function Data *
703 ******************************************************************/
704
705
706 /* Initialize data used by insn expanders. This is called from insn_emit,
707 once for every function before code is generated. */
708 #define INIT_EXPANDERS csky_init_expanders ()
709
710
711 /******************************************************************
712 * Dividing the Output into Sections (Texts, Data, . . . ) *
713 ******************************************************************/
714
715
716 /* Switch to the text or data segment. */
717 #define TEXT_SECTION_ASM_OP "\t.text"
718 #define DATA_SECTION_ASM_OP "\t.data"
719
720 /* The subroutine calls in the .init and .fini sections create literal
721 pools which must be jumped around... */
722 #define FORCE_CODE_SECTION_ALIGN \
723 asm ("br 1f ; .literals ; .align 2 ; 1:");
724
725 /* Define this macro to be an expression with a nonzero value if
726 jump tables (for tablejump insns) should be output in the text section,
727 along with the assembler instructions. */
728 #define JUMP_TABLES_IN_TEXT_SECTION TARGET_CASESI
729
730
731 /******************************************************************
732 * Assembler Format *
733 ******************************************************************/
734
735
736 /* A C string constant for text to be output before(after) each asm
737 statement or group of consecutive ones. */
738 #undef ASM_APP_ON
739 #define ASM_APP_ON "// inline asm begin\n"
740 #undef ASM_APP_OFF
741 #define ASM_APP_OFF "// inline asm end\n"
742
743 /* A C string constant describing how to begin a comment in the target
744 assembler language. */
745 #define ASM_COMMENT_START "\t//"
746
747 /* This says how to output an assembler line
748 to define a global common symbol, with alignment information. */
749 #undef ASM_OUTPUT_ALIGNED_COMMON
750 #define ASM_OUTPUT_ALIGNED_COMMON(STREAM, NAME, SIZE, ALIGN) \
751 do \
752 { \
753 fputs ("\t.comm\t", STREAM); \
754 assemble_name (STREAM, NAME); \
755 fprintf (STREAM, ",%lu, %u\n", (unsigned long)(SIZE), \
756 (ALIGN) / BITS_PER_UNIT); \
757 } \
758 while (0)
759
760 /* Define a local common symbol whose alignment we wish to specify.
761 ALIGN comes in as bits, we have to turn it into bytes. */
762 #undef ASM_OUTPUT_ALIGNED_LOCAL
763 #define ASM_OUTPUT_ALIGNED_LOCAL(STREAM, NAME, SIZE, ALIGN) \
764 do \
765 { \
766 fputs ("\t.bss\t", (STREAM)); \
767 assemble_name ((STREAM), (NAME)); \
768 fprintf ((STREAM), ",%d, %d\n", (int)(SIZE), \
769 (ALIGN) / BITS_PER_UNIT); \
770 } \
771 while (0)
772
773 /* Globalizing directive for a label. */
774 #define GLOBAL_ASM_OP "\t.global\t"
775
776 /* Output a reference to a label. */
777 #undef ASM_OUTPUT_LABELREF
778 #define ASM_OUTPUT_LABELREF(STREAM, NAME) \
779 fprintf (STREAM, "%s%s", user_label_prefix, \
780 (* targetm.strip_name_encoding) (NAME))
781
782 /* Make an internal label into a string. */
783 #undef ASM_GENERATE_INTERNAL_LABEL
784 #define ASM_GENERATE_INTERNAL_LABEL(STRING, PREFIX, NUM) \
785 sprintf (STRING, "*.%s%ld", PREFIX, (long) NUM)
786
787 /* This is how to output an insn to push a register on the stack.
788 It need not be very fast code. */
789 #define ASM_OUTPUT_REG_PUSH(STREAM,REGNO) \
790 fprintf (STREAM, "\tsubi\t %s,%d\n\tst.w\t %s,(%s)\n", \
791 reg_names[STACK_POINTER_REGNUM], \
792 (STACK_BOUNDARY / BITS_PER_UNIT), \
793 reg_names[REGNO], \
794 reg_names[STACK_POINTER_REGNUM])
795
796 /* This is how to output an insn to pop a register from the stack. */
797 #define ASM_OUTPUT_REG_POP(STREAM,REGNO) \
798 fprintf (STREAM, "\tld.w\t %s,(%s)\n\taddi\t %s,%d\n", \
799 reg_names[REGNO], \
800 reg_names[STACK_POINTER_REGNUM], \
801 reg_names[STACK_POINTER_REGNUM], \
802 (STACK_BOUNDARY / BITS_PER_UNIT))
803
804 /* Output an element of a dispatch table. */
805 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM,VALUE) \
806 fprintf (STREAM, "\t.long\t.L%d\n", VALUE)
807
808 /* This is how to output an assembler line
809 that says to advance the location counter by SIZE bytes. */
810 #undef ASM_OUTPUT_SKIP
811 #define ASM_OUTPUT_SKIP(STREAM,SIZE) \
812 fprintf (STREAM, "\t.fill %d, 1\n", (int)(SIZE))
813
814 /* Align output to a power of two. Note ".align 0" is redundant,
815 and also GAS will treat it as ".align 2" which we do not want. */
816 #define ASM_OUTPUT_ALIGN(STREAM, POWER) \
817 do \
818 { \
819 if ((POWER) > 0) \
820 fprintf (STREAM, "\t.align\t%d\n", POWER); \
821 } \
822 while (0)
823
824
825 /******************************************************************
826 * Controlling the Compilation Driver *
827 ******************************************************************/
828
829
830 /* Define this macro as a C expression for the initializer of an
831 array of string to tell the driver program which options are
832 defaults for this target and thus do not need to be handled
833 specially when using MULTILIB_OPTIONS. */
834 #undef MULTILIB_DEFAULTS
835 #define MULTILIB_DEFAULTS \
836 {"mlittle-endian", "mcpu=ck810f", "msoft-float"}
837
838 /* Support for a compile-time default CPU, et cetera. The rules are:
839 --with-arch is ignored if -march or -mcpu are specified.
840 --with-cpu is ignored if -march or -mcpu are specified, and is overridden
841 by --with-arch. */
842 #define OPTION_DEFAULT_SPECS \
843 {"arch", "%{!march=*:%{!mcpu=*:-march=%(VALUE)}}" }, \
844 {"cpu", "%{!march=*:%{!mcpu=*:-mcpu=%(VALUE)}}" }, \
845 {"endian", "%{!mbig-endian:%{!mlittle-endian:-m%(VALUE)-endian}}" }, \
846 {"float", "%{!msoft-float:%{!mhard-float:-m%(VALUE)-float}}" },
847
848
849 /******************************************************************
850 * Position Independent Code *
851 ******************************************************************/
852
853 /* Define the global table register. */
854 #define PIC_OFFSET_TABLE_REGNUM (flag_pic ? CSKY_GB_REGNUM : INVALID_REGNUM)
855
856 /* Nonzero if x is a legitimate immediate operand on the target machine
857 when generating position-independent code. */
858 #define LEGITIMATE_PIC_OPERAND_P(X) \
859 csky_legitimate_pic_operand_p (X)
860
861
862 /******************************************************************
863 * Controlling Debugging Information Format *
864 ******************************************************************/
865
866
867 /* Define this macro if GCC should produce dwarf version 2 format debugging
868 output in response to the `-g' option. */
869 #define DWARF2_DEBUGGING_INFO 1
870
871 /* Define this macro to 0 if your target supports DWARF 2 frame unwind
872 information, but it does not yet work with exception handling. */
873 #define DWARF2_UNWIND_INFO 1
874
875 /* Define this if you have arranged for GCC to support
876 more than one format of debugging output.
877 The value of this macro only affects the default debugging output. */
878 #define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG
879
880 /* Define this macro if the target’s representation
881 for dwarf registers used in .eh_frame or .debug_frame
882 is different from that used in other debug info sections.
883 Given a GCC hard register number,
884 this macro should return the .eh_frame register number.*/
885 #define DWARF_FRAME_REGNUM(REG) DBX_REGISTER_NUMBER (REG)
886
887 /* If INCOMING_RETURN_ADDR_RTX is defined & the RTL is REG,
888 define DWARF_FRAME_RETURN_COLUMN to DWARF_FRAME_REGNUM. */
889 #define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (CSKY_LR_REGNUM)
890
891 /* Use r0 and r1 to pass exception handling information. */
892 #define EH_RETURN_DATA_REGNO(N) ((N) < 2 ? N : INVALID_REGNUM)
893
894 /* How to renumber registers for dbx and gdb. */
895 extern const int csky_dbx_regno[];
896 #define DBX_REGISTER_NUMBER(REGNO) ((unsigned int) csky_dbx_regno[REGNO])
897
898
899 /******************************************************************
900 * Miscellaneous Parameters *
901 ******************************************************************/
902
903
904 /* Specify the machine mode that this machine uses
905 for the index in the tablejump instruction. */
906 #define CASE_VECTOR_MODE SImode
907
908 /* Define if operations between registers always perform the operation
909 on the full register even if a narrower mode is specified. */
910 #define WORD_REGISTER_OPERATIONS 1
911
912 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
913 will either zero-extend or sign-extend. The value of this macro should
914 be the code that says which one of the two operations is implicitly
915 done, UNKNOWN if none. */
916 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
917
918 /* Max number of bytes we can move from memory to memory
919 in one reasonably fast instruction. */
920 #define MOVE_MAX 4
921
922 /* Shift counts are truncated to 6-bits (0 to 63) instead of the expected
923 5-bits, so we can not define SHIFT_COUNT_TRUNCATED to true for this
924 target. */
925 #define SHIFT_COUNT_TRUNCATED 0
926
927 #define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 32, 1)
928
929 /* The machine modes of pointers and functions. */
930 #define Pmode SImode
931 #define FUNCTION_MODE Pmode
932
933 /* Define this macro to be a C expression to indicate when jump-tables
934 should contain relative addresses. */
935 #define CASE_VECTOR_PC_RELATIVE \
936 (optimize_size && TARGET_CONSTANT_POOL \
937 && (CSKY_TARGET_ARCH (CK802) || CSKY_TARGET_ARCH (CK801)))
938
939 /* Return the preferred mode for an addr_diff_vec when the minimum
940 and maximum offset are known. */
941 #define CASE_VECTOR_SHORTEN_MODE(min, max, body) \
942 (min >= 0 && max < 512 \
943 ? (ADDR_DIFF_VEC_FLAGS (body).offset_unsigned = 1, QImode) \
944 : min >= -256 && max < 256 \
945 ? (ADDR_DIFF_VEC_FLAGS (body).offset_unsigned = 0, QImode) \
946 : min >= 0 && max < 8192 \
947 ? (ADDR_DIFF_VEC_FLAGS (body).offset_unsigned = 1, HImode) \
948 : min >= -4096 && max < 4096 \
949 ? (ADDR_DIFF_VEC_FLAGS (body).offset_unsigned = 0, HImode) \
950 : SImode)
951
952 /* This is how to output an element of a case-vector that is relative. */
953 #define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL) \
954 do \
955 { \
956 if (optimize_size && TARGET_CONSTANT_POOL \
957 && (CSKY_TARGET_ARCH (CK802) || CSKY_TARGET_ARCH (CK801))) \
958 { \
959 switch (GET_MODE (BODY)) \
960 { \
961 case E_QImode: \
962 asm_fprintf (STREAM, "\t.byte\t(.L%d-.L%d)/2\n", \
963 VALUE, REL); \
964 break; \
965 case E_HImode: /* TBH */ \
966 asm_fprintf (STREAM, "\t.short\t(.L%d-.L%d)/2\n", \
967 VALUE, REL); \
968 break; \
969 case E_SImode: \
970 asm_fprintf (STREAM, "\t.long\t.L%d-.L%d\n", \
971 VALUE, REL); \
972 break; \
973 default: \
974 gcc_unreachable (); \
975 } \
976 } \
977 else \
978 asm_fprintf (STREAM, "\t.long\t.L%d@GOTOFF\n", VALUE); \
979 } while (0)
980
981 /* This macro is not documented yet.
982 But we do need it to make jump table vector aligned. */
983 #define ADDR_VEC_ALIGN(JUMPTABLE) 0
984
985 /* We have to undef this first to override the version from elfos.h. */
986 #undef ASM_OUTPUT_CASE_LABEL
987 #define ASM_OUTPUT_CASE_LABEL(stream, prefix, num, table) \
988 do \
989 { \
990 if (GET_MODE (PATTERN (table)) == SImode) \
991 ASM_OUTPUT_ALIGN (stream, 2); \
992 (*targetm.asm_out.internal_label) (stream, prefix, num); \
993 } while (0)
994
995 /* Make sure subsequent insns are aligned after a byte-sized jump offset
996 table. */
997 #define ASM_OUTPUT_CASE_END(stream, num, table) \
998 do \
999 { \
1000 if (GET_MODE (PATTERN (table)) == QImode) \
1001 ASM_OUTPUT_ALIGN (stream, 1); \
1002 } while (0)
1003
1004
1005
1006
1007 /******************************************************************
1008 * Trampolines for Nested Functions *
1009 ******************************************************************/
1010
1011
1012 /* Length in units of the trampoline for entering a nested function. */
1013 #define TRAMPOLINE_SIZE (CSKY_ISA_FEATURE (2E3) ? 16 : 20)
1014
1015 /* Alignment required for a trampoline in bits. */
1016 #define TRAMPOLINE_ALIGNMENT 32
1017
1018
1019 /******************************************************************
1020 * Describing Relative Costs of Operations *
1021 ******************************************************************/
1022
1023
1024 /* Nonzero if access to memory by bytes is slow and undesirable.
1025 For RISC chips, it means that access to memory by bytes is no
1026 better than access by words when possible, so grab a whole word
1027 and maybe make use of that. */
1028 #define SLOW_BYTE_ACCESS 0
1029
1030 /* On C-SKY, function CSE would allow use of 16-bit jsr instructions
1031 instead of normal 32-bit calls. But it also needs a separate constant
1032 pool entry for the function address and an instruction to load it, and
1033 may cause additional spills due to increased register pressure, etc.
1034 It doesn't seem like a good idea overall. */
1035 #define NO_FUNCTION_CSE 1
1036
1037 /* Try to generate sequences that don't involve branches, we can then use
1038 conditional instructions. */
1039 #define BRANCH_COST(speed_p, predictable_p) \
1040 csky_default_branch_cost (speed_p, predictable_p)
1041
1042 /* False if short circuit operation is preferred. */
1043 #define LOGICAL_OP_NON_SHORT_CIRCUIT \
1044 (csky_default_logical_op_non_short_circuit ())
1045
1046
1047 /******************************************************************
1048 * Generating Code for Profiling *
1049 ******************************************************************/
1050
1051
1052 #define FUNCTION_PROFILER(FILE, LABELNO)
1053
1054 #endif /* GCC_CSKY_H */