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comparison gcc/config/mips/loongson.md @ 131:84e7813d76e9

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gcc-8.2
author mir3636
date Thu, 25 Oct 2018 07:37:49 +0900
parents 04ced10e8804
children
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111:04ced10e8804 131:84e7813d76e9
1 ;; Machine description for Loongson-specific patterns, such as 1 ;; Machine description for Loongson-specific patterns, such as
2 ;; ST Microelectronics Loongson-2E/2F etc. 2 ;; ST Microelectronics Loongson-2E/2F etc.
3 ;; Copyright (C) 2008-2017 Free Software Foundation, Inc. 3 ;; Copyright (C) 2008-2018 Free Software Foundation, Inc.
4 ;; Contributed by CodeSourcery. 4 ;; Contributed by CodeSourcery.
5 ;; 5 ;;
6 ;; This file is part of GCC. 6 ;; This file is part of GCC.
7 ;; 7 ;;
8 ;; GCC is free software; you can redistribute it and/or modify 8 ;; GCC is free software; you can redistribute it and/or modify
379 (match_operand:SI 3 "const_0_to_3_operand" "")] 379 (match_operand:SI 3 "const_0_to_3_operand" "")]
380 UNSPEC_LOONGSON_PINSRH))] 380 UNSPEC_LOONGSON_PINSRH))]
381 "TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS" 381 "TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS"
382 { 382 {
383 rtx ext = gen_reg_rtx (SImode); 383 rtx ext = gen_reg_rtx (SImode);
384 emit_move_insn (ext, gen_lowpart (SImode, operands[1])); 384 emit_move_insn (ext, gen_lowpart (SImode, operands[2]));
385 operands[1] = ext; 385 operands[2] = ext;
386 }) 386 })
387 387
388 ;; Multiply and add packed integers. 388 ;; Multiply and add packed integers.
389 (define_insn "loongson_pmaddhw" 389 (define_insn "loongson_pmaddhw"
390 [(set (match_operand:V2SI 0 "register_operand" "=f") 390 [(set (match_operand:V2SI 0 "register_operand" "=f")
782 (const_int 4) (const_int 5)])))] 782 (const_int 4) (const_int 5)])))]
783 "TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS" 783 "TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS"
784 "punpcklwd\t%0,%1,%2" 784 "punpcklwd\t%0,%1,%2"
785 [(set_attr "type" "fcvt")]) 785 [(set_attr "type" "fcvt")])
786 786
787 (define_expand "vec_perm_const<mode>"
788 [(match_operand:VWHB 0 "register_operand" "")
789 (match_operand:VWHB 1 "register_operand" "")
790 (match_operand:VWHB 2 "register_operand" "")
791 (match_operand:VWHB 3 "" "")]
792 "TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS"
793 {
794 if (mips_expand_vec_perm_const (operands))
795 DONE;
796 else
797 FAIL;
798 })
799
800 (define_expand "vec_unpacks_lo_<mode>" 787 (define_expand "vec_unpacks_lo_<mode>"
801 [(match_operand:<V_stretch_half> 0 "register_operand" "") 788 [(match_operand:<V_stretch_half> 0 "register_operand" "")
802 (match_operand:VHB 1 "register_operand" "")] 789 (match_operand:VHB 1 "register_operand" "")]
803 "TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS" 790 "TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS"
804 { 791 {